1bdf2cbb2Syt.shen@mediatek.com/* 2bdf2cbb2Syt.shen@mediatek.com * Copyright (c) 2017 MediaTek Inc. 3bdf2cbb2Syt.shen@mediatek.com * Author: YT Shen <yt.shen@mediatek.com> 4bdf2cbb2Syt.shen@mediatek.com * 5bdf2cbb2Syt.shen@mediatek.com * SPDX-License-Identifier: (GPL-2.0 OR MIT) 6bdf2cbb2Syt.shen@mediatek.com */ 7bdf2cbb2Syt.shen@mediatek.com 8bdf2cbb2Syt.shen@mediatek.com/dts-v1/; 91724f4ccSChunfeng Yun#include <dt-bindings/gpio/gpio.h> 10bdf2cbb2Syt.shen@mediatek.com#include "mt2712e.dtsi" 11bdf2cbb2Syt.shen@mediatek.com 12bdf2cbb2Syt.shen@mediatek.com/ { 13bdf2cbb2Syt.shen@mediatek.com model = "MediaTek MT2712 evaluation board"; 14bdf2cbb2Syt.shen@mediatek.com compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; 15bdf2cbb2Syt.shen@mediatek.com 16bdf2cbb2Syt.shen@mediatek.com aliases { 17bdf2cbb2Syt.shen@mediatek.com serial0 = &uart0; 18bdf2cbb2Syt.shen@mediatek.com }; 19bdf2cbb2Syt.shen@mediatek.com 20bdf2cbb2Syt.shen@mediatek.com memory@40000000 { 21bdf2cbb2Syt.shen@mediatek.com device_type = "memory"; 22bdf2cbb2Syt.shen@mediatek.com reg = <0 0x40000000 0 0x80000000>; 23bdf2cbb2Syt.shen@mediatek.com }; 24bdf2cbb2Syt.shen@mediatek.com 25bdf2cbb2Syt.shen@mediatek.com chosen { 26bdf2cbb2Syt.shen@mediatek.com stdout-path = "serial0:921600n8"; 27bdf2cbb2Syt.shen@mediatek.com }; 28f75dd8bdSAndrew-sh Cheng 29f75dd8bdSAndrew-sh Cheng cpus_fixed_vproc0: fixedregulator@0 { 30f75dd8bdSAndrew-sh Cheng compatible = "regulator-fixed"; 31f75dd8bdSAndrew-sh Cheng regulator-name = "vproc_buck0"; 32f75dd8bdSAndrew-sh Cheng regulator-min-microvolt = <1000000>; 33f75dd8bdSAndrew-sh Cheng regulator-max-microvolt = <1000000>; 34f75dd8bdSAndrew-sh Cheng }; 35f75dd8bdSAndrew-sh Cheng 36f75dd8bdSAndrew-sh Cheng cpus_fixed_vproc1: fixedregulator@1 { 37f75dd8bdSAndrew-sh Cheng compatible = "regulator-fixed"; 38f75dd8bdSAndrew-sh Cheng regulator-name = "vproc_buck1"; 39f75dd8bdSAndrew-sh Cheng regulator-min-microvolt = <1000000>; 40f75dd8bdSAndrew-sh Cheng regulator-max-microvolt = <1000000>; 41f75dd8bdSAndrew-sh Cheng }; 42f75dd8bdSAndrew-sh Cheng 431724f4ccSChunfeng Yun extcon_usb: extcon_iddig { 441724f4ccSChunfeng Yun compatible = "linux,extcon-usb-gpio"; 451724f4ccSChunfeng Yun id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>; 461724f4ccSChunfeng Yun }; 471724f4ccSChunfeng Yun 481724f4ccSChunfeng Yun extcon_usb1: extcon_iddig1 { 491724f4ccSChunfeng Yun compatible = "linux,extcon-usb-gpio"; 501724f4ccSChunfeng Yun id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>; 511724f4ccSChunfeng Yun }; 521724f4ccSChunfeng Yun 531724f4ccSChunfeng Yun usb_p0_vbus: regulator@2 { 541724f4ccSChunfeng Yun compatible = "regulator-fixed"; 551724f4ccSChunfeng Yun regulator-name = "p0_vbus"; 561724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 571724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 581724f4ccSChunfeng Yun gpio = <&pio 13 GPIO_ACTIVE_HIGH>; 591724f4ccSChunfeng Yun enable-active-high; 601724f4ccSChunfeng Yun }; 611724f4ccSChunfeng Yun 621724f4ccSChunfeng Yun usb_p1_vbus: regulator@3 { 631724f4ccSChunfeng Yun compatible = "regulator-fixed"; 641724f4ccSChunfeng Yun regulator-name = "p1_vbus"; 651724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 661724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 671724f4ccSChunfeng Yun gpio = <&pio 15 GPIO_ACTIVE_HIGH>; 681724f4ccSChunfeng Yun enable-active-high; 691724f4ccSChunfeng Yun }; 701724f4ccSChunfeng Yun 711724f4ccSChunfeng Yun usb_p2_vbus: regulator@4 { 721724f4ccSChunfeng Yun compatible = "regulator-fixed"; 731724f4ccSChunfeng Yun regulator-name = "p2_vbus"; 741724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 751724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 761724f4ccSChunfeng Yun gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 771724f4ccSChunfeng Yun enable-active-high; 781724f4ccSChunfeng Yun }; 791724f4ccSChunfeng Yun 801724f4ccSChunfeng Yun usb_p3_vbus: regulator@5 { 811724f4ccSChunfeng Yun compatible = "regulator-fixed"; 821724f4ccSChunfeng Yun regulator-name = "p3_vbus"; 831724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 841724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 851724f4ccSChunfeng Yun gpio = <&pio 17 GPIO_ACTIVE_HIGH>; 861724f4ccSChunfeng Yun enable-active-high; 871724f4ccSChunfeng Yun regulator-always-on; 881724f4ccSChunfeng Yun }; 891724f4ccSChunfeng Yun 90f75dd8bdSAndrew-sh Cheng}; 91f75dd8bdSAndrew-sh Cheng 925f599552SZhiyong Tao&auxadc { 935f599552SZhiyong Tao status = "okay"; 945f599552SZhiyong Tao}; 955f599552SZhiyong Tao 96f75dd8bdSAndrew-sh Cheng&cpu0 { 97f75dd8bdSAndrew-sh Cheng proc-supply = <&cpus_fixed_vproc0>; 98f75dd8bdSAndrew-sh Cheng}; 99f75dd8bdSAndrew-sh Cheng 100f75dd8bdSAndrew-sh Cheng&cpu1 { 101f75dd8bdSAndrew-sh Cheng proc-supply = <&cpus_fixed_vproc0>; 102f75dd8bdSAndrew-sh Cheng}; 103f75dd8bdSAndrew-sh Cheng 104f75dd8bdSAndrew-sh Cheng&cpu2 { 105f75dd8bdSAndrew-sh Cheng proc-supply = <&cpus_fixed_vproc1>; 106bdf2cbb2Syt.shen@mediatek.com}; 107bdf2cbb2Syt.shen@mediatek.com 1081724f4ccSChunfeng Yun&pio { 1091724f4ccSChunfeng Yun usb0_id_pins_float: usb0_iddig { 1101724f4ccSChunfeng Yun pins_iddig { 1111724f4ccSChunfeng Yun pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>; 1121724f4ccSChunfeng Yun bias-pull-up; 1131724f4ccSChunfeng Yun }; 1141724f4ccSChunfeng Yun }; 1151724f4ccSChunfeng Yun 1161724f4ccSChunfeng Yun usb1_id_pins_float: usb1_iddig { 1171724f4ccSChunfeng Yun pins_iddig { 1181724f4ccSChunfeng Yun pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>; 1191724f4ccSChunfeng Yun bias-pull-up; 1201724f4ccSChunfeng Yun }; 1211724f4ccSChunfeng Yun }; 1221724f4ccSChunfeng Yun}; 1231724f4ccSChunfeng Yun 1241724f4ccSChunfeng Yun&ssusb { 1251724f4ccSChunfeng Yun vbus-supply = <&usb_p0_vbus>; 1261724f4ccSChunfeng Yun extcon = <&extcon_usb>; 1271724f4ccSChunfeng Yun dr_mode = "otg"; 1281724f4ccSChunfeng Yun wakeup-source; 1291724f4ccSChunfeng Yun mediatek,u3p-dis-msk = <0x1>; 1301724f4ccSChunfeng Yun //enable-manual-drd; 1311724f4ccSChunfeng Yun //maximum-speed = "full-speed"; 1321724f4ccSChunfeng Yun pinctrl-names = "default"; 1331724f4ccSChunfeng Yun pinctrl-0 = <&usb0_id_pins_float>; 1341724f4ccSChunfeng Yun status = "okay"; 1351724f4ccSChunfeng Yun}; 1361724f4ccSChunfeng Yun 1371724f4ccSChunfeng Yun&ssusb1 { 1381724f4ccSChunfeng Yun vbus-supply = <&usb_p1_vbus>; 1391724f4ccSChunfeng Yun extcon = <&extcon_usb1>; 1401724f4ccSChunfeng Yun dr_mode = "otg"; 1411724f4ccSChunfeng Yun //mediatek,u3p-dis-msk = <0x1>; 1421724f4ccSChunfeng Yun enable-manual-drd; 1431724f4ccSChunfeng Yun wakeup-source; 1441724f4ccSChunfeng Yun //maximum-speed = "full-speed"; 1451724f4ccSChunfeng Yun pinctrl-names = "default"; 1461724f4ccSChunfeng Yun pinctrl-0 = <&usb1_id_pins_float>; 1471724f4ccSChunfeng Yun status = "okay"; 1481724f4ccSChunfeng Yun}; 1491724f4ccSChunfeng Yun 150bdf2cbb2Syt.shen@mediatek.com&uart0 { 151bdf2cbb2Syt.shen@mediatek.com status = "okay"; 152bdf2cbb2Syt.shen@mediatek.com}; 153bdf2cbb2Syt.shen@mediatek.com 1541724f4ccSChunfeng Yun&usb_host0 { 1551724f4ccSChunfeng Yun vbus-supply = <&usb_p2_vbus>; 1561724f4ccSChunfeng Yun status = "okay"; 1571724f4ccSChunfeng Yun}; 1581724f4ccSChunfeng Yun 1591724f4ccSChunfeng Yun&usb_host1 { 1601724f4ccSChunfeng Yun status = "okay"; 1611724f4ccSChunfeng Yun}; 162