1*4c43a41eSKonstantin Porotchkin// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4c43a41eSKonstantin Porotchkin/* 3*4c43a41eSKonstantin Porotchkin * Copyright (C) 2020 Marvell International Ltd. 4*4c43a41eSKonstantin Porotchkin * 5*4c43a41eSKonstantin Porotchkin * Device tree for the CN9132-DB board. 6*4c43a41eSKonstantin Porotchkin */ 7*4c43a41eSKonstantin Porotchkin 8*4c43a41eSKonstantin Porotchkin#include "cn9131-db.dtsi" 9*4c43a41eSKonstantin Porotchkin 10*4c43a41eSKonstantin Porotchkin/ { 11*4c43a41eSKonstantin Porotchkin compatible = "marvell,cn9132", "marvell,cn9131", "marvell,cn9130", 12*4c43a41eSKonstantin Porotchkin "marvell,armada-ap807-quad", "marvell,armada-ap807"; 13*4c43a41eSKonstantin Porotchkin 14*4c43a41eSKonstantin Porotchkin aliases { 15*4c43a41eSKonstantin Porotchkin gpio5 = &cp2_gpio1; 16*4c43a41eSKonstantin Porotchkin gpio6 = &cp2_gpio2; 17*4c43a41eSKonstantin Porotchkin ethernet5 = &cp2_eth0; 18*4c43a41eSKonstantin Porotchkin }; 19*4c43a41eSKonstantin Porotchkin 20*4c43a41eSKonstantin Porotchkin cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 { 21*4c43a41eSKonstantin Porotchkin compatible = "regulator-fixed"; 22*4c43a41eSKonstantin Porotchkin regulator-name = "cp2-xhci0-vbus"; 23*4c43a41eSKonstantin Porotchkin regulator-min-microvolt = <5000000>; 24*4c43a41eSKonstantin Porotchkin regulator-max-microvolt = <5000000>; 25*4c43a41eSKonstantin Porotchkin enable-active-high; 26*4c43a41eSKonstantin Porotchkin gpio = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>; 27*4c43a41eSKonstantin Porotchkin }; 28*4c43a41eSKonstantin Porotchkin 29*4c43a41eSKonstantin Porotchkin cp2_usb3_0_phy0: cp2_usb3_phy0 { 30*4c43a41eSKonstantin Porotchkin compatible = "usb-nop-xceiv"; 31*4c43a41eSKonstantin Porotchkin vcc-supply = <&cp2_reg_usb3_vbus0>; 32*4c43a41eSKonstantin Porotchkin }; 33*4c43a41eSKonstantin Porotchkin 34*4c43a41eSKonstantin Porotchkin cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 { 35*4c43a41eSKonstantin Porotchkin compatible = "regulator-fixed"; 36*4c43a41eSKonstantin Porotchkin regulator-name = "cp2-xhci1-vbus"; 37*4c43a41eSKonstantin Porotchkin regulator-min-microvolt = <5000000>; 38*4c43a41eSKonstantin Porotchkin regulator-max-microvolt = <5000000>; 39*4c43a41eSKonstantin Porotchkin enable-active-high; 40*4c43a41eSKonstantin Porotchkin gpio = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>; 41*4c43a41eSKonstantin Porotchkin }; 42*4c43a41eSKonstantin Porotchkin 43*4c43a41eSKonstantin Porotchkin cp2_usb3_0_phy1: cp2_usb3_phy1 { 44*4c43a41eSKonstantin Porotchkin compatible = "usb-nop-xceiv"; 45*4c43a41eSKonstantin Porotchkin vcc-supply = <&cp2_reg_usb3_vbus1>; 46*4c43a41eSKonstantin Porotchkin }; 47*4c43a41eSKonstantin Porotchkin 48*4c43a41eSKonstantin Porotchkin cp2_reg_sd_vccq: cp2_sd_vccq@0 { 49*4c43a41eSKonstantin Porotchkin compatible = "regulator-gpio"; 50*4c43a41eSKonstantin Porotchkin regulator-name = "cp2_sd_vcc"; 51*4c43a41eSKonstantin Porotchkin regulator-min-microvolt = <1800000>; 52*4c43a41eSKonstantin Porotchkin regulator-max-microvolt = <3300000>; 53*4c43a41eSKonstantin Porotchkin gpios = <&cp2_gpio2 17 GPIO_ACTIVE_HIGH>; 54*4c43a41eSKonstantin Porotchkin states = <1800000 0x1 3300000 0x0>; 55*4c43a41eSKonstantin Porotchkin }; 56*4c43a41eSKonstantin Porotchkin 57*4c43a41eSKonstantin Porotchkin cp2_sfp_eth0: sfp-eth0 { 58*4c43a41eSKonstantin Porotchkin compatible = "sff,sfp"; 59*4c43a41eSKonstantin Porotchkin i2c-bus = <&cp2_sfpp0_i2c>; 60*4c43a41eSKonstantin Porotchkin los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>; 61*4c43a41eSKonstantin Porotchkin mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>; 62*4c43a41eSKonstantin Porotchkin tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>; 63*4c43a41eSKonstantin Porotchkin tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>; 64*4c43a41eSKonstantin Porotchkin /* 65*4c43a41eSKonstantin Porotchkin * SFP cages are unconnected on early PCBs because of an the I2C 66*4c43a41eSKonstantin Porotchkin * lanes not being connected. Prevent the port for being 67*4c43a41eSKonstantin Porotchkin * unusable by disabling the SFP node. 68*4c43a41eSKonstantin Porotchkin */ 69*4c43a41eSKonstantin Porotchkin status = "disabled"; 70*4c43a41eSKonstantin Porotchkin }; 71*4c43a41eSKonstantin Porotchkin}; 72*4c43a41eSKonstantin Porotchkin 73*4c43a41eSKonstantin Porotchkin/* 74*4c43a41eSKonstantin Porotchkin * Instantiate the second slave CP115 75*4c43a41eSKonstantin Porotchkin */ 76*4c43a41eSKonstantin Porotchkin 77*4c43a41eSKonstantin Porotchkin#define CP11X_NAME cp2 78*4c43a41eSKonstantin Porotchkin#define CP11X_BASE f6000000 79*4c43a41eSKonstantin Porotchkin#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000)) 80*4c43a41eSKonstantin Porotchkin#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 81*4c43a41eSKonstantin Porotchkin#define CP11X_PCIE0_BASE f6600000 82*4c43a41eSKonstantin Porotchkin#define CP11X_PCIE1_BASE f6620000 83*4c43a41eSKonstantin Porotchkin#define CP11X_PCIE2_BASE f6640000 84*4c43a41eSKonstantin Porotchkin 85*4c43a41eSKonstantin Porotchkin#include "armada-cp115.dtsi" 86*4c43a41eSKonstantin Porotchkin 87*4c43a41eSKonstantin Porotchkin#undef CP11X_NAME 88*4c43a41eSKonstantin Porotchkin#undef CP11X_BASE 89*4c43a41eSKonstantin Porotchkin#undef CP11X_PCIEx_MEM_BASE 90*4c43a41eSKonstantin Porotchkin#undef CP11X_PCIEx_MEM_SIZE 91*4c43a41eSKonstantin Porotchkin#undef CP11X_PCIE0_BASE 92*4c43a41eSKonstantin Porotchkin#undef CP11X_PCIE1_BASE 93*4c43a41eSKonstantin Porotchkin#undef CP11X_PCIE2_BASE 94*4c43a41eSKonstantin Porotchkin 95*4c43a41eSKonstantin Porotchkin&cp2_crypto { 96*4c43a41eSKonstantin Porotchkin status = "disabled"; 97*4c43a41eSKonstantin Porotchkin}; 98*4c43a41eSKonstantin Porotchkin 99*4c43a41eSKonstantin Porotchkin&cp2_ethernet { 100*4c43a41eSKonstantin Porotchkin status = "okay"; 101*4c43a41eSKonstantin Porotchkin}; 102*4c43a41eSKonstantin Porotchkin 103*4c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON9 */ 104*4c43a41eSKonstantin Porotchkin&cp2_eth0 { 105*4c43a41eSKonstantin Porotchkin status = "disabled"; 106*4c43a41eSKonstantin Porotchkin phy-mode = "10gbase-kr"; 107*4c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 108*4c43a41eSKonstantin Porotchkin phys = <&cp2_comphy4 0>; 109*4c43a41eSKonstantin Porotchkin managed = "in-band-status"; 110*4c43a41eSKonstantin Porotchkin sfp = <&cp2_sfp_eth0>; 111*4c43a41eSKonstantin Porotchkin}; 112*4c43a41eSKonstantin Porotchkin 113*4c43a41eSKonstantin Porotchkin&cp2_gpio1 { 114*4c43a41eSKonstantin Porotchkin status = "okay"; 115*4c43a41eSKonstantin Porotchkin}; 116*4c43a41eSKonstantin Porotchkin 117*4c43a41eSKonstantin Porotchkin&cp2_gpio2 { 118*4c43a41eSKonstantin Porotchkin status = "okay"; 119*4c43a41eSKonstantin Porotchkin}; 120*4c43a41eSKonstantin Porotchkin 121*4c43a41eSKonstantin Porotchkin&cp2_i2c0 { 122*4c43a41eSKonstantin Porotchkin clock-frequency = <100000>; 123*4c43a41eSKonstantin Porotchkin 124*4c43a41eSKonstantin Porotchkin /* SLM-1521-V2 - U3 */ 125*4c43a41eSKonstantin Porotchkin i2c-mux@72 { 126*4c43a41eSKonstantin Porotchkin compatible = "nxp,pca9544"; 127*4c43a41eSKonstantin Porotchkin #address-cells = <1>; 128*4c43a41eSKonstantin Porotchkin #size-cells = <0>; 129*4c43a41eSKonstantin Porotchkin reg = <0x72>; 130*4c43a41eSKonstantin Porotchkin cp2_sfpp0_i2c: i2c@0 { 131*4c43a41eSKonstantin Porotchkin #address-cells = <1>; 132*4c43a41eSKonstantin Porotchkin #size-cells = <0>; 133*4c43a41eSKonstantin Porotchkin reg = <0>; 134*4c43a41eSKonstantin Porotchkin }; 135*4c43a41eSKonstantin Porotchkin 136*4c43a41eSKonstantin Porotchkin i2c@1 { 137*4c43a41eSKonstantin Porotchkin #address-cells = <1>; 138*4c43a41eSKonstantin Porotchkin #size-cells = <0>; 139*4c43a41eSKonstantin Porotchkin reg = <1>; 140*4c43a41eSKonstantin Porotchkin /* U12 */ 141*4c43a41eSKonstantin Porotchkin cp2_module_expander1: pca9555@21 { 142*4c43a41eSKonstantin Porotchkin compatible = "nxp,pca9555"; 143*4c43a41eSKonstantin Porotchkin pinctrl-names = "default"; 144*4c43a41eSKonstantin Porotchkin gpio-controller; 145*4c43a41eSKonstantin Porotchkin #gpio-cells = <2>; 146*4c43a41eSKonstantin Porotchkin reg = <0x21>; 147*4c43a41eSKonstantin Porotchkin }; 148*4c43a41eSKonstantin Porotchkin }; 149*4c43a41eSKonstantin Porotchkin }; 150*4c43a41eSKonstantin Porotchkin}; 151*4c43a41eSKonstantin Porotchkin 152*4c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON6 */ 153*4c43a41eSKonstantin Porotchkin&cp2_pcie0 { 154*4c43a41eSKonstantin Porotchkin status = "okay"; 155*4c43a41eSKonstantin Porotchkin num-lanes = <2>; 156*4c43a41eSKonstantin Porotchkin num-viewport = <8>; 157*4c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 158*4c43a41eSKonstantin Porotchkin phys = <&cp2_comphy0 0 159*4c43a41eSKonstantin Porotchkin &cp2_comphy1 0>; 160*4c43a41eSKonstantin Porotchkin}; 161*4c43a41eSKonstantin Porotchkin 162*4c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON8 */ 163*4c43a41eSKonstantin Porotchkin&cp2_pcie2 { 164*4c43a41eSKonstantin Porotchkin status = "okay"; 165*4c43a41eSKonstantin Porotchkin num-lanes = <1>; 166*4c43a41eSKonstantin Porotchkin num-viewport = <8>; 167*4c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 168*4c43a41eSKonstantin Porotchkin phys = <&cp2_comphy5 2>; 169*4c43a41eSKonstantin Porotchkin}; 170*4c43a41eSKonstantin Porotchkin 171*4c43a41eSKonstantin Porotchkin&cp2_sata0 { 172*4c43a41eSKonstantin Porotchkin status = "okay"; 173*4c43a41eSKonstantin Porotchkin 174*4c43a41eSKonstantin Porotchkin /* SLM-1521-V2, CON4 */ 175*4c43a41eSKonstantin Porotchkin sata-port@0 { 176*4c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 177*4c43a41eSKonstantin Porotchkin phys = <&cp2_comphy2 0>; 178*4c43a41eSKonstantin Porotchkin }; 179*4c43a41eSKonstantin Porotchkin}; 180*4c43a41eSKonstantin Porotchkin 181*4c43a41eSKonstantin Porotchkin/* CON 2 on SLM-1683 - microSD */ 182*4c43a41eSKonstantin Porotchkin&cp2_sdhci0 { 183*4c43a41eSKonstantin Porotchkin status = "okay"; 184*4c43a41eSKonstantin Porotchkin pinctrl-names = "default"; 185*4c43a41eSKonstantin Porotchkin pinctrl-0 = <&cp2_sdhci_pins>; 186*4c43a41eSKonstantin Porotchkin bus-width = <4>; 187*4c43a41eSKonstantin Porotchkin cd-gpios = <&cp2_gpio2 23 GPIO_ACTIVE_LOW>; 188*4c43a41eSKonstantin Porotchkin vqmmc-supply = <&cp2_reg_sd_vccq>; 189*4c43a41eSKonstantin Porotchkin}; 190*4c43a41eSKonstantin Porotchkin 191*4c43a41eSKonstantin Porotchkin&cp2_syscon0 { 192*4c43a41eSKonstantin Porotchkin cp2_pinctrl: pinctrl { 193*4c43a41eSKonstantin Porotchkin compatible = "marvell,cp115-standalone-pinctrl"; 194*4c43a41eSKonstantin Porotchkin 195*4c43a41eSKonstantin Porotchkin cp2_i2c0_pins: cp2-i2c-pins-0 { 196*4c43a41eSKonstantin Porotchkin marvell,pins = "mpp37", "mpp38"; 197*4c43a41eSKonstantin Porotchkin marvell,function = "i2c0"; 198*4c43a41eSKonstantin Porotchkin }; 199*4c43a41eSKonstantin Porotchkin cp2_sdhci_pins: cp2-sdhi-pins-0 { 200*4c43a41eSKonstantin Porotchkin marvell,pins = "mpp56", "mpp57", "mpp58", 201*4c43a41eSKonstantin Porotchkin "mpp59", "mpp60", "mpp61"; 202*4c43a41eSKonstantin Porotchkin marvell,function = "sdio"; 203*4c43a41eSKonstantin Porotchkin }; 204*4c43a41eSKonstantin Porotchkin }; 205*4c43a41eSKonstantin Porotchkin}; 206*4c43a41eSKonstantin Porotchkin 207*4c43a41eSKonstantin Porotchkin&cp2_utmi { 208*4c43a41eSKonstantin Porotchkin status = "okay"; 209*4c43a41eSKonstantin Porotchkin}; 210*4c43a41eSKonstantin Porotchkin 211*4c43a41eSKonstantin Porotchkin&cp2_usb3_0 { 212*4c43a41eSKonstantin Porotchkin status = "okay"; 213*4c43a41eSKonstantin Porotchkin usb-phy = <&cp2_usb3_0_phy0>; 214*4c43a41eSKonstantin Porotchkin phys = <&cp2_utmi0>; 215*4c43a41eSKonstantin Porotchkin phy-names = "usb"; 216*4c43a41eSKonstantin Porotchkin dr_mode = "host"; 217*4c43a41eSKonstantin Porotchkin}; 218*4c43a41eSKonstantin Porotchkin 219*4c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON11 */ 220*4c43a41eSKonstantin Porotchkin&cp2_usb3_1 { 221*4c43a41eSKonstantin Porotchkin status = "okay"; 222*4c43a41eSKonstantin Porotchkin usb-phy = <&cp2_usb3_0_phy1>; 223*4c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 224*4c43a41eSKonstantin Porotchkin phys = <&cp2_comphy3 1>, <&cp2_utmi1>; 225*4c43a41eSKonstantin Porotchkin phy-names = "usb", "utmi"; 226*4c43a41eSKonstantin Porotchkin dr_mode = "host"; 227*4c43a41eSKonstantin Porotchkin}; 228