1292816a6SGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2bf32f2aeSHanna Hawa/* 3bf32f2aeSHanna Hawa * Copyright (C) 2017 Marvell Technology Group Ltd. 4bf32f2aeSHanna Hawa * 5bf32f2aeSHanna Hawa * Device Tree file for Marvell Armada AP810 OCTA cores. 6bf32f2aeSHanna Hawa */ 7bf32f2aeSHanna Hawa 8bf32f2aeSHanna Hawa#include "armada-ap810-ap0.dtsi" 9bf32f2aeSHanna Hawa 10bf32f2aeSHanna Hawa/ { 11bf32f2aeSHanna Hawa cpus { 12bf32f2aeSHanna Hawa #address-cells = <1>; 13bf32f2aeSHanna Hawa #size-cells = <0>; 14bf32f2aeSHanna Hawa compatible = "marvell,armada-ap810-octa"; 15bf32f2aeSHanna Hawa 16d8bcaabeSRob Herring cpu@0 { 17bf32f2aeSHanna Hawa device_type = "cpu"; 18bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 19bf32f2aeSHanna Hawa reg = <0x000>; 20bf32f2aeSHanna Hawa enable-method = "psci"; 21bf32f2aeSHanna Hawa }; 22d8bcaabeSRob Herring cpu@1 { 23bf32f2aeSHanna Hawa device_type = "cpu"; 24bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 25bf32f2aeSHanna Hawa reg = <0x001>; 26bf32f2aeSHanna Hawa enable-method = "psci"; 27bf32f2aeSHanna Hawa }; 28bf32f2aeSHanna Hawa cpu@100 { 29bf32f2aeSHanna Hawa device_type = "cpu"; 30bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 31bf32f2aeSHanna Hawa reg = <0x100>; 32bf32f2aeSHanna Hawa enable-method = "psci"; 33bf32f2aeSHanna Hawa }; 34bf32f2aeSHanna Hawa cpu@101 { 35bf32f2aeSHanna Hawa device_type = "cpu"; 36bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 37bf32f2aeSHanna Hawa reg = <0x101>; 38bf32f2aeSHanna Hawa enable-method = "psci"; 39bf32f2aeSHanna Hawa }; 40bf32f2aeSHanna Hawa cpu@200 { 41bf32f2aeSHanna Hawa device_type = "cpu"; 42bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 43bf32f2aeSHanna Hawa reg = <0x200>; 44bf32f2aeSHanna Hawa enable-method = "psci"; 45bf32f2aeSHanna Hawa }; 46bf32f2aeSHanna Hawa cpu@201 { 47bf32f2aeSHanna Hawa device_type = "cpu"; 48bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 49bf32f2aeSHanna Hawa reg = <0x201>; 50bf32f2aeSHanna Hawa enable-method = "psci"; 51bf32f2aeSHanna Hawa }; 52bf32f2aeSHanna Hawa cpu@300 { 53bf32f2aeSHanna Hawa device_type = "cpu"; 54bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 55bf32f2aeSHanna Hawa reg = <0x300>; 56bf32f2aeSHanna Hawa enable-method = "psci"; 57bf32f2aeSHanna Hawa }; 58bf32f2aeSHanna Hawa cpu@301 { 59bf32f2aeSHanna Hawa device_type = "cpu"; 60bf32f2aeSHanna Hawa compatible = "arm,cortex-a72", "arm,armv8"; 61bf32f2aeSHanna Hawa reg = <0x301>; 62bf32f2aeSHanna Hawa enable-method = "psci"; 63bf32f2aeSHanna Hawa }; 64bf32f2aeSHanna Hawa }; 65bf32f2aeSHanna Hawa}; 66