1ec7e5a56SThomas Petazzoni/*
2ec7e5a56SThomas Petazzoni * Copyright (C) 2016 Marvell Technology Group Ltd.
3ec7e5a56SThomas Petazzoni *
4ec7e5a56SThomas Petazzoni * This file is dual-licensed: you can use it either under the terms
5ec7e5a56SThomas Petazzoni * of the GPLv2 or the X11 license, at your option. Note that this dual
6ec7e5a56SThomas Petazzoni * licensing only applies to this file, and not this project as a
7ec7e5a56SThomas Petazzoni * whole.
8ec7e5a56SThomas Petazzoni *
9ec7e5a56SThomas Petazzoni *  a) This library is free software; you can redistribute it and/or
10ec7e5a56SThomas Petazzoni *     modify it under the terms of the GNU General Public License as
11ec7e5a56SThomas Petazzoni *     published by the Free Software Foundation; either version 2 of the
12ec7e5a56SThomas Petazzoni *     License, or (at your option) any later version.
13ec7e5a56SThomas Petazzoni *
14ec7e5a56SThomas Petazzoni *     This library is distributed in the hope that it will be useful,
15ec7e5a56SThomas Petazzoni *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16ec7e5a56SThomas Petazzoni *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17ec7e5a56SThomas Petazzoni *     GNU General Public License for more details.
18ec7e5a56SThomas Petazzoni *
19ec7e5a56SThomas Petazzoni * Or, alternatively,
20ec7e5a56SThomas Petazzoni *
21ec7e5a56SThomas Petazzoni *  b) Permission is hereby granted, free of charge, to any person
22ec7e5a56SThomas Petazzoni *     obtaining a copy of this software and associated documentation
23ec7e5a56SThomas Petazzoni *     files (the "Software"), to deal in the Software without
24ec7e5a56SThomas Petazzoni *     restriction, including without limitation the rights to use,
25ec7e5a56SThomas Petazzoni *     copy, modify, merge, publish, distribute, sublicense, and/or
26ec7e5a56SThomas Petazzoni *     sell copies of the Software, and to permit persons to whom the
27ec7e5a56SThomas Petazzoni *     Software is furnished to do so, subject to the following
28ec7e5a56SThomas Petazzoni *     conditions:
29ec7e5a56SThomas Petazzoni *
30ec7e5a56SThomas Petazzoni *     The above copyright notice and this permission notice shall be
31ec7e5a56SThomas Petazzoni *     included in all copies or substantial portions of the Software.
32ec7e5a56SThomas Petazzoni *
33ec7e5a56SThomas Petazzoni *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34ec7e5a56SThomas Petazzoni *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35ec7e5a56SThomas Petazzoni *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36ec7e5a56SThomas Petazzoni *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37ec7e5a56SThomas Petazzoni *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38ec7e5a56SThomas Petazzoni *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39ec7e5a56SThomas Petazzoni *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40ec7e5a56SThomas Petazzoni *     OTHER DEALINGS IN THE SOFTWARE.
41ec7e5a56SThomas Petazzoni */
42ec7e5a56SThomas Petazzoni
43ec7e5a56SThomas Petazzoni/*
44ec7e5a56SThomas Petazzoni * Device Tree file for Marvell Armada AP806.
45ec7e5a56SThomas Petazzoni */
46ec7e5a56SThomas Petazzoni
47ec7e5a56SThomas Petazzoni#include <dt-bindings/interrupt-controller/arm-gic.h>
48ec7e5a56SThomas Petazzoni
49ec7e5a56SThomas Petazzoni/dts-v1/;
50ec7e5a56SThomas Petazzoni
51ec7e5a56SThomas Petazzoni/ {
52ec7e5a56SThomas Petazzoni	model = "Marvell Armada AP806";
53ec7e5a56SThomas Petazzoni	compatible = "marvell,armada-ap806";
54ec7e5a56SThomas Petazzoni	#address-cells = <2>;
55ec7e5a56SThomas Petazzoni	#size-cells = <2>;
56ec7e5a56SThomas Petazzoni
57bf151162SThomas Petazzoni	aliases {
58bf151162SThomas Petazzoni		serial0 = &uart0;
59bf151162SThomas Petazzoni		serial1 = &uart1;
6063dac0f4SGregory CLEMENT		gpio0 = &ap_gpio;
61bf151162SThomas Petazzoni	};
62bf151162SThomas Petazzoni
63ec7e5a56SThomas Petazzoni	psci {
64ec7e5a56SThomas Petazzoni		compatible = "arm,psci-0.2";
65ec7e5a56SThomas Petazzoni		method = "smc";
66ec7e5a56SThomas Petazzoni	};
67ec7e5a56SThomas Petazzoni
68ec7e5a56SThomas Petazzoni	ap806 {
69ec7e5a56SThomas Petazzoni		#address-cells = <2>;
70ec7e5a56SThomas Petazzoni		#size-cells = <2>;
71ec7e5a56SThomas Petazzoni		compatible = "simple-bus";
72ec7e5a56SThomas Petazzoni		interrupt-parent = <&gic>;
73ec7e5a56SThomas Petazzoni		ranges;
74ec7e5a56SThomas Petazzoni
7570347888SGregory CLEMENT		config-space@f0000000 {
76ec7e5a56SThomas Petazzoni			#address-cells = <1>;
77ec7e5a56SThomas Petazzoni			#size-cells = <1>;
78ec7e5a56SThomas Petazzoni			compatible = "simple-bus";
79ec7e5a56SThomas Petazzoni			ranges = <0x0 0x0 0xf0000000 0x1000000>;
80ec7e5a56SThomas Petazzoni
81ec7e5a56SThomas Petazzoni			gic: interrupt-controller@210000 {
82ec7e5a56SThomas Petazzoni				compatible = "arm,gic-400";
83ec7e5a56SThomas Petazzoni				#interrupt-cells = <3>;
84ec7e5a56SThomas Petazzoni				#address-cells = <1>;
85ec7e5a56SThomas Petazzoni				#size-cells = <1>;
86ec7e5a56SThomas Petazzoni				ranges;
87ec7e5a56SThomas Petazzoni				interrupt-controller;
88ec7e5a56SThomas Petazzoni				interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
89ec7e5a56SThomas Petazzoni				reg = <0x210000 0x10000>,
90ec7e5a56SThomas Petazzoni				      <0x220000 0x20000>,
91ec7e5a56SThomas Petazzoni				      <0x240000 0x20000>,
92ec7e5a56SThomas Petazzoni				      <0x260000 0x20000>;
93ec7e5a56SThomas Petazzoni
94ec7e5a56SThomas Petazzoni				gic_v2m0: v2m@280000 {
95ec7e5a56SThomas Petazzoni					compatible = "arm,gic-v2m-frame";
96ec7e5a56SThomas Petazzoni					msi-controller;
97ec7e5a56SThomas Petazzoni					reg = <0x280000 0x1000>;
98ec7e5a56SThomas Petazzoni					arm,msi-base-spi = <160>;
99ec7e5a56SThomas Petazzoni					arm,msi-num-spis = <32>;
100ec7e5a56SThomas Petazzoni				};
101ec7e5a56SThomas Petazzoni				gic_v2m1: v2m@290000 {
102ec7e5a56SThomas Petazzoni					compatible = "arm,gic-v2m-frame";
103ec7e5a56SThomas Petazzoni					msi-controller;
104ec7e5a56SThomas Petazzoni					reg = <0x290000 0x1000>;
105ec7e5a56SThomas Petazzoni					arm,msi-base-spi = <192>;
106ec7e5a56SThomas Petazzoni					arm,msi-num-spis = <32>;
107ec7e5a56SThomas Petazzoni				};
108ec7e5a56SThomas Petazzoni				gic_v2m2: v2m@2a0000 {
109ec7e5a56SThomas Petazzoni					compatible = "arm,gic-v2m-frame";
110ec7e5a56SThomas Petazzoni					msi-controller;
111ec7e5a56SThomas Petazzoni					reg = <0x2a0000 0x1000>;
112ec7e5a56SThomas Petazzoni					arm,msi-base-spi = <224>;
113ec7e5a56SThomas Petazzoni					arm,msi-num-spis = <32>;
114ec7e5a56SThomas Petazzoni				};
115ec7e5a56SThomas Petazzoni				gic_v2m3: v2m@2b0000 {
116ec7e5a56SThomas Petazzoni					compatible = "arm,gic-v2m-frame";
117ec7e5a56SThomas Petazzoni					msi-controller;
118ec7e5a56SThomas Petazzoni					reg = <0x2b0000 0x1000>;
119ec7e5a56SThomas Petazzoni					arm,msi-base-spi = <256>;
120ec7e5a56SThomas Petazzoni					arm,msi-num-spis = <32>;
121ec7e5a56SThomas Petazzoni				};
122ec7e5a56SThomas Petazzoni			};
123ec7e5a56SThomas Petazzoni
124ec7e5a56SThomas Petazzoni			timer {
125ec7e5a56SThomas Petazzoni				compatible = "arm,armv8-timer";
126f2a89d3bSMarc Zyngier				interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
127f2a89d3bSMarc Zyngier					     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
128f2a89d3bSMarc Zyngier					     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
129f2a89d3bSMarc Zyngier					     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
130ec7e5a56SThomas Petazzoni			};
131ec7e5a56SThomas Petazzoni
13298e45c16SThomas Petazzoni			pmu {
13398e45c16SThomas Petazzoni				compatible = "arm,cortex-a72-pmu";
13498e45c16SThomas Petazzoni				interrupt-parent = <&pic>;
13598e45c16SThomas Petazzoni				interrupts = <17>;
13698e45c16SThomas Petazzoni			};
13798e45c16SThomas Petazzoni
138ec7e5a56SThomas Petazzoni			odmi: odmi@300000 {
139ec7e5a56SThomas Petazzoni				compatible = "marvell,odmi-controller";
140ec7e5a56SThomas Petazzoni				interrupt-controller;
141ec7e5a56SThomas Petazzoni				msi-controller;
142ec7e5a56SThomas Petazzoni				marvell,odmi-frames = <4>;
143ec7e5a56SThomas Petazzoni				reg = <0x300000 0x4000>,
144ec7e5a56SThomas Petazzoni				      <0x304000 0x4000>,
145ec7e5a56SThomas Petazzoni				      <0x308000 0x4000>,
146ec7e5a56SThomas Petazzoni				      <0x30C000 0x4000>;
147ec7e5a56SThomas Petazzoni				marvell,spi-base = <128>, <136>, <144>, <152>;
148ec7e5a56SThomas Petazzoni			};
149ec7e5a56SThomas Petazzoni
1506ef84a82SThomas Petazzoni			gicp: gicp@3f0040 {
1516ef84a82SThomas Petazzoni				compatible = "marvell,ap806-gicp";
1526ef84a82SThomas Petazzoni				reg = <0x3f0040 0x10>;
1536ef84a82SThomas Petazzoni				marvell,spi-ranges = <64 64>, <288 64>;
1546ef84a82SThomas Petazzoni				msi-controller;
1556ef84a82SThomas Petazzoni			};
1566ef84a82SThomas Petazzoni
15798e45c16SThomas Petazzoni			pic: interrupt-controller@3f0100 {
15898e45c16SThomas Petazzoni				compatible = "marvell,armada-8k-pic";
15998e45c16SThomas Petazzoni				reg = <0x3f0100 0x10>;
16098e45c16SThomas Petazzoni				#interrupt-cells = <1>;
16198e45c16SThomas Petazzoni				interrupt-controller;
16298e45c16SThomas Petazzoni				interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
16398e45c16SThomas Petazzoni			};
16498e45c16SThomas Petazzoni
1651093e5f6SAndreas Färber			xor@400000 {
1667eec6594SThomas Petazzoni				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
167b5ebfad8SThomas Petazzoni				reg = <0x400000 0x1000>,
168b5ebfad8SThomas Petazzoni				      <0x410000 0x1000>;
169b5ebfad8SThomas Petazzoni				msi-parent = <&gic_v2m0>;
170a6d8bd91SAntoine Tenart				clocks = <&ap_clk 3>;
171b5ebfad8SThomas Petazzoni				dma-coherent;
172b5ebfad8SThomas Petazzoni			};
173b5ebfad8SThomas Petazzoni
1741093e5f6SAndreas Färber			xor@420000 {
1757eec6594SThomas Petazzoni				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
176b5ebfad8SThomas Petazzoni				reg = <0x420000 0x1000>,
177b5ebfad8SThomas Petazzoni				      <0x430000 0x1000>;
178b5ebfad8SThomas Petazzoni				msi-parent = <&gic_v2m0>;
179a6d8bd91SAntoine Tenart				clocks = <&ap_clk 3>;
180b5ebfad8SThomas Petazzoni				dma-coherent;
181b5ebfad8SThomas Petazzoni			};
182b5ebfad8SThomas Petazzoni
1831093e5f6SAndreas Färber			xor@440000 {
1847eec6594SThomas Petazzoni				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
185b5ebfad8SThomas Petazzoni				reg = <0x440000 0x1000>,
186b5ebfad8SThomas Petazzoni				      <0x450000 0x1000>;
187b5ebfad8SThomas Petazzoni				msi-parent = <&gic_v2m0>;
188a6d8bd91SAntoine Tenart				clocks = <&ap_clk 3>;
189b5ebfad8SThomas Petazzoni				dma-coherent;
190b5ebfad8SThomas Petazzoni			};
191b5ebfad8SThomas Petazzoni
1921093e5f6SAndreas Färber			xor@460000 {
1937eec6594SThomas Petazzoni				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
194b5ebfad8SThomas Petazzoni				reg = <0x460000 0x1000>,
195b5ebfad8SThomas Petazzoni				      <0x470000 0x1000>;
196b5ebfad8SThomas Petazzoni				msi-parent = <&gic_v2m0>;
197a6d8bd91SAntoine Tenart				clocks = <&ap_clk 3>;
198b5ebfad8SThomas Petazzoni				dma-coherent;
199b5ebfad8SThomas Petazzoni			};
200b5ebfad8SThomas Petazzoni
201ec7e5a56SThomas Petazzoni			spi0: spi@510600 {
202ec7e5a56SThomas Petazzoni				compatible = "marvell,armada-380-spi";
203ec7e5a56SThomas Petazzoni				reg = <0x510600 0x50>;
204ec7e5a56SThomas Petazzoni				#address-cells = <1>;
205ec7e5a56SThomas Petazzoni				#size-cells = <0>;
206ec7e5a56SThomas Petazzoni				cell-index = <0>;
207ec7e5a56SThomas Petazzoni				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
2083675fb59SGregory CLEMENT				clocks = <&ap_clk 3>;
209ec7e5a56SThomas Petazzoni				status = "disabled";
210ec7e5a56SThomas Petazzoni			};
211ec7e5a56SThomas Petazzoni
212ec7e5a56SThomas Petazzoni			i2c0: i2c@511000 {
213d8b330a3SThomas Petazzoni				compatible = "marvell,mv78230-i2c";
214ec7e5a56SThomas Petazzoni				reg = <0x511000 0x20>;
215ec7e5a56SThomas Petazzoni				#address-cells = <1>;
216ec7e5a56SThomas Petazzoni				#size-cells = <0>;
217ec7e5a56SThomas Petazzoni				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
218ec7e5a56SThomas Petazzoni				timeout-ms = <1000>;
2193675fb59SGregory CLEMENT				clocks = <&ap_clk 3>;
220ec7e5a56SThomas Petazzoni				status = "disabled";
221ec7e5a56SThomas Petazzoni			};
222ec7e5a56SThomas Petazzoni
223037ad463SAndreas Färber			uart0: serial@512000 {
224ec7e5a56SThomas Petazzoni				compatible = "snps,dw-apb-uart";
225ec7e5a56SThomas Petazzoni				reg = <0x512000 0x100>;
226ec7e5a56SThomas Petazzoni				reg-shift = <2>;
227ec7e5a56SThomas Petazzoni				interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
228ec7e5a56SThomas Petazzoni				reg-io-width = <1>;
2293675fb59SGregory CLEMENT				clocks = <&ap_clk 3>;
230ec7e5a56SThomas Petazzoni				status = "disabled";
231ec7e5a56SThomas Petazzoni			};
232ec7e5a56SThomas Petazzoni
233037ad463SAndreas Färber			uart1: serial@512100 {
234ec7e5a56SThomas Petazzoni				compatible = "snps,dw-apb-uart";
235ec7e5a56SThomas Petazzoni				reg = <0x512100 0x100>;
236ec7e5a56SThomas Petazzoni				reg-shift = <2>;
237ec7e5a56SThomas Petazzoni				interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
238ec7e5a56SThomas Petazzoni				reg-io-width = <1>;
2393675fb59SGregory CLEMENT				clocks = <&ap_clk 3>;
240ec7e5a56SThomas Petazzoni				status = "disabled";
241ec7e5a56SThomas Petazzoni
242ec7e5a56SThomas Petazzoni			};
243ec7e5a56SThomas Petazzoni
244910b4c5cSGregory CLEMENT			ap_sdhci0: sdhci@6e0000 {
245910b4c5cSGregory CLEMENT				compatible = "marvell,armada-ap806-sdhci";
246910b4c5cSGregory CLEMENT				reg = <0x6e0000 0x300>;
247910b4c5cSGregory CLEMENT				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
248910b4c5cSGregory CLEMENT				clock-names = "core";
2493675fb59SGregory CLEMENT				clocks = <&ap_clk 4>;
250910b4c5cSGregory CLEMENT				dma-coherent;
251910b4c5cSGregory CLEMENT				marvell,xenon-phy-slow-mode;
252910b4c5cSGregory CLEMENT				status = "disabled";
253910b4c5cSGregory CLEMENT			};
254910b4c5cSGregory CLEMENT
255bb233a93SThomas Petazzoni			ap_syscon: system-controller@6f4000 {
2563675fb59SGregory CLEMENT				compatible = "syscon", "simple-mfd";
257bb233a93SThomas Petazzoni				reg = <0x6f4000 0x1000>;
2583675fb59SGregory CLEMENT
2593675fb59SGregory CLEMENT				ap_clk: clock {
2603675fb59SGregory CLEMENT					compatible = "marvell,ap806-clock";
2613675fb59SGregory CLEMENT					#clock-cells = <1>;
2623675fb59SGregory CLEMENT				};
263ae701b60SGregory CLEMENT
264ae701b60SGregory CLEMENT				ap_pinctrl: pinctrl {
265ae701b60SGregory CLEMENT					compatible = "marvell,ap806-pinctrl";
266ae701b60SGregory CLEMENT				};
26763dac0f4SGregory CLEMENT
26863dac0f4SGregory CLEMENT				ap_gpio: gpio {
26963dac0f4SGregory CLEMENT					compatible = "marvell,armada-8k-gpio";
27063dac0f4SGregory CLEMENT					offset = <0x1040>;
271a0ac89b5SThomas Petazzoni					ngpios = <20>;
27263dac0f4SGregory CLEMENT					gpio-controller;
27363dac0f4SGregory CLEMENT					#gpio-cells = <2>;
274a0ac89b5SThomas Petazzoni					gpio-ranges = <&ap_pinctrl 0 0 20>;
27563dac0f4SGregory CLEMENT				};
276d2b78fb6SThomas Petazzoni			};
277ec7e5a56SThomas Petazzoni		};
278ec7e5a56SThomas Petazzoni	};
279ec7e5a56SThomas Petazzoni};
280