1292816a6SGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2ec7e5a56SThomas Petazzoni/*
3ec7e5a56SThomas Petazzoni * Copyright (C) 2016 Marvell Technology Group Ltd.
4ec7e5a56SThomas Petazzoni *
5ec7e5a56SThomas Petazzoni * Device Tree file for Marvell Armada AP806.
6ec7e5a56SThomas Petazzoni */
7ec7e5a56SThomas Petazzoni
8ec7e5a56SThomas Petazzoni#include "armada-ap806.dtsi"
9ec7e5a56SThomas Petazzoni
10ec7e5a56SThomas Petazzoni/ {
11ec7e5a56SThomas Petazzoni	model = "Marvell Armada AP806 Quad";
12ec7e5a56SThomas Petazzoni	compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";
13ec7e5a56SThomas Petazzoni
14ec7e5a56SThomas Petazzoni	cpus {
15ec7e5a56SThomas Petazzoni		#address-cells = <1>;
16ec7e5a56SThomas Petazzoni		#size-cells = <0>;
17ec7e5a56SThomas Petazzoni
1892e5d4e9SGregory CLEMENT		cpu0: cpu@0 {
19ec7e5a56SThomas Petazzoni			device_type = "cpu";
2031af04cdSRob Herring			compatible = "arm,cortex-a72";
21ec7e5a56SThomas Petazzoni			reg = <0x000>;
22ec7e5a56SThomas Petazzoni			enable-method = "psci";
23ec7e5a56SThomas Petazzoni		};
2492e5d4e9SGregory CLEMENT		cpu1: cpu@1 {
25ec7e5a56SThomas Petazzoni			device_type = "cpu";
2631af04cdSRob Herring			compatible = "arm,cortex-a72";
27ec7e5a56SThomas Petazzoni			reg = <0x001>;
28ec7e5a56SThomas Petazzoni			enable-method = "psci";
29ec7e5a56SThomas Petazzoni		};
3092e5d4e9SGregory CLEMENT		cpu2: cpu@100 {
31ec7e5a56SThomas Petazzoni			device_type = "cpu";
3231af04cdSRob Herring			compatible = "arm,cortex-a72";
33ec7e5a56SThomas Petazzoni			reg = <0x100>;
34ec7e5a56SThomas Petazzoni			enable-method = "psci";
35ec7e5a56SThomas Petazzoni		};
3692e5d4e9SGregory CLEMENT		cpu3: cpu@101 {
37ec7e5a56SThomas Petazzoni			device_type = "cpu";
3831af04cdSRob Herring			compatible = "arm,cortex-a72";
39ec7e5a56SThomas Petazzoni			reg = <0x101>;
40ec7e5a56SThomas Petazzoni			enable-method = "psci";
41ec7e5a56SThomas Petazzoni		};
42ec7e5a56SThomas Petazzoni	};
43ec7e5a56SThomas Petazzoni};
44