1ae701b60SGregory CLEMENT/* 2ae701b60SGregory CLEMENT * Copyright (C) 2017 Marvell Technology Group Ltd. 3ae701b60SGregory CLEMENT * 4ae701b60SGregory CLEMENT * This file is dual-licensed: you can use it either under the terms 5ae701b60SGregory CLEMENT * of the GPLv2 or the X11 license, at your option. Note that this dual 6ae701b60SGregory CLEMENT * licensing only applies to this file, and not this project as a 7ae701b60SGregory CLEMENT * whole. 8ae701b60SGregory CLEMENT * 9ae701b60SGregory CLEMENT * a) This library is free software; you can redistribute it and/or 10ae701b60SGregory CLEMENT * modify it under the terms of the GNU General Public License as 11ae701b60SGregory CLEMENT * published by the Free Software Foundation; either version 2 of the 12ae701b60SGregory CLEMENT * License, or (at your option) any later version. 13ae701b60SGregory CLEMENT * 14ae701b60SGregory CLEMENT * This library is distributed in the hope that it will be useful, 15ae701b60SGregory CLEMENT * but WITHOUT ANY WARRANTY; without even the implied warranty of 16ae701b60SGregory CLEMENT * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17ae701b60SGregory CLEMENT * GNU General Public License for more details. 18ae701b60SGregory CLEMENT * 19ae701b60SGregory CLEMENT * Or, alternatively, 20ae701b60SGregory CLEMENT * 21ae701b60SGregory CLEMENT * b) Permission is hereby granted, free of charge, to any person 22ae701b60SGregory CLEMENT * obtaining a copy of this software and associated documentation 23ae701b60SGregory CLEMENT * files (the "Software"), to deal in the Software without 24ae701b60SGregory CLEMENT * restriction, including without limitation the rights to use, 25ae701b60SGregory CLEMENT * copy, modify, merge, publish, distribute, sublicense, and/or 26ae701b60SGregory CLEMENT * sell copies of the Software, and to permit persons to whom the 27ae701b60SGregory CLEMENT * Software is furnished to do so, subject to the following 28ae701b60SGregory CLEMENT * conditions: 29ae701b60SGregory CLEMENT * 30ae701b60SGregory CLEMENT * The above copyright notice and this permission notice shall be 31ae701b60SGregory CLEMENT * included in all copies or substantial portions of the Software. 32ae701b60SGregory CLEMENT * 33ae701b60SGregory CLEMENT * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34ae701b60SGregory CLEMENT * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35ae701b60SGregory CLEMENT * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36ae701b60SGregory CLEMENT * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37ae701b60SGregory CLEMENT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38ae701b60SGregory CLEMENT * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39ae701b60SGregory CLEMENT * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40ae701b60SGregory CLEMENT * OTHER DEALINGS IN THE SOFTWARE. 41ae701b60SGregory CLEMENT */ 42ae701b60SGregory CLEMENT 43ae701b60SGregory CLEMENT/* 44ae701b60SGregory CLEMENT * Device Tree file for the Armada 80x0 SoC family 45ae701b60SGregory CLEMENT */ 46ae701b60SGregory CLEMENT 4763dac0f4SGregory CLEMENT/ { 4863dac0f4SGregory CLEMENT aliases { 4991f1be92SThomas Petazzoni gpio1 = &cp1_gpio1; 5091f1be92SThomas Petazzoni gpio2 = &cp0_gpio2; 5191f1be92SThomas Petazzoni spi1 = &cp0_spi0; 5291f1be92SThomas Petazzoni spi2 = &cp0_spi1; 5391f1be92SThomas Petazzoni spi3 = &cp1_spi0; 5491f1be92SThomas Petazzoni spi4 = &cp1_spi1; 5563dac0f4SGregory CLEMENT }; 5663dac0f4SGregory CLEMENT}; 5763dac0f4SGregory CLEMENT 5872a3713fSThomas Petazzoni/* 5972a3713fSThomas Petazzoni * Instantiate the master CP110 6072a3713fSThomas Petazzoni */ 6191f1be92SThomas Petazzoni#define CP110_NAME cp0 6272a3713fSThomas Petazzoni#define CP110_BASE f2000000 6372a3713fSThomas Petazzoni#define CP110_PCIE_IO_BASE 0xf9000000 6472a3713fSThomas Petazzoni#define CP110_PCIE_MEM_BASE 0xf6000000 6572a3713fSThomas Petazzoni#define CP110_PCIE0_BASE f2600000 6672a3713fSThomas Petazzoni#define CP110_PCIE1_BASE f2620000 6772a3713fSThomas Petazzoni#define CP110_PCIE2_BASE f2640000 6872a3713fSThomas Petazzoni 6972a3713fSThomas Petazzoni#include "armada-cp110.dtsi" 7072a3713fSThomas Petazzoni 7172a3713fSThomas Petazzoni#undef CP110_NAME 7272a3713fSThomas Petazzoni#undef CP110_BASE 7372a3713fSThomas Petazzoni#undef CP110_PCIE_IO_BASE 7472a3713fSThomas Petazzoni#undef CP110_PCIE_MEM_BASE 7572a3713fSThomas Petazzoni#undef CP110_PCIE0_BASE 7672a3713fSThomas Petazzoni#undef CP110_PCIE1_BASE 7772a3713fSThomas Petazzoni#undef CP110_PCIE2_BASE 7872a3713fSThomas Petazzoni 7972a3713fSThomas Petazzoni/* 8072a3713fSThomas Petazzoni * Instantiate the slave CP110 8172a3713fSThomas Petazzoni */ 8291f1be92SThomas Petazzoni#define CP110_NAME cp1 8372a3713fSThomas Petazzoni#define CP110_BASE f4000000 8472a3713fSThomas Petazzoni#define CP110_PCIE_IO_BASE 0xfd000000 8572a3713fSThomas Petazzoni#define CP110_PCIE_MEM_BASE 0xfa000000 8672a3713fSThomas Petazzoni#define CP110_PCIE0_BASE f4600000 8772a3713fSThomas Petazzoni#define CP110_PCIE1_BASE f4620000 8872a3713fSThomas Petazzoni#define CP110_PCIE2_BASE f4640000 8972a3713fSThomas Petazzoni 9072a3713fSThomas Petazzoni#include "armada-cp110.dtsi" 9172a3713fSThomas Petazzoni 9272a3713fSThomas Petazzoni#undef CP110_NAME 9372a3713fSThomas Petazzoni#undef CP110_BASE 9472a3713fSThomas Petazzoni#undef CP110_PCIE_IO_BASE 9572a3713fSThomas Petazzoni#undef CP110_PCIE_MEM_BASE 9672a3713fSThomas Petazzoni#undef CP110_PCIE0_BASE 9772a3713fSThomas Petazzoni#undef CP110_PCIE1_BASE 9872a3713fSThomas Petazzoni#undef CP110_PCIE2_BASE 9972a3713fSThomas Petazzoni 10063dac0f4SGregory CLEMENT/* The 80x0 has two CP blocks, but uses only one block from each. */ 10191f1be92SThomas Petazzoni&cp1_gpio1 { 10263dac0f4SGregory CLEMENT status = "okay"; 10363dac0f4SGregory CLEMENT}; 10463dac0f4SGregory CLEMENT 10591f1be92SThomas Petazzoni&cp0_gpio2 { 10663dac0f4SGregory CLEMENT status = "okay"; 10763dac0f4SGregory CLEMENT}; 10863dac0f4SGregory CLEMENT 10991f1be92SThomas Petazzoni&cp0_syscon0 { 11091f1be92SThomas Petazzoni cp0_pinctrl: pinctrl { 11191f1be92SThomas Petazzoni compatible = "marvell,armada-8k-cp0-pinctrl"; 112ae701b60SGregory CLEMENT }; 113ae701b60SGregory CLEMENT}; 114ae701b60SGregory CLEMENT 11591f1be92SThomas Petazzoni&cp1_syscon0 { 11691f1be92SThomas Petazzoni cp1_pinctrl: pinctrl { 11791f1be92SThomas Petazzoni compatible = "marvell,armada-8k-cp1-pinctrl"; 1187b31e3adSMiquel Raynal 1197b31e3adSMiquel Raynal nand_pins: nand-pins { 1207b31e3adSMiquel Raynal marvell,pins = 1217b31e3adSMiquel Raynal "mpp0", "mpp1", "mpp2", "mpp3", 1227b31e3adSMiquel Raynal "mpp4", "mpp5", "mpp6", "mpp7", 1237b31e3adSMiquel Raynal "mpp8", "mpp9", "mpp10", "mpp11", 1247b31e3adSMiquel Raynal "mpp15", "mpp16", "mpp17", "mpp18", 1257b31e3adSMiquel Raynal "mpp19", "mpp20", "mpp21", "mpp22", 1267b31e3adSMiquel Raynal "mpp23", "mpp24", "mpp25", "mpp26", 1277b31e3adSMiquel Raynal "mpp27"; 1287b31e3adSMiquel Raynal marvell,function = "dev"; 1297b31e3adSMiquel Raynal }; 1307b31e3adSMiquel Raynal 1317b31e3adSMiquel Raynal nand_rb: nand-rb { 1327b31e3adSMiquel Raynal marvell,pins = "mpp13", "mpp12"; 1337b31e3adSMiquel Raynal marvell,function = "nf"; 1347b31e3adSMiquel Raynal }; 135ae701b60SGregory CLEMENT }; 136ae701b60SGregory CLEMENT}; 13772a3713fSThomas Petazzoni 13891f1be92SThomas Petazzoni&cp1_crypto { 13972a3713fSThomas Petazzoni /* 14072a3713fSThomas Petazzoni * The cryptographic engine found on the cp110 14172a3713fSThomas Petazzoni * master is enabled by default at the SoC 14272a3713fSThomas Petazzoni * level. Because it is not possible as of now 14372a3713fSThomas Petazzoni * to enable two cryptographic engines in 14472a3713fSThomas Petazzoni * parallel, disable this one by default. 14572a3713fSThomas Petazzoni */ 14672a3713fSThomas Petazzoni status = "disabled"; 14772a3713fSThomas Petazzoni}; 148