1adbc3695SGregory CLEMENT/* 2adbc3695SGregory CLEMENT * Device Tree Include file for Marvell Armada 37xx family of SoCs. 3adbc3695SGregory CLEMENT * 4adbc3695SGregory CLEMENT * Copyright (C) 2016 Marvell 5adbc3695SGregory CLEMENT * 6adbc3695SGregory CLEMENT * Gregory CLEMENT <gregory.clement@free-electrons.com> 7adbc3695SGregory CLEMENT * 8adbc3695SGregory CLEMENT * This file is dual-licensed: you can use it either under the terms 9adbc3695SGregory CLEMENT * of the GPL or the X11 license, at your option. Note that this dual 10adbc3695SGregory CLEMENT * licensing only applies to this file, and not this project as a 11adbc3695SGregory CLEMENT * whole. 12adbc3695SGregory CLEMENT * 13adbc3695SGregory CLEMENT * a) This file is free software; you can redistribute it and/or 14adbc3695SGregory CLEMENT * modify it under the terms of the GNU General Public License as 15adbc3695SGregory CLEMENT * published by the Free Software Foundation; either version 2 of the 16adbc3695SGregory CLEMENT * License, or (at your option) any later version. 17adbc3695SGregory CLEMENT * 18adbc3695SGregory CLEMENT * This file is distributed in the hope that it will be useful 19adbc3695SGregory CLEMENT * but WITHOUT ANY WARRANTY; without even the implied warranty of 20adbc3695SGregory CLEMENT * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21adbc3695SGregory CLEMENT * GNU General Public License for more details. 22adbc3695SGregory CLEMENT * 23adbc3695SGregory CLEMENT * Or, alternatively 24adbc3695SGregory CLEMENT * 25adbc3695SGregory CLEMENT * b) Permission is hereby granted, free of charge, to any person 26adbc3695SGregory CLEMENT * obtaining a copy of this software and associated documentation 27adbc3695SGregory CLEMENT * files (the "Software"), to deal in the Software without 28adbc3695SGregory CLEMENT * restriction, including without limitation the rights to use 29adbc3695SGregory CLEMENT * copy, modify, merge, publish, distribute, sublicense, and/or 30adbc3695SGregory CLEMENT * sell copies of the Software, and to permit persons to whom the 31adbc3695SGregory CLEMENT * Software is furnished to do so, subject to the following 32adbc3695SGregory CLEMENT * conditions: 33adbc3695SGregory CLEMENT * 34adbc3695SGregory CLEMENT * The above copyright notice and this permission notice shall be 35adbc3695SGregory CLEMENT * included in all copies or substantial portions of the Software. 36adbc3695SGregory CLEMENT * 37adbc3695SGregory CLEMENT * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 38adbc3695SGregory CLEMENT * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 39adbc3695SGregory CLEMENT * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 40adbc3695SGregory CLEMENT * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 41adbc3695SGregory CLEMENT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 42adbc3695SGregory CLEMENT * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 43adbc3695SGregory CLEMENT * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 44adbc3695SGregory CLEMENT * OTHER DEALINGS IN THE SOFTWARE. 45adbc3695SGregory CLEMENT */ 46adbc3695SGregory CLEMENT 47adbc3695SGregory CLEMENT#include <dt-bindings/interrupt-controller/arm-gic.h> 48adbc3695SGregory CLEMENT 49adbc3695SGregory CLEMENT/ { 50adbc3695SGregory CLEMENT model = "Marvell Armada 37xx SoC"; 51adbc3695SGregory CLEMENT compatible = "marvell,armada3700"; 52adbc3695SGregory CLEMENT interrupt-parent = <&gic>; 53adbc3695SGregory CLEMENT #address-cells = <2>; 54adbc3695SGregory CLEMENT #size-cells = <2>; 55adbc3695SGregory CLEMENT 56adbc3695SGregory CLEMENT aliases { 57adbc3695SGregory CLEMENT serial0 = &uart0; 58adbc3695SGregory CLEMENT }; 59adbc3695SGregory CLEMENT 60adbc3695SGregory CLEMENT cpus { 61adbc3695SGregory CLEMENT #address-cells = <1>; 62adbc3695SGregory CLEMENT #size-cells = <0>; 63adbc3695SGregory CLEMENT cpu@0 { 64adbc3695SGregory CLEMENT device_type = "cpu"; 65adbc3695SGregory CLEMENT compatible = "arm,cortex-a53", "arm,armv8"; 66adbc3695SGregory CLEMENT reg = <0>; 67adbc3695SGregory CLEMENT enable-method = "psci"; 68adbc3695SGregory CLEMENT }; 69adbc3695SGregory CLEMENT }; 70adbc3695SGregory CLEMENT 71adbc3695SGregory CLEMENT psci { 72adbc3695SGregory CLEMENT compatible = "arm,psci-0.2"; 73adbc3695SGregory CLEMENT method = "smc"; 74adbc3695SGregory CLEMENT }; 75adbc3695SGregory CLEMENT 76adbc3695SGregory CLEMENT timer { 77adbc3695SGregory CLEMENT compatible = "arm,armv8-timer"; 78adbc3695SGregory CLEMENT interrupts = <GIC_PPI 13 79adbc3695SGregory CLEMENT (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>, 80adbc3695SGregory CLEMENT <GIC_PPI 14 81adbc3695SGregory CLEMENT (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>, 82adbc3695SGregory CLEMENT <GIC_PPI 11 83adbc3695SGregory CLEMENT (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>, 84adbc3695SGregory CLEMENT <GIC_PPI 10 85adbc3695SGregory CLEMENT (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 86adbc3695SGregory CLEMENT }; 87adbc3695SGregory CLEMENT 88adbc3695SGregory CLEMENT soc { 89adbc3695SGregory CLEMENT compatible = "simple-bus"; 90adbc3695SGregory CLEMENT #address-cells = <2>; 91adbc3695SGregory CLEMENT #size-cells = <2>; 92adbc3695SGregory CLEMENT ranges; 93adbc3695SGregory CLEMENT 94ee5d5619SGregory CLEMENT internal-regs@d0000000 { 95adbc3695SGregory CLEMENT #address-cells = <1>; 96adbc3695SGregory CLEMENT #size-cells = <1>; 97adbc3695SGregory CLEMENT compatible = "simple-bus"; 98adbc3695SGregory CLEMENT /* 32M internal register @ 0xd000_0000 */ 99adbc3695SGregory CLEMENT ranges = <0x0 0x0 0xd0000000 0x2000000>; 100adbc3695SGregory CLEMENT 101adbc3695SGregory CLEMENT uart0: serial@12000 { 102adbc3695SGregory CLEMENT compatible = "marvell,armada-3700-uart"; 103adbc3695SGregory CLEMENT reg = <0x12000 0x400>; 104adbc3695SGregory CLEMENT interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 105adbc3695SGregory CLEMENT status = "disabled"; 106adbc3695SGregory CLEMENT }; 107adbc3695SGregory CLEMENT 1085f4beef6SGregory CLEMENT nb_perih_clk: nb-periph-clk@13000{ 1095f4beef6SGregory CLEMENT compatible = "marvell,armada-3700-periph-clock-nb"; 1105f4beef6SGregory CLEMENT reg = <0x13000 0x100>; 1115f4beef6SGregory CLEMENT clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, 1125f4beef6SGregory CLEMENT <&tbg 3>, <&xtalclk>; 1135f4beef6SGregory CLEMENT #clock-cells = <1>; 1145f4beef6SGregory CLEMENT }; 1155f4beef6SGregory CLEMENT 1165f4beef6SGregory CLEMENT sb_perih_clk: sb-periph-clk@18000{ 1175f4beef6SGregory CLEMENT compatible = "marvell,armada-3700-periph-clock-sb"; 1185f4beef6SGregory CLEMENT reg = <0x18000 0x100>; 1195f4beef6SGregory CLEMENT clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, 1205f4beef6SGregory CLEMENT <&tbg 3>, <&xtalclk>; 1215f4beef6SGregory CLEMENT #clock-cells = <1>; 1225f4beef6SGregory CLEMENT }; 1235f4beef6SGregory CLEMENT 124e3e1a55eSGregory CLEMENT tbg: tbg@13200 { 125e3e1a55eSGregory CLEMENT compatible = "marvell,armada-3700-tbg-clock"; 126e3e1a55eSGregory CLEMENT reg = <0x13200 0x100>; 127e3e1a55eSGregory CLEMENT clocks = <&xtalclk>; 128e3e1a55eSGregory CLEMENT #clock-cells = <1>; 129e3e1a55eSGregory CLEMENT }; 130e3e1a55eSGregory CLEMENT 131ddeba40bSGregory CLEMENT gpio1: gpio@13800 { 132ddeba40bSGregory CLEMENT compatible = "marvell,mvebu-gpio-3700", 133ddeba40bSGregory CLEMENT "syscon", "simple-mfd"; 134ddeba40bSGregory CLEMENT reg = <0x13800 0x500>; 135ddeba40bSGregory CLEMENT 136ddeba40bSGregory CLEMENT xtalclk: xtal-clk { 137ddeba40bSGregory CLEMENT compatible = "marvell,armada-3700-xtal-clock"; 138ddeba40bSGregory CLEMENT clock-output-names = "xtal"; 139ddeba40bSGregory CLEMENT #clock-cells = <0>; 140ddeba40bSGregory CLEMENT }; 141ddeba40bSGregory CLEMENT }; 142ddeba40bSGregory CLEMENT 143cc2684c4SAndreas Färber usb3: usb@58000 { 144150fa112SGregory CLEMENT compatible = "marvell,armada3700-xhci", 145150fa112SGregory CLEMENT "generic-xhci"; 146adbc3695SGregory CLEMENT reg = <0x58000 0x4000>; 147adbc3695SGregory CLEMENT interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 148adbc3695SGregory CLEMENT status = "disabled"; 149adbc3695SGregory CLEMENT }; 150adbc3695SGregory CLEMENT 15119b67d5cSGregory CLEMENT xor@60900 { 15219b67d5cSGregory CLEMENT compatible = "marvell,armada-3700-xor"; 15319b67d5cSGregory CLEMENT reg = <0x60900 0x100 15419b67d5cSGregory CLEMENT 0x60b00 0x100>; 15519b67d5cSGregory CLEMENT 15619b67d5cSGregory CLEMENT xor10 { 15719b67d5cSGregory CLEMENT interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 15819b67d5cSGregory CLEMENT }; 15919b67d5cSGregory CLEMENT xor11 { 16019b67d5cSGregory CLEMENT interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 16119b67d5cSGregory CLEMENT }; 16219b67d5cSGregory CLEMENT }; 16319b67d5cSGregory CLEMENT 1647b01cff5SAndreas Färber sata: sata@e0000 { 165adbc3695SGregory CLEMENT compatible = "marvell,armada-3700-ahci"; 166adbc3695SGregory CLEMENT reg = <0xe0000 0x2000>; 167adbc3695SGregory CLEMENT interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 168adbc3695SGregory CLEMENT status = "disabled"; 169adbc3695SGregory CLEMENT }; 170adbc3695SGregory CLEMENT 171adbc3695SGregory CLEMENT gic: interrupt-controller@1d00000 { 172adbc3695SGregory CLEMENT compatible = "arm,gic-v3"; 173adbc3695SGregory CLEMENT #interrupt-cells = <3>; 174adbc3695SGregory CLEMENT interrupt-controller; 175adbc3695SGregory CLEMENT reg = <0x1d00000 0x10000>, /* GICD */ 176adbc3695SGregory CLEMENT <0x1d40000 0x40000>; /* GICR */ 177adbc3695SGregory CLEMENT }; 178adbc3695SGregory CLEMENT }; 17976f6386bSThomas Petazzoni 18076f6386bSThomas Petazzoni pcie0: pcie@d0070000 { 18176f6386bSThomas Petazzoni compatible = "marvell,armada-3700-pcie"; 18276f6386bSThomas Petazzoni device_type = "pci"; 18376f6386bSThomas Petazzoni status = "disabled"; 18476f6386bSThomas Petazzoni reg = <0 0xd0070000 0 0x20000>; 18576f6386bSThomas Petazzoni #address-cells = <3>; 18676f6386bSThomas Petazzoni #size-cells = <2>; 18776f6386bSThomas Petazzoni bus-range = <0x00 0xff>; 18876f6386bSThomas Petazzoni interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 18976f6386bSThomas Petazzoni #interrupt-cells = <1>; 19076f6386bSThomas Petazzoni msi-parent = <&pcie0>; 19176f6386bSThomas Petazzoni msi-controller; 19276f6386bSThomas Petazzoni ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */ 19376f6386bSThomas Petazzoni 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/ 19476f6386bSThomas Petazzoni interrupt-map-mask = <0 0 0 7>; 19576f6386bSThomas Petazzoni interrupt-map = <0 0 0 1 &pcie_intc 0>, 19676f6386bSThomas Petazzoni <0 0 0 2 &pcie_intc 1>, 19776f6386bSThomas Petazzoni <0 0 0 3 &pcie_intc 2>, 19876f6386bSThomas Petazzoni <0 0 0 4 &pcie_intc 3>; 19976f6386bSThomas Petazzoni pcie_intc: interrupt-controller { 20076f6386bSThomas Petazzoni interrupt-controller; 20176f6386bSThomas Petazzoni #interrupt-cells = <1>; 20276f6386bSThomas Petazzoni }; 20376f6386bSThomas Petazzoni }; 204adbc3695SGregory CLEMENT }; 205adbc3695SGregory CLEMENT}; 206