1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board 4 * Copyright (C) 2016 Marvell 5 * 6 * Romain Perier <romain.perier@free-electrons.com> 7 * 8 */ 9 10#include <dt-bindings/gpio/gpio.h> 11#include "armada-372x.dtsi" 12 13/ { 14 aliases { 15 ethernet0 = ð0; 16 /* for dsa slave device */ 17 ethernet1 = &switch0port1; 18 ethernet2 = &switch0port2; 19 ethernet3 = &switch0port3; 20 }; 21 22 chosen { 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 memory@0 { 27 device_type = "memory"; 28 reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 29 }; 30 31 vcc_sd_reg1: regulator { 32 compatible = "regulator-gpio"; 33 regulator-name = "vcc_sd1"; 34 regulator-min-microvolt = <1800000>; 35 regulator-max-microvolt = <3300000>; 36 regulator-boot-on; 37 38 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>; 39 gpios-states = <0>; 40 states = <1800000 0x1 41 3300000 0x0>; 42 enable-active-high; 43 }; 44}; 45 46/* J9 */ 47&pcie0 { 48 status = "okay"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; 51 reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; 52}; 53 54/* J6 */ 55&sata { 56 status = "okay"; 57 phys = <&comphy2 0>; 58 phy-names = "sata-phy"; 59}; 60 61/* J1 */ 62&sdhci1 { 63 wp-inverted; 64 bus-width = <4>; 65 cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>; 66 marvell,pad-type = "sd"; 67 vqmmc-supply = <&vcc_sd_reg1>; 68 69 pinctrl-names = "default"; 70 pinctrl-0 = <&sdio_pins>; 71 status = "okay"; 72}; 73 74&spi0 { 75 status = "okay"; 76 77 flash@0 { 78 reg = <0>; 79 compatible = "jedec,spi-nor"; 80 spi-max-frequency = <104000000>; 81 m25p,fast-read; 82 }; 83}; 84 85/* Exported on the micro USB connector J5 through an FTDI */ 86&uart0 { 87 pinctrl-names = "default"; 88 pinctrl-0 = <&uart1_pins>; 89 status = "okay"; 90}; 91 92/* 93 * Connector J17 and J18 expose a number of different features. Some pins are 94 * multiplexed. This is the case for instance for the following features: 95 * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of 96 * how to enable it. Beware that the signals are 1.8V TTL. 97 * - I2C 98 * - SPI 99 * - MMC 100 */ 101 102/* J7 */ 103&usb3 { 104 status = "okay"; 105}; 106 107/* J8 */ 108&usb2 { 109 status = "okay"; 110}; 111 112&mdio { 113 switch0: switch0@1 { 114 compatible = "marvell,mv88e6085"; 115 #address-cells = <1>; 116 #size-cells = <0>; 117 reg = <1>; 118 119 dsa,member = <0 0>; 120 121 ports { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 125 switch0port0: port@0 { 126 reg = <0>; 127 label = "cpu"; 128 ethernet = <ð0>; 129 phy-mode = "rgmii-id"; 130 fixed-link { 131 speed = <1000>; 132 full-duplex; 133 }; 134 }; 135 136 switch0port1: port@1 { 137 reg = <1>; 138 label = "wan"; 139 phy-handle = <&switch0phy0>; 140 }; 141 142 switch0port2: port@2 { 143 reg = <2>; 144 label = "lan0"; 145 phy-handle = <&switch0phy1>; 146 }; 147 148 switch0port3: port@3 { 149 reg = <3>; 150 label = "lan1"; 151 phy-handle = <&switch0phy2>; 152 }; 153 154 }; 155 156 mdio { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 160 switch0phy0: switch0phy0@11 { 161 reg = <0x11>; 162 }; 163 switch0phy1: switch0phy1@12 { 164 reg = <0x12>; 165 }; 166 switch0phy2: switch0phy2@13 { 167 reg = <0x13>; 168 }; 169 }; 170 }; 171}; 172 173ð0 { 174 pinctrl-names = "default"; 175 pinctrl-0 = <&rgmii_pins>, <&smi_pins>; 176 phy-mode = "rgmii-id"; 177 status = "okay"; 178 179 fixed-link { 180 speed = <1000>; 181 full-duplex; 182 }; 183}; 184