16b44feb7SGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2e735aaf8SRomain Perier/*
3e735aaf8SRomain Perier * Device Tree file for Globalscale Marvell ESPRESSOBin Board
4e735aaf8SRomain Perier * Copyright (C) 2016 Marvell
5e735aaf8SRomain Perier *
6e735aaf8SRomain Perier * Romain Perier <romain.perier@free-electrons.com>
7e735aaf8SRomain Perier *
8e735aaf8SRomain Perier */
9003456f5SUwe Kleine-König/*
10003456f5SUwe Kleine-König * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
11003456f5SUwe Kleine-König */
12e735aaf8SRomain Perier
13e735aaf8SRomain Perier/dts-v1/;
14e735aaf8SRomain Perier
159be778f6SMarcin Wojtas#include <dt-bindings/gpio/gpio.h>
16e735aaf8SRomain Perier#include "armada-372x.dtsi"
17e735aaf8SRomain Perier
18e735aaf8SRomain Perier/ {
19e735aaf8SRomain Perier	model = "Globalscale Marvell ESPRESSOBin Board";
20e735aaf8SRomain Perier	compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
21e735aaf8SRomain Perier
22e735aaf8SRomain Perier	chosen {
23e735aaf8SRomain Perier		stdout-path = "serial0:115200n8";
24e735aaf8SRomain Perier	};
25e735aaf8SRomain Perier
2636845345SGregory CLEMENT	memory@0 {
27e735aaf8SRomain Perier		device_type = "memory";
28e735aaf8SRomain Perier		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
29e735aaf8SRomain Perier	};
309be778f6SMarcin Wojtas
319be778f6SMarcin Wojtas	vcc_sd_reg1: regulator {
329be778f6SMarcin Wojtas		compatible = "regulator-gpio";
339be778f6SMarcin Wojtas		regulator-name = "vcc_sd1";
349be778f6SMarcin Wojtas		regulator-min-microvolt = <1800000>;
359be778f6SMarcin Wojtas		regulator-max-microvolt = <3300000>;
369be778f6SMarcin Wojtas		regulator-boot-on;
379be778f6SMarcin Wojtas
389be778f6SMarcin Wojtas		gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
399be778f6SMarcin Wojtas		gpios-states = <0>;
409be778f6SMarcin Wojtas		states = <1800000 0x1
419be778f6SMarcin Wojtas			  3300000 0x0>;
429be778f6SMarcin Wojtas		enable-active-high;
439be778f6SMarcin Wojtas	};
44e735aaf8SRomain Perier};
45e735aaf8SRomain Perier
46e735aaf8SRomain Perier/* J9 */
47e735aaf8SRomain Perier&pcie0 {
48e735aaf8SRomain Perier	status = "okay";
49e735aaf8SRomain Perier};
50e735aaf8SRomain Perier
51e735aaf8SRomain Perier/* J6 */
52e735aaf8SRomain Perier&sata {
53e735aaf8SRomain Perier	status = "okay";
54e735aaf8SRomain Perier};
55e735aaf8SRomain Perier
569be778f6SMarcin Wojtas/* J1 */
579be778f6SMarcin Wojtas&sdhci1 {
589be778f6SMarcin Wojtas	wp-inverted;
599be778f6SMarcin Wojtas	bus-width = <4>;
609be778f6SMarcin Wojtas	cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
619be778f6SMarcin Wojtas	marvell,pad-type = "sd";
629be778f6SMarcin Wojtas	vqmmc-supply = <&vcc_sd_reg1>;
639be778f6SMarcin Wojtas	status = "okay";
649be778f6SMarcin Wojtas};
659be778f6SMarcin Wojtas
66e735aaf8SRomain Perier/* Exported on the micro USB connector J5 through an FTDI */
67e735aaf8SRomain Perier&uart0 {
68c3c08c5dSMiquel Raynal	pinctrl-names = "default";
69c3c08c5dSMiquel Raynal	pinctrl-0 = <&uart1_pins>;
70e735aaf8SRomain Perier	status = "okay";
71e735aaf8SRomain Perier};
72e735aaf8SRomain Perier
73c3c08c5dSMiquel Raynal/*
74c3c08c5dSMiquel Raynal * Connector J17 and J18 expose a number of different features. Some pins are
75c3c08c5dSMiquel Raynal * multiplexed. This is the case for instance for the following features:
76c3c08c5dSMiquel Raynal * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
77c3c08c5dSMiquel Raynal *   how to enable it. Beware that the signals are 1.8V TTL.
78c3c08c5dSMiquel Raynal * - I2C
79c3c08c5dSMiquel Raynal * - SPI
80c3c08c5dSMiquel Raynal * - MMC
81c3c08c5dSMiquel Raynal */
82c3c08c5dSMiquel Raynal
83e735aaf8SRomain Perier/* J7 */
84e735aaf8SRomain Perier&usb3 {
85e735aaf8SRomain Perier	status = "okay";
86e735aaf8SRomain Perier};
87f0c05e87SRomain Perier
8848907d0cSMarc Zyngier/* J8 */
8948907d0cSMarc Zyngier&usb2 {
9048907d0cSMarc Zyngier	status = "okay";
9148907d0cSMarc Zyngier};
9248907d0cSMarc Zyngier
93f0c05e87SRomain Perier&mdio {
94f0c05e87SRomain Perier	switch0: switch0@1 {
95f0c05e87SRomain Perier		compatible = "marvell,mv88e6085";
96f0c05e87SRomain Perier		#address-cells = <1>;
97f0c05e87SRomain Perier		#size-cells = <0>;
98f0c05e87SRomain Perier		reg = <1>;
99f0c05e87SRomain Perier
100f0c05e87SRomain Perier		dsa,member = <0 0>;
101f0c05e87SRomain Perier
102f0c05e87SRomain Perier		ports {
103f0c05e87SRomain Perier			#address-cells = <1>;
104f0c05e87SRomain Perier			#size-cells = <0>;
105f0c05e87SRomain Perier
106f0c05e87SRomain Perier			port@0 {
107f0c05e87SRomain Perier				reg = <0>;
108f0c05e87SRomain Perier				label = "cpu";
109f0c05e87SRomain Perier				ethernet = <&eth0>;
110f0c05e87SRomain Perier			};
111f0c05e87SRomain Perier
112f0c05e87SRomain Perier			port@1 {
113f0c05e87SRomain Perier				reg = <1>;
114f0c05e87SRomain Perier				label = "wan";
115f0c05e87SRomain Perier				phy-handle = <&switch0phy0>;
116f0c05e87SRomain Perier			};
117f0c05e87SRomain Perier
118f0c05e87SRomain Perier			port@2 {
119f0c05e87SRomain Perier				reg = <2>;
120f0c05e87SRomain Perier				label = "lan0";
121f0c05e87SRomain Perier				phy-handle = <&switch0phy1>;
122f0c05e87SRomain Perier			};
123f0c05e87SRomain Perier
124f0c05e87SRomain Perier			port@3 {
125f0c05e87SRomain Perier				reg = <3>;
126f0c05e87SRomain Perier				label = "lan1";
127f0c05e87SRomain Perier				phy-handle = <&switch0phy2>;
128f0c05e87SRomain Perier			};
129f0c05e87SRomain Perier
130f0c05e87SRomain Perier		};
131f0c05e87SRomain Perier
132f0c05e87SRomain Perier		mdio {
133f0c05e87SRomain Perier			#address-cells = <1>;
134f0c05e87SRomain Perier			#size-cells = <0>;
135f0c05e87SRomain Perier
136f0c05e87SRomain Perier			switch0phy0: switch0phy0@11 {
137f0c05e87SRomain Perier				reg = <0x11>;
138f0c05e87SRomain Perier			};
139f0c05e87SRomain Perier			switch0phy1: switch0phy1@12 {
140f0c05e87SRomain Perier				reg = <0x12>;
141f0c05e87SRomain Perier			};
142f0c05e87SRomain Perier			switch0phy2: switch0phy2@13 {
143f0c05e87SRomain Perier				reg = <0x13>;
144f0c05e87SRomain Perier			};
145f0c05e87SRomain Perier		};
146f0c05e87SRomain Perier	};
147f0c05e87SRomain Perier};
148f0c05e87SRomain Perier
149f0c05e87SRomain Perier&eth0 {
150f0c05e87SRomain Perier	phy-mode = "rgmii-id";
151f0c05e87SRomain Perier	status = "okay";
152f0c05e87SRomain Perier
153f0c05e87SRomain Perier	fixed-link {
154f0c05e87SRomain Perier		speed = <1000>;
155f0c05e87SRomain Perier		full-duplex;
156f0c05e87SRomain Perier	};
157f0c05e87SRomain Perier};
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