1*b795fadfSChris Packham// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*b795fadfSChris Packham/* 3*b795fadfSChris Packham * Device Tree For RD-AC5X. 4*b795fadfSChris Packham * 5*b795fadfSChris Packham * Copyright (C) 2021 Marvell 6*b795fadfSChris Packham * Copyright (C) 2022 Allied Telesis Labs 7*b795fadfSChris Packham */ 8*b795fadfSChris Packham/* 9*b795fadfSChris Packham * Device Tree file for Marvell Alleycat 5X development board 10*b795fadfSChris Packham * This board file supports the B configuration of the board 11*b795fadfSChris Packham */ 12*b795fadfSChris Packham 13*b795fadfSChris Packham/dts-v1/; 14*b795fadfSChris Packham 15*b795fadfSChris Packham#include "ac5-98dx35xx.dtsi" 16*b795fadfSChris Packham 17*b795fadfSChris Packham/ { 18*b795fadfSChris Packham model = "Marvell RD-AC5X Board"; 19*b795fadfSChris Packham compatible = "marvell,rd-ac5x", "marvell,ac5x", "marvell,ac5"; 20*b795fadfSChris Packham 21*b795fadfSChris Packham aliases { 22*b795fadfSChris Packham serial0 = &uart0; 23*b795fadfSChris Packham spiflash0 = &spiflash0; 24*b795fadfSChris Packham gpio0 = &gpio0; 25*b795fadfSChris Packham gpio1 = &gpio1; 26*b795fadfSChris Packham ethernet0 = ð0; 27*b795fadfSChris Packham ethernet1 = ð1; 28*b795fadfSChris Packham }; 29*b795fadfSChris Packham 30*b795fadfSChris Packham memory@0 { 31*b795fadfSChris Packham device_type = "memory"; 32*b795fadfSChris Packham reg = <0x2 0x00000000 0x0 0x40000000>; 33*b795fadfSChris Packham }; 34*b795fadfSChris Packham 35*b795fadfSChris Packham usb1phy: usb-phy { 36*b795fadfSChris Packham compatible = "usb-nop-xceiv"; 37*b795fadfSChris Packham #phy-cells = <0>; 38*b795fadfSChris Packham }; 39*b795fadfSChris Packham}; 40*b795fadfSChris Packham 41*b795fadfSChris Packham&mdio { 42*b795fadfSChris Packham phy0: ethernet-phy@0 { 43*b795fadfSChris Packham reg = <0>; 44*b795fadfSChris Packham }; 45*b795fadfSChris Packham}; 46*b795fadfSChris Packham 47*b795fadfSChris Packham&i2c0 { 48*b795fadfSChris Packham status = "okay"; 49*b795fadfSChris Packham}; 50*b795fadfSChris Packham 51*b795fadfSChris Packham&i2c1 { 52*b795fadfSChris Packham status = "okay"; 53*b795fadfSChris Packham}; 54*b795fadfSChris Packham 55*b795fadfSChris Packhamð0 { 56*b795fadfSChris Packham status = "okay"; 57*b795fadfSChris Packham phy-handle = <&phy0>; 58*b795fadfSChris Packham}; 59*b795fadfSChris Packham 60*b795fadfSChris Packham/* USB0 is a host USB */ 61*b795fadfSChris Packham&usb0 { 62*b795fadfSChris Packham status = "okay"; 63*b795fadfSChris Packham}; 64*b795fadfSChris Packham 65*b795fadfSChris Packham/* USB1 is a peripheral USB */ 66*b795fadfSChris Packham&usb1 { 67*b795fadfSChris Packham status = "okay"; 68*b795fadfSChris Packham phys = <&usb1phy>; 69*b795fadfSChris Packham phy-names = "usb-phy"; 70*b795fadfSChris Packham dr_mode = "peripheral"; 71*b795fadfSChris Packham}; 72*b795fadfSChris Packham 73*b795fadfSChris Packham&spi0 { 74*b795fadfSChris Packham status = "okay"; 75*b795fadfSChris Packham 76*b795fadfSChris Packham spiflash0: flash@0 { 77*b795fadfSChris Packham compatible = "jedec,spi-nor"; 78*b795fadfSChris Packham spi-max-frequency = <50000000>; 79*b795fadfSChris Packham spi-tx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */ 80*b795fadfSChris Packham spi-rx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */ 81*b795fadfSChris Packham reg = <0>; 82*b795fadfSChris Packham 83*b795fadfSChris Packham #address-cells = <1>; 84*b795fadfSChris Packham #size-cells = <1>; 85*b795fadfSChris Packham 86*b795fadfSChris Packham partition@0 { 87*b795fadfSChris Packham label = "spi_flash_part0"; 88*b795fadfSChris Packham reg = <0x0 0x800000>; 89*b795fadfSChris Packham }; 90*b795fadfSChris Packham 91*b795fadfSChris Packham parition@1 { 92*b795fadfSChris Packham label = "spi_flash_part1"; 93*b795fadfSChris Packham reg = <0x800000 0x700000>; 94*b795fadfSChris Packham }; 95*b795fadfSChris Packham 96*b795fadfSChris Packham parition@2 { 97*b795fadfSChris Packham label = "spi_flash_part2"; 98*b795fadfSChris Packham reg = <0xF00000 0x100000>; 99*b795fadfSChris Packham }; 100*b795fadfSChris Packham }; 101*b795fadfSChris Packham}; 102