1*22511e66SMatthew Gerlach// SPDX-License-Identifier: GPL-2.0
2*22511e66SMatthew Gerlach/*
3*22511e66SMatthew Gerlach * Copyright (C) 2021-2022, Intel Corporation
4*22511e66SMatthew Gerlach */
5*22511e66SMatthew Gerlach#include "socfpga_agilex.dtsi"
6*22511e66SMatthew Gerlach
7*22511e66SMatthew Gerlach/ {
8*22511e66SMatthew Gerlach	model = "SoCFPGA Agilex n6000";
9*22511e66SMatthew Gerlach	compatible = "intel,socfpga-agilex-n6000", "intel,socfpga-agilex";
10*22511e66SMatthew Gerlach
11*22511e66SMatthew Gerlach	aliases {
12*22511e66SMatthew Gerlach		serial0 = &uart1;
13*22511e66SMatthew Gerlach		serial1 = &uart0;
14*22511e66SMatthew Gerlach		ethernet0 = &gmac0;
15*22511e66SMatthew Gerlach		ethernet1 = &gmac1;
16*22511e66SMatthew Gerlach		ethernet2 = &gmac2;
17*22511e66SMatthew Gerlach	};
18*22511e66SMatthew Gerlach
19*22511e66SMatthew Gerlach	chosen {
20*22511e66SMatthew Gerlach		stdout-path = "serial0:115200n8";
21*22511e66SMatthew Gerlach	};
22*22511e66SMatthew Gerlach
23*22511e66SMatthew Gerlach	memory@0 {
24*22511e66SMatthew Gerlach		device_type = "memory";
25*22511e66SMatthew Gerlach		/* We expect the bootloader to fill in the reg */
26*22511e66SMatthew Gerlach		reg = <0 0 0 0>;
27*22511e66SMatthew Gerlach	};
28*22511e66SMatthew Gerlach
29*22511e66SMatthew Gerlach	soc {
30*22511e66SMatthew Gerlach		bus@80000000 {
31*22511e66SMatthew Gerlach			compatible = "simple-bus";
32*22511e66SMatthew Gerlach			reg = <0x80000000 0x60000000>,
33*22511e66SMatthew Gerlach				<0xf9000000 0x00100000>;
34*22511e66SMatthew Gerlach			reg-names = "axi_h2f", "axi_h2f_lw";
35*22511e66SMatthew Gerlach			#address-cells = <2>;
36*22511e66SMatthew Gerlach			#size-cells = <1>;
37*22511e66SMatthew Gerlach			ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
38*22511e66SMatthew Gerlach
39*22511e66SMatthew Gerlach			dma-controller@0 {
40*22511e66SMatthew Gerlach				compatible = "intel,hps-copy-engine";
41*22511e66SMatthew Gerlach				reg = <0x00000000 0x00000000 0x00001000>;
42*22511e66SMatthew Gerlach				#dma-cells = <1>;
43*22511e66SMatthew Gerlach			};
44*22511e66SMatthew Gerlach		};
45*22511e66SMatthew Gerlach	};
46*22511e66SMatthew Gerlach};
47*22511e66SMatthew Gerlach
48*22511e66SMatthew Gerlach&osc1 {
49*22511e66SMatthew Gerlach	clock-frequency = <25000000>;
50*22511e66SMatthew Gerlach};
51*22511e66SMatthew Gerlach
52*22511e66SMatthew Gerlach&uart0 {
53*22511e66SMatthew Gerlach	status = "okay";
54*22511e66SMatthew Gerlach};
55*22511e66SMatthew Gerlach
56*22511e66SMatthew Gerlach&uart1 {
57*22511e66SMatthew Gerlach	status = "okay";
58*22511e66SMatthew Gerlach};
59*22511e66SMatthew Gerlach
60*22511e66SMatthew Gerlach&watchdog0 {
61*22511e66SMatthew Gerlach	status = "okay";
62*22511e66SMatthew Gerlach};
63*22511e66SMatthew Gerlach
64*22511e66SMatthew Gerlach&fpga_mgr {
65*22511e66SMatthew Gerlach	status = "disabled";
66*22511e66SMatthew Gerlach};
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