1aa8d3e74SKefeng Wang/** 2aa8d3e74SKefeng Wang * dts file for Hisilicon D03 Development Board 3aa8d3e74SKefeng Wang * 4aa8d3e74SKefeng Wang * Copyright (C) 2016 Hisilicon Ltd. 5aa8d3e74SKefeng Wang * 6aa8d3e74SKefeng Wang * This program is free software; you can redistribute it and/or modify 7aa8d3e74SKefeng Wang * it under the terms of the GNU General Public License version 2 as 8aa8d3e74SKefeng Wang * publishhed by the Free Software Foundation. 9aa8d3e74SKefeng Wang * 10aa8d3e74SKefeng Wang */ 11aa8d3e74SKefeng Wang 12aa8d3e74SKefeng Wang#include <dt-bindings/interrupt-controller/arm-gic.h> 13aa8d3e74SKefeng Wang 14aa8d3e74SKefeng Wang/ { 15aa8d3e74SKefeng Wang compatible = "hisilicon,hip06-d03"; 16aa8d3e74SKefeng Wang interrupt-parent = <&gic>; 17aa8d3e74SKefeng Wang #address-cells = <2>; 18aa8d3e74SKefeng Wang #size-cells = <2>; 19aa8d3e74SKefeng Wang 20aa8d3e74SKefeng Wang psci { 21aa8d3e74SKefeng Wang compatible = "arm,psci-0.2"; 22aa8d3e74SKefeng Wang method = "smc"; 23aa8d3e74SKefeng Wang }; 24aa8d3e74SKefeng Wang 25aa8d3e74SKefeng Wang cpus { 26aa8d3e74SKefeng Wang #address-cells = <1>; 27aa8d3e74SKefeng Wang #size-cells = <0>; 28aa8d3e74SKefeng Wang 29aa8d3e74SKefeng Wang cpu-map { 30aa8d3e74SKefeng Wang cluster0 { 31aa8d3e74SKefeng Wang core0 { 32aa8d3e74SKefeng Wang cpu = <&cpu0>; 33aa8d3e74SKefeng Wang }; 34aa8d3e74SKefeng Wang core1 { 35aa8d3e74SKefeng Wang cpu = <&cpu1>; 36aa8d3e74SKefeng Wang }; 37aa8d3e74SKefeng Wang core2 { 38aa8d3e74SKefeng Wang cpu = <&cpu2>; 39aa8d3e74SKefeng Wang }; 40aa8d3e74SKefeng Wang core3 { 41aa8d3e74SKefeng Wang cpu = <&cpu3>; 42aa8d3e74SKefeng Wang }; 43aa8d3e74SKefeng Wang }; 44aa8d3e74SKefeng Wang cluster1 { 45aa8d3e74SKefeng Wang core0 { 46aa8d3e74SKefeng Wang cpu = <&cpu4>; 47aa8d3e74SKefeng Wang }; 48aa8d3e74SKefeng Wang core1 { 49aa8d3e74SKefeng Wang cpu = <&cpu5>; 50aa8d3e74SKefeng Wang }; 51aa8d3e74SKefeng Wang core2 { 52aa8d3e74SKefeng Wang cpu = <&cpu6>; 53aa8d3e74SKefeng Wang }; 54aa8d3e74SKefeng Wang core3 { 55aa8d3e74SKefeng Wang cpu = <&cpu7>; 56aa8d3e74SKefeng Wang }; 57aa8d3e74SKefeng Wang }; 58aa8d3e74SKefeng Wang cluster2 { 59aa8d3e74SKefeng Wang core0 { 60aa8d3e74SKefeng Wang cpu = <&cpu8>; 61aa8d3e74SKefeng Wang }; 62aa8d3e74SKefeng Wang core1 { 63aa8d3e74SKefeng Wang cpu = <&cpu9>; 64aa8d3e74SKefeng Wang }; 65aa8d3e74SKefeng Wang core2 { 66aa8d3e74SKefeng Wang cpu = <&cpu10>; 67aa8d3e74SKefeng Wang }; 68aa8d3e74SKefeng Wang core3 { 69aa8d3e74SKefeng Wang cpu = <&cpu11>; 70aa8d3e74SKefeng Wang }; 71aa8d3e74SKefeng Wang }; 72aa8d3e74SKefeng Wang cluster3 { 73aa8d3e74SKefeng Wang core0 { 74aa8d3e74SKefeng Wang cpu = <&cpu12>; 75aa8d3e74SKefeng Wang }; 76aa8d3e74SKefeng Wang core1 { 77aa8d3e74SKefeng Wang cpu = <&cpu13>; 78aa8d3e74SKefeng Wang }; 79aa8d3e74SKefeng Wang core2 { 80aa8d3e74SKefeng Wang cpu = <&cpu14>; 81aa8d3e74SKefeng Wang }; 82aa8d3e74SKefeng Wang core3 { 83aa8d3e74SKefeng Wang cpu = <&cpu15>; 84aa8d3e74SKefeng Wang }; 85aa8d3e74SKefeng Wang }; 86aa8d3e74SKefeng Wang }; 87aa8d3e74SKefeng Wang 88aa8d3e74SKefeng Wang cpu0: cpu@10000 { 89aa8d3e74SKefeng Wang device_type = "cpu"; 90aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 91aa8d3e74SKefeng Wang reg = <0x10000>; 92aa8d3e74SKefeng Wang enable-method = "psci"; 93aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 94aa8d3e74SKefeng Wang }; 95aa8d3e74SKefeng Wang 96aa8d3e74SKefeng Wang cpu1: cpu@10001 { 97aa8d3e74SKefeng Wang device_type = "cpu"; 98aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 99aa8d3e74SKefeng Wang reg = <0x10001>; 100aa8d3e74SKefeng Wang enable-method = "psci"; 101aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 102aa8d3e74SKefeng Wang }; 103aa8d3e74SKefeng Wang 104aa8d3e74SKefeng Wang cpu2: cpu@10002 { 105aa8d3e74SKefeng Wang device_type = "cpu"; 106aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 107aa8d3e74SKefeng Wang reg = <0x10002>; 108aa8d3e74SKefeng Wang enable-method = "psci"; 109aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 110aa8d3e74SKefeng Wang }; 111aa8d3e74SKefeng Wang 112aa8d3e74SKefeng Wang cpu3: cpu@10003 { 113aa8d3e74SKefeng Wang device_type = "cpu"; 114aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 115aa8d3e74SKefeng Wang reg = <0x10003>; 116aa8d3e74SKefeng Wang enable-method = "psci"; 117aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 118aa8d3e74SKefeng Wang }; 119aa8d3e74SKefeng Wang 120aa8d3e74SKefeng Wang cpu4: cpu@10100 { 121aa8d3e74SKefeng Wang device_type = "cpu"; 122aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 123aa8d3e74SKefeng Wang reg = <0x10100>; 124aa8d3e74SKefeng Wang enable-method = "psci"; 125aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 126aa8d3e74SKefeng Wang }; 127aa8d3e74SKefeng Wang 128aa8d3e74SKefeng Wang cpu5: cpu@10101 { 129aa8d3e74SKefeng Wang device_type = "cpu"; 130aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 131aa8d3e74SKefeng Wang reg = <0x10101>; 132aa8d3e74SKefeng Wang enable-method = "psci"; 133aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 134aa8d3e74SKefeng Wang }; 135aa8d3e74SKefeng Wang 136aa8d3e74SKefeng Wang cpu6: cpu@10102 { 137aa8d3e74SKefeng Wang device_type = "cpu"; 138aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 139aa8d3e74SKefeng Wang reg = <0x10102>; 140aa8d3e74SKefeng Wang enable-method = "psci"; 141aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 142aa8d3e74SKefeng Wang }; 143aa8d3e74SKefeng Wang 144aa8d3e74SKefeng Wang cpu7: cpu@10103 { 145aa8d3e74SKefeng Wang device_type = "cpu"; 146aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 147aa8d3e74SKefeng Wang reg = <0x10103>; 148aa8d3e74SKefeng Wang enable-method = "psci"; 149aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 150aa8d3e74SKefeng Wang }; 151aa8d3e74SKefeng Wang 152aa8d3e74SKefeng Wang cpu8: cpu@10200 { 153aa8d3e74SKefeng Wang device_type = "cpu"; 154aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 155aa8d3e74SKefeng Wang reg = <0x10200>; 156aa8d3e74SKefeng Wang enable-method = "psci"; 157aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 158aa8d3e74SKefeng Wang }; 159aa8d3e74SKefeng Wang 160aa8d3e74SKefeng Wang cpu9: cpu@10201 { 161aa8d3e74SKefeng Wang device_type = "cpu"; 162aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 163aa8d3e74SKefeng Wang reg = <0x10201>; 164aa8d3e74SKefeng Wang enable-method = "psci"; 165aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 166aa8d3e74SKefeng Wang }; 167aa8d3e74SKefeng Wang 168aa8d3e74SKefeng Wang cpu10: cpu@10202 { 169aa8d3e74SKefeng Wang device_type = "cpu"; 170aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 171aa8d3e74SKefeng Wang reg = <0x10202>; 172aa8d3e74SKefeng Wang enable-method = "psci"; 173aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 174aa8d3e74SKefeng Wang }; 175aa8d3e74SKefeng Wang 176aa8d3e74SKefeng Wang cpu11: cpu@10203 { 177aa8d3e74SKefeng Wang device_type = "cpu"; 178aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 179aa8d3e74SKefeng Wang reg = <0x10203>; 180aa8d3e74SKefeng Wang enable-method = "psci"; 181aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 182aa8d3e74SKefeng Wang }; 183aa8d3e74SKefeng Wang 184aa8d3e74SKefeng Wang cpu12: cpu@10300 { 185aa8d3e74SKefeng Wang device_type = "cpu"; 186aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 187aa8d3e74SKefeng Wang reg = <0x10300>; 188aa8d3e74SKefeng Wang enable-method = "psci"; 189aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 190aa8d3e74SKefeng Wang }; 191aa8d3e74SKefeng Wang 192aa8d3e74SKefeng Wang cpu13: cpu@10301 { 193aa8d3e74SKefeng Wang device_type = "cpu"; 194aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 195aa8d3e74SKefeng Wang reg = <0x10301>; 196aa8d3e74SKefeng Wang enable-method = "psci"; 197aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 198aa8d3e74SKefeng Wang }; 199aa8d3e74SKefeng Wang 200aa8d3e74SKefeng Wang cpu14: cpu@10302 { 201aa8d3e74SKefeng Wang device_type = "cpu"; 202aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 203aa8d3e74SKefeng Wang reg = <0x10302>; 204aa8d3e74SKefeng Wang enable-method = "psci"; 205aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 206aa8d3e74SKefeng Wang }; 207aa8d3e74SKefeng Wang 208aa8d3e74SKefeng Wang cpu15: cpu@10303 { 209aa8d3e74SKefeng Wang device_type = "cpu"; 210aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 211aa8d3e74SKefeng Wang reg = <0x10303>; 212aa8d3e74SKefeng Wang enable-method = "psci"; 213aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 214aa8d3e74SKefeng Wang }; 215aa8d3e74SKefeng Wang 216aa8d3e74SKefeng Wang cluster0_l2: l2-cache0 { 217aa8d3e74SKefeng Wang compatible = "cache"; 218aa8d3e74SKefeng Wang }; 219aa8d3e74SKefeng Wang 220aa8d3e74SKefeng Wang cluster1_l2: l2-cache1 { 221aa8d3e74SKefeng Wang compatible = "cache"; 222aa8d3e74SKefeng Wang }; 223aa8d3e74SKefeng Wang 224aa8d3e74SKefeng Wang cluster2_l2: l2-cache2 { 225aa8d3e74SKefeng Wang compatible = "cache"; 226aa8d3e74SKefeng Wang }; 227aa8d3e74SKefeng Wang 228aa8d3e74SKefeng Wang cluster3_l2: l2-cache3 { 229aa8d3e74SKefeng Wang compatible = "cache"; 230aa8d3e74SKefeng Wang }; 231aa8d3e74SKefeng Wang }; 232aa8d3e74SKefeng Wang 233aa8d3e74SKefeng Wang gic: interrupt-controller@4d000000 { 234aa8d3e74SKefeng Wang compatible = "arm,gic-v3"; 235aa8d3e74SKefeng Wang #interrupt-cells = <3>; 236aa8d3e74SKefeng Wang #address-cells = <2>; 237aa8d3e74SKefeng Wang #size-cells = <2>; 238aa8d3e74SKefeng Wang ranges; 239aa8d3e74SKefeng Wang interrupt-controller; 240aa8d3e74SKefeng Wang #redistributor-regions = <1>; 241aa8d3e74SKefeng Wang redistributor-stride = <0x0 0x30000>; 242aa8d3e74SKefeng Wang reg = <0x0 0x4d000000 0 0x10000>, /* GICD */ 243aa8d3e74SKefeng Wang <0x0 0x4d100000 0 0x300000>, /* GICR */ 244aa8d3e74SKefeng Wang <0x0 0xfe000000 0 0x10000>, /* GICC */ 245aa8d3e74SKefeng Wang <0x0 0xfe010000 0 0x10000>, /* GICH */ 246aa8d3e74SKefeng Wang <0x0 0xfe020000 0 0x10000>; /* GICV */ 247aa8d3e74SKefeng Wang interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 248aa8d3e74SKefeng Wang 249aa8d3e74SKefeng Wang its_dsa: interrupt-controller@c6000000 { 250aa8d3e74SKefeng Wang compatible = "arm,gic-v3-its"; 251aa8d3e74SKefeng Wang msi-controller; 252aa8d3e74SKefeng Wang #msi-cells = <1>; 253aa8d3e74SKefeng Wang reg = <0x0 0xc6000000 0x0 0x40000>; 254aa8d3e74SKefeng Wang }; 255aa8d3e74SKefeng Wang }; 256aa8d3e74SKefeng Wang 257aa8d3e74SKefeng Wang timer { 258aa8d3e74SKefeng Wang compatible = "arm,armv8-timer"; 259aa8d3e74SKefeng Wang interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 260aa8d3e74SKefeng Wang <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 261aa8d3e74SKefeng Wang <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 262aa8d3e74SKefeng Wang <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 263aa8d3e74SKefeng Wang }; 264aa8d3e74SKefeng Wang 265aa8d3e74SKefeng Wang pmu { 266aa8d3e74SKefeng Wang compatible = "arm,cortex-a57-pmu"; 267aa8d3e74SKefeng Wang interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 268aa8d3e74SKefeng Wang }; 269aa8d3e74SKefeng Wang 270aa8d3e74SKefeng Wang mbigen_pcie@a0080000 { 271aa8d3e74SKefeng Wang compatible = "hisilicon,mbigen-v2"; 272aa8d3e74SKefeng Wang reg = <0x0 0xa0080000 0x0 0x10000>; 273aa8d3e74SKefeng Wang 274aa8d3e74SKefeng Wang mbigen_usb: intc_usb { 275aa8d3e74SKefeng Wang msi-parent = <&its_dsa 0x40080>; 276aa8d3e74SKefeng Wang interrupt-controller; 277aa8d3e74SKefeng Wang #interrupt-cells = <2>; 278aa8d3e74SKefeng Wang num-pins = <2>; 279aa8d3e74SKefeng Wang }; 280aa8d3e74SKefeng Wang }; 281aa8d3e74SKefeng Wang 282aa8d3e74SKefeng Wang soc { 283aa8d3e74SKefeng Wang compatible = "simple-bus"; 284aa8d3e74SKefeng Wang #address-cells = <2>; 285aa8d3e74SKefeng Wang #size-cells = <2>; 286aa8d3e74SKefeng Wang ranges; 287aa8d3e74SKefeng Wang 288aa8d3e74SKefeng Wang usb_ohci: ohci@a7030000 { 289aa8d3e74SKefeng Wang compatible = "generic-ohci"; 290aa8d3e74SKefeng Wang reg = <0x0 0xa7030000 0x0 0x10000>; 291aa8d3e74SKefeng Wang interrupt-parent = <&mbigen_usb>; 292aa8d3e74SKefeng Wang interrupts = <64 4>; 293aa8d3e74SKefeng Wang dma-coherent; 294aa8d3e74SKefeng Wang status = "disabled"; 295aa8d3e74SKefeng Wang }; 296aa8d3e74SKefeng Wang 297aa8d3e74SKefeng Wang usb_ehci: ehci@a7020000 { 298aa8d3e74SKefeng Wang compatible = "generic-ehci"; 299aa8d3e74SKefeng Wang reg = <0x0 0xa7020000 0x0 0x10000>; 300aa8d3e74SKefeng Wang interrupt-parent = <&mbigen_usb>; 301aa8d3e74SKefeng Wang interrupts = <65 4>; 302aa8d3e74SKefeng Wang dma-coherent; 303aa8d3e74SKefeng Wang status = "disabled"; 304aa8d3e74SKefeng Wang }; 305aa8d3e74SKefeng Wang }; 306aa8d3e74SKefeng Wang 307aa8d3e74SKefeng Wang}; 308