1aa8d3e74SKefeng Wang/** 2aa8d3e74SKefeng Wang * dts file for Hisilicon D03 Development Board 3aa8d3e74SKefeng Wang * 4aa8d3e74SKefeng Wang * Copyright (C) 2016 Hisilicon Ltd. 5aa8d3e74SKefeng Wang * 6aa8d3e74SKefeng Wang * This program is free software; you can redistribute it and/or modify 7aa8d3e74SKefeng Wang * it under the terms of the GNU General Public License version 2 as 8aa8d3e74SKefeng Wang * publishhed by the Free Software Foundation. 9aa8d3e74SKefeng Wang * 10aa8d3e74SKefeng Wang */ 11aa8d3e74SKefeng Wang 12aa8d3e74SKefeng Wang#include <dt-bindings/interrupt-controller/arm-gic.h> 13aa8d3e74SKefeng Wang 14aa8d3e74SKefeng Wang/ { 15aa8d3e74SKefeng Wang compatible = "hisilicon,hip06-d03"; 16aa8d3e74SKefeng Wang interrupt-parent = <&gic>; 17aa8d3e74SKefeng Wang #address-cells = <2>; 18aa8d3e74SKefeng Wang #size-cells = <2>; 19aa8d3e74SKefeng Wang 20aa8d3e74SKefeng Wang psci { 21aa8d3e74SKefeng Wang compatible = "arm,psci-0.2"; 22aa8d3e74SKefeng Wang method = "smc"; 23aa8d3e74SKefeng Wang }; 24aa8d3e74SKefeng Wang 25aa8d3e74SKefeng Wang cpus { 26aa8d3e74SKefeng Wang #address-cells = <1>; 27aa8d3e74SKefeng Wang #size-cells = <0>; 28aa8d3e74SKefeng Wang 29aa8d3e74SKefeng Wang cpu-map { 30aa8d3e74SKefeng Wang cluster0 { 31aa8d3e74SKefeng Wang core0 { 32aa8d3e74SKefeng Wang cpu = <&cpu0>; 33aa8d3e74SKefeng Wang }; 34aa8d3e74SKefeng Wang core1 { 35aa8d3e74SKefeng Wang cpu = <&cpu1>; 36aa8d3e74SKefeng Wang }; 37aa8d3e74SKefeng Wang core2 { 38aa8d3e74SKefeng Wang cpu = <&cpu2>; 39aa8d3e74SKefeng Wang }; 40aa8d3e74SKefeng Wang core3 { 41aa8d3e74SKefeng Wang cpu = <&cpu3>; 42aa8d3e74SKefeng Wang }; 43aa8d3e74SKefeng Wang }; 44aa8d3e74SKefeng Wang cluster1 { 45aa8d3e74SKefeng Wang core0 { 46aa8d3e74SKefeng Wang cpu = <&cpu4>; 47aa8d3e74SKefeng Wang }; 48aa8d3e74SKefeng Wang core1 { 49aa8d3e74SKefeng Wang cpu = <&cpu5>; 50aa8d3e74SKefeng Wang }; 51aa8d3e74SKefeng Wang core2 { 52aa8d3e74SKefeng Wang cpu = <&cpu6>; 53aa8d3e74SKefeng Wang }; 54aa8d3e74SKefeng Wang core3 { 55aa8d3e74SKefeng Wang cpu = <&cpu7>; 56aa8d3e74SKefeng Wang }; 57aa8d3e74SKefeng Wang }; 58aa8d3e74SKefeng Wang cluster2 { 59aa8d3e74SKefeng Wang core0 { 60aa8d3e74SKefeng Wang cpu = <&cpu8>; 61aa8d3e74SKefeng Wang }; 62aa8d3e74SKefeng Wang core1 { 63aa8d3e74SKefeng Wang cpu = <&cpu9>; 64aa8d3e74SKefeng Wang }; 65aa8d3e74SKefeng Wang core2 { 66aa8d3e74SKefeng Wang cpu = <&cpu10>; 67aa8d3e74SKefeng Wang }; 68aa8d3e74SKefeng Wang core3 { 69aa8d3e74SKefeng Wang cpu = <&cpu11>; 70aa8d3e74SKefeng Wang }; 71aa8d3e74SKefeng Wang }; 72aa8d3e74SKefeng Wang cluster3 { 73aa8d3e74SKefeng Wang core0 { 74aa8d3e74SKefeng Wang cpu = <&cpu12>; 75aa8d3e74SKefeng Wang }; 76aa8d3e74SKefeng Wang core1 { 77aa8d3e74SKefeng Wang cpu = <&cpu13>; 78aa8d3e74SKefeng Wang }; 79aa8d3e74SKefeng Wang core2 { 80aa8d3e74SKefeng Wang cpu = <&cpu14>; 81aa8d3e74SKefeng Wang }; 82aa8d3e74SKefeng Wang core3 { 83aa8d3e74SKefeng Wang cpu = <&cpu15>; 84aa8d3e74SKefeng Wang }; 85aa8d3e74SKefeng Wang }; 86aa8d3e74SKefeng Wang }; 87aa8d3e74SKefeng Wang 88aa8d3e74SKefeng Wang cpu0: cpu@10000 { 89aa8d3e74SKefeng Wang device_type = "cpu"; 90aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 91aa8d3e74SKefeng Wang reg = <0x10000>; 92aa8d3e74SKefeng Wang enable-method = "psci"; 93aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 94aa8d3e74SKefeng Wang }; 95aa8d3e74SKefeng Wang 96aa8d3e74SKefeng Wang cpu1: cpu@10001 { 97aa8d3e74SKefeng Wang device_type = "cpu"; 98aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 99aa8d3e74SKefeng Wang reg = <0x10001>; 100aa8d3e74SKefeng Wang enable-method = "psci"; 101aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 102aa8d3e74SKefeng Wang }; 103aa8d3e74SKefeng Wang 104aa8d3e74SKefeng Wang cpu2: cpu@10002 { 105aa8d3e74SKefeng Wang device_type = "cpu"; 106aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 107aa8d3e74SKefeng Wang reg = <0x10002>; 108aa8d3e74SKefeng Wang enable-method = "psci"; 109aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 110aa8d3e74SKefeng Wang }; 111aa8d3e74SKefeng Wang 112aa8d3e74SKefeng Wang cpu3: cpu@10003 { 113aa8d3e74SKefeng Wang device_type = "cpu"; 114aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 115aa8d3e74SKefeng Wang reg = <0x10003>; 116aa8d3e74SKefeng Wang enable-method = "psci"; 117aa8d3e74SKefeng Wang next-level-cache = <&cluster0_l2>; 118aa8d3e74SKefeng Wang }; 119aa8d3e74SKefeng Wang 120aa8d3e74SKefeng Wang cpu4: cpu@10100 { 121aa8d3e74SKefeng Wang device_type = "cpu"; 122aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 123aa8d3e74SKefeng Wang reg = <0x10100>; 124aa8d3e74SKefeng Wang enable-method = "psci"; 125aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 126aa8d3e74SKefeng Wang }; 127aa8d3e74SKefeng Wang 128aa8d3e74SKefeng Wang cpu5: cpu@10101 { 129aa8d3e74SKefeng Wang device_type = "cpu"; 130aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 131aa8d3e74SKefeng Wang reg = <0x10101>; 132aa8d3e74SKefeng Wang enable-method = "psci"; 133aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 134aa8d3e74SKefeng Wang }; 135aa8d3e74SKefeng Wang 136aa8d3e74SKefeng Wang cpu6: cpu@10102 { 137aa8d3e74SKefeng Wang device_type = "cpu"; 138aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 139aa8d3e74SKefeng Wang reg = <0x10102>; 140aa8d3e74SKefeng Wang enable-method = "psci"; 141aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 142aa8d3e74SKefeng Wang }; 143aa8d3e74SKefeng Wang 144aa8d3e74SKefeng Wang cpu7: cpu@10103 { 145aa8d3e74SKefeng Wang device_type = "cpu"; 146aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 147aa8d3e74SKefeng Wang reg = <0x10103>; 148aa8d3e74SKefeng Wang enable-method = "psci"; 149aa8d3e74SKefeng Wang next-level-cache = <&cluster1_l2>; 150aa8d3e74SKefeng Wang }; 151aa8d3e74SKefeng Wang 152aa8d3e74SKefeng Wang cpu8: cpu@10200 { 153aa8d3e74SKefeng Wang device_type = "cpu"; 154aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 155aa8d3e74SKefeng Wang reg = <0x10200>; 156aa8d3e74SKefeng Wang enable-method = "psci"; 157aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 158aa8d3e74SKefeng Wang }; 159aa8d3e74SKefeng Wang 160aa8d3e74SKefeng Wang cpu9: cpu@10201 { 161aa8d3e74SKefeng Wang device_type = "cpu"; 162aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 163aa8d3e74SKefeng Wang reg = <0x10201>; 164aa8d3e74SKefeng Wang enable-method = "psci"; 165aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 166aa8d3e74SKefeng Wang }; 167aa8d3e74SKefeng Wang 168aa8d3e74SKefeng Wang cpu10: cpu@10202 { 169aa8d3e74SKefeng Wang device_type = "cpu"; 170aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 171aa8d3e74SKefeng Wang reg = <0x10202>; 172aa8d3e74SKefeng Wang enable-method = "psci"; 173aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 174aa8d3e74SKefeng Wang }; 175aa8d3e74SKefeng Wang 176aa8d3e74SKefeng Wang cpu11: cpu@10203 { 177aa8d3e74SKefeng Wang device_type = "cpu"; 178aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 179aa8d3e74SKefeng Wang reg = <0x10203>; 180aa8d3e74SKefeng Wang enable-method = "psci"; 181aa8d3e74SKefeng Wang next-level-cache = <&cluster2_l2>; 182aa8d3e74SKefeng Wang }; 183aa8d3e74SKefeng Wang 184aa8d3e74SKefeng Wang cpu12: cpu@10300 { 185aa8d3e74SKefeng Wang device_type = "cpu"; 186aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 187aa8d3e74SKefeng Wang reg = <0x10300>; 188aa8d3e74SKefeng Wang enable-method = "psci"; 189aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 190aa8d3e74SKefeng Wang }; 191aa8d3e74SKefeng Wang 192aa8d3e74SKefeng Wang cpu13: cpu@10301 { 193aa8d3e74SKefeng Wang device_type = "cpu"; 194aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 195aa8d3e74SKefeng Wang reg = <0x10301>; 196aa8d3e74SKefeng Wang enable-method = "psci"; 197aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 198aa8d3e74SKefeng Wang }; 199aa8d3e74SKefeng Wang 200aa8d3e74SKefeng Wang cpu14: cpu@10302 { 201aa8d3e74SKefeng Wang device_type = "cpu"; 202aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 203aa8d3e74SKefeng Wang reg = <0x10302>; 204aa8d3e74SKefeng Wang enable-method = "psci"; 205aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 206aa8d3e74SKefeng Wang }; 207aa8d3e74SKefeng Wang 208aa8d3e74SKefeng Wang cpu15: cpu@10303 { 209aa8d3e74SKefeng Wang device_type = "cpu"; 210aa8d3e74SKefeng Wang compatible = "arm,cortex-a57", "arm,armv8"; 211aa8d3e74SKefeng Wang reg = <0x10303>; 212aa8d3e74SKefeng Wang enable-method = "psci"; 213aa8d3e74SKefeng Wang next-level-cache = <&cluster3_l2>; 214aa8d3e74SKefeng Wang }; 215aa8d3e74SKefeng Wang 216aa8d3e74SKefeng Wang cluster0_l2: l2-cache0 { 217aa8d3e74SKefeng Wang compatible = "cache"; 218aa8d3e74SKefeng Wang }; 219aa8d3e74SKefeng Wang 220aa8d3e74SKefeng Wang cluster1_l2: l2-cache1 { 221aa8d3e74SKefeng Wang compatible = "cache"; 222aa8d3e74SKefeng Wang }; 223aa8d3e74SKefeng Wang 224aa8d3e74SKefeng Wang cluster2_l2: l2-cache2 { 225aa8d3e74SKefeng Wang compatible = "cache"; 226aa8d3e74SKefeng Wang }; 227aa8d3e74SKefeng Wang 228aa8d3e74SKefeng Wang cluster3_l2: l2-cache3 { 229aa8d3e74SKefeng Wang compatible = "cache"; 230aa8d3e74SKefeng Wang }; 231aa8d3e74SKefeng Wang }; 232aa8d3e74SKefeng Wang 233aa8d3e74SKefeng Wang gic: interrupt-controller@4d000000 { 234aa8d3e74SKefeng Wang compatible = "arm,gic-v3"; 235aa8d3e74SKefeng Wang #interrupt-cells = <3>; 236aa8d3e74SKefeng Wang #address-cells = <2>; 237aa8d3e74SKefeng Wang #size-cells = <2>; 238aa8d3e74SKefeng Wang ranges; 239aa8d3e74SKefeng Wang interrupt-controller; 240aa8d3e74SKefeng Wang #redistributor-regions = <1>; 241aa8d3e74SKefeng Wang redistributor-stride = <0x0 0x30000>; 242aa8d3e74SKefeng Wang reg = <0x0 0x4d000000 0 0x10000>, /* GICD */ 243aa8d3e74SKefeng Wang <0x0 0x4d100000 0 0x300000>, /* GICR */ 244aa8d3e74SKefeng Wang <0x0 0xfe000000 0 0x10000>, /* GICC */ 245aa8d3e74SKefeng Wang <0x0 0xfe010000 0 0x10000>, /* GICH */ 246aa8d3e74SKefeng Wang <0x0 0xfe020000 0 0x10000>; /* GICV */ 247aa8d3e74SKefeng Wang interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 248aa8d3e74SKefeng Wang 249aa8d3e74SKefeng Wang its_dsa: interrupt-controller@c6000000 { 250aa8d3e74SKefeng Wang compatible = "arm,gic-v3-its"; 251aa8d3e74SKefeng Wang msi-controller; 252aa8d3e74SKefeng Wang #msi-cells = <1>; 253aa8d3e74SKefeng Wang reg = <0x0 0xc6000000 0x0 0x40000>; 254aa8d3e74SKefeng Wang }; 255aa8d3e74SKefeng Wang }; 256aa8d3e74SKefeng Wang 257aa8d3e74SKefeng Wang timer { 258aa8d3e74SKefeng Wang compatible = "arm,armv8-timer"; 259aa8d3e74SKefeng Wang interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 260aa8d3e74SKefeng Wang <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 261aa8d3e74SKefeng Wang <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 262aa8d3e74SKefeng Wang <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 263aa8d3e74SKefeng Wang }; 264aa8d3e74SKefeng Wang 265aa8d3e74SKefeng Wang pmu { 266aa8d3e74SKefeng Wang compatible = "arm,cortex-a57-pmu"; 267aa8d3e74SKefeng Wang interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 268aa8d3e74SKefeng Wang }; 269aa8d3e74SKefeng Wang 270aa8d3e74SKefeng Wang mbigen_pcie@a0080000 { 271aa8d3e74SKefeng Wang compatible = "hisilicon,mbigen-v2"; 272aa8d3e74SKefeng Wang reg = <0x0 0xa0080000 0x0 0x10000>; 273aa8d3e74SKefeng Wang 274aa8d3e74SKefeng Wang mbigen_usb: intc_usb { 275aa8d3e74SKefeng Wang msi-parent = <&its_dsa 0x40080>; 276aa8d3e74SKefeng Wang interrupt-controller; 277aa8d3e74SKefeng Wang #interrupt-cells = <2>; 278aa8d3e74SKefeng Wang num-pins = <2>; 279aa8d3e74SKefeng Wang }; 280aa8d3e74SKefeng Wang }; 281aa8d3e74SKefeng Wang 2825350419fSKefeng Wang mbigen_dsa@c0080000 { 2835350419fSKefeng Wang compatible = "hisilicon,mbigen-v2"; 2845350419fSKefeng Wang reg = <0x0 0xc0080000 0x0 0x10000>; 2855350419fSKefeng Wang 2865350419fSKefeng Wang mbigen_dsaf0: intc_dsaf0 { 2875350419fSKefeng Wang msi-parent = <&its_dsa 0x40800>; 2885350419fSKefeng Wang interrupt-controller; 2895350419fSKefeng Wang #interrupt-cells = <2>; 2905350419fSKefeng Wang num-pins = <409>; 2915350419fSKefeng Wang }; 2925350419fSKefeng Wang }; 2935350419fSKefeng Wang 294aa8d3e74SKefeng Wang soc { 295aa8d3e74SKefeng Wang compatible = "simple-bus"; 296aa8d3e74SKefeng Wang #address-cells = <2>; 297aa8d3e74SKefeng Wang #size-cells = <2>; 298aa8d3e74SKefeng Wang ranges; 299aa8d3e74SKefeng Wang 300aa8d3e74SKefeng Wang usb_ohci: ohci@a7030000 { 301aa8d3e74SKefeng Wang compatible = "generic-ohci"; 302aa8d3e74SKefeng Wang reg = <0x0 0xa7030000 0x0 0x10000>; 303aa8d3e74SKefeng Wang interrupt-parent = <&mbigen_usb>; 304aa8d3e74SKefeng Wang interrupts = <64 4>; 305aa8d3e74SKefeng Wang dma-coherent; 306aa8d3e74SKefeng Wang status = "disabled"; 307aa8d3e74SKefeng Wang }; 308aa8d3e74SKefeng Wang 309aa8d3e74SKefeng Wang usb_ehci: ehci@a7020000 { 310aa8d3e74SKefeng Wang compatible = "generic-ehci"; 311aa8d3e74SKefeng Wang reg = <0x0 0xa7020000 0x0 0x10000>; 312aa8d3e74SKefeng Wang interrupt-parent = <&mbigen_usb>; 313aa8d3e74SKefeng Wang interrupts = <65 4>; 314aa8d3e74SKefeng Wang dma-coherent; 315aa8d3e74SKefeng Wang status = "disabled"; 316aa8d3e74SKefeng Wang }; 3175350419fSKefeng Wang 3185350419fSKefeng Wang peri_c_subctrl: sub_ctrl_c@60000000 { 3195350419fSKefeng Wang compatible = "hisilicon,peri-subctrl","syscon"; 3205350419fSKefeng Wang reg = <0 0x60000000 0x0 0x10000>; 3215350419fSKefeng Wang }; 3225350419fSKefeng Wang 3235350419fSKefeng Wang dsa_subctrl: dsa_subctrl@c0000000 { 3245350419fSKefeng Wang compatible = "hisilicon,dsa-subctrl", "syscon"; 3255350419fSKefeng Wang reg = <0x0 0xc0000000 0x0 0x10000>; 3265350419fSKefeng Wang }; 3275350419fSKefeng Wang 3285350419fSKefeng Wang serdes_ctrl: sds_ctrl@c2200000 { 3295350419fSKefeng Wang compatible = "syscon"; 3305350419fSKefeng Wang reg = <0 0xc2200000 0x0 0x80000>; 3315350419fSKefeng Wang }; 3325350419fSKefeng Wang 3335350419fSKefeng Wang mdio@603c0000 { 3345350419fSKefeng Wang compatible = "hisilicon,hns-mdio"; 3355350419fSKefeng Wang reg = <0x0 0x603c0000 0x0 0x1000>; 3365350419fSKefeng Wang subctrl-vbase = <&peri_c_subctrl 0x338 0xa38 0x531c 0x5a1c>; 3375350419fSKefeng Wang #address-cells = <1>; 3385350419fSKefeng Wang #size-cells = <0>; 3395350419fSKefeng Wang 3405350419fSKefeng Wang phy0: ethernet-phy@0 { 3415350419fSKefeng Wang compatible = "ethernet-phy-ieee802.3-c22"; 3425350419fSKefeng Wang reg = <0>; 3435350419fSKefeng Wang }; 3445350419fSKefeng Wang 3455350419fSKefeng Wang phy1: ethernet-phy@1 { 3465350419fSKefeng Wang compatible = "ethernet-phy-ieee802.3-c22"; 3475350419fSKefeng Wang reg = <1>; 3485350419fSKefeng Wang }; 3495350419fSKefeng Wang }; 3505350419fSKefeng Wang 3515350419fSKefeng Wang dsaf0: dsa@c7000000 { 3525350419fSKefeng Wang #address-cells = <1>; 3535350419fSKefeng Wang #size-cells = <0>; 3545350419fSKefeng Wang compatible = "hisilicon,hns-dsaf-v2"; 3555350419fSKefeng Wang mode = "6port-16rss"; 3565350419fSKefeng Wang reg = <0x0 0xc5000000 0x0 0x890000 3575350419fSKefeng Wang 0x0 0xc7000000 0x0 0x600000>; 3585350419fSKefeng Wang reg-names = "ppe-base", "dsaf-base"; 3595350419fSKefeng Wang interrupt-parent = <&mbigen_dsaf0>; 3605350419fSKefeng Wang subctrl-syscon = <&dsa_subctrl>; 3615350419fSKefeng Wang reset-field-offset = <0>; 3625350419fSKefeng Wang interrupts = 3635350419fSKefeng Wang <576 1>, <577 1>, <578 1>, <579 1>, <580 1>, 3645350419fSKefeng Wang <581 1>, <582 1>, <583 1>, <584 1>, <585 1>, 3655350419fSKefeng Wang <586 1>, <587 1>, <588 1>, <589 1>, <590 1>, 3665350419fSKefeng Wang <591 1>, <592 1>, <593 1>, <594 1>, <595 1>, 3675350419fSKefeng Wang <596 1>, <597 1>, <598 1>, <599 1>, <600 1>, 3685350419fSKefeng Wang <960 1>, <961 1>, <962 1>, <963 1>, <964 1>, 3695350419fSKefeng Wang <965 1>, <966 1>, <967 1>, <968 1>, <969 1>, 3705350419fSKefeng Wang <970 1>, <971 1>, <972 1>, <973 1>, <974 1>, 3715350419fSKefeng Wang <975 1>, <976 1>, <977 1>, <978 1>, <979 1>, 3725350419fSKefeng Wang <980 1>, <981 1>, <982 1>, <983 1>, <984 1>, 3735350419fSKefeng Wang <985 1>, <986 1>, <987 1>, <988 1>, <989 1>, 3745350419fSKefeng Wang <990 1>, <991 1>, <992 1>, <993 1>, <994 1>, 3755350419fSKefeng Wang <995 1>, <996 1>, <997 1>, <998 1>, <999 1>, 3765350419fSKefeng Wang <1000 1>, <1001 1>, <1002 1>, <1003 1>, <1004 1>, 3775350419fSKefeng Wang <1005 1>, <1006 1>, <1007 1>, <1008 1>, <1009 1>, 3785350419fSKefeng Wang <1010 1>, <1011 1>, <1012 1>, <1013 1>, <1014 1>, 3795350419fSKefeng Wang <1015 1>, <1016 1>, <1017 1>, <1018 1>, <1019 1>, 3805350419fSKefeng Wang <1020 1>, <1021 1>, <1022 1>, <1023 1>, <1024 1>, 3815350419fSKefeng Wang <1025 1>, <1026 1>, <1027 1>, <1028 1>, <1029 1>, 3825350419fSKefeng Wang <1030 1>, <1031 1>, <1032 1>, <1033 1>, <1034 1>, 3835350419fSKefeng Wang <1035 1>, <1036 1>, <1037 1>, <1038 1>, <1039 1>, 3845350419fSKefeng Wang <1040 1>, <1041 1>, <1042 1>, <1043 1>, <1044 1>, 3855350419fSKefeng Wang <1045 1>, <1046 1>, <1047 1>, <1048 1>, <1049 1>, 3865350419fSKefeng Wang <1050 1>, <1051 1>, <1052 1>, <1053 1>, <1054 1>, 3875350419fSKefeng Wang <1055 1>, <1056 1>, <1057 1>, <1058 1>, <1059 1>, 3885350419fSKefeng Wang <1060 1>, <1061 1>, <1062 1>, <1063 1>, <1064 1>, 3895350419fSKefeng Wang <1065 1>, <1066 1>, <1067 1>, <1068 1>, <1069 1>, 3905350419fSKefeng Wang <1070 1>, <1071 1>, <1072 1>, <1073 1>, <1074 1>, 3915350419fSKefeng Wang <1075 1>, <1076 1>, <1077 1>, <1078 1>, <1079 1>, 3925350419fSKefeng Wang <1080 1>, <1081 1>, <1082 1>, <1083 1>, <1084 1>, 3935350419fSKefeng Wang <1085 1>, <1086 1>, <1087 1>, <1088 1>, <1089 1>, 3945350419fSKefeng Wang <1090 1>, <1091 1>, <1092 1>, <1093 1>, <1094 1>, 3955350419fSKefeng Wang <1095 1>, <1096 1>, <1097 1>, <1098 1>, <1099 1>, 3965350419fSKefeng Wang <1100 1>, <1101 1>, <1102 1>, <1103 1>, <1104 1>, 3975350419fSKefeng Wang <1105 1>, <1106 1>, <1107 1>, <1108 1>, <1109 1>, 3985350419fSKefeng Wang <1110 1>, <1111 1>, <1112 1>, <1113 1>, <1114 1>, 3995350419fSKefeng Wang <1115 1>, <1116 1>, <1117 1>, <1118 1>, <1119 1>, 4005350419fSKefeng Wang <1120 1>, <1121 1>, <1122 1>, <1123 1>, <1124 1>, 4015350419fSKefeng Wang <1125 1>, <1126 1>, <1127 1>, <1128 1>, <1129 1>, 4025350419fSKefeng Wang <1130 1>, <1131 1>, <1132 1>, <1133 1>, <1134 1>, 4035350419fSKefeng Wang <1135 1>, <1136 1>, <1137 1>, <1138 1>, <1139 1>, 4045350419fSKefeng Wang <1140 1>, <1141 1>, <1142 1>, <1143 1>, <1144 1>, 4055350419fSKefeng Wang <1145 1>, <1146 1>, <1147 1>, <1148 1>, <1149 1>, 4065350419fSKefeng Wang <1150 1>, <1151 1>, <1152 1>, <1153 1>, <1154 1>, 4075350419fSKefeng Wang <1155 1>, <1156 1>, <1157 1>, <1158 1>, <1159 1>, 4085350419fSKefeng Wang <1160 1>, <1161 1>, <1162 1>, <1163 1>, <1164 1>, 4095350419fSKefeng Wang <1165 1>, <1166 1>, <1167 1>, <1168 1>, <1169 1>, 4105350419fSKefeng Wang <1170 1>, <1171 1>, <1172 1>, <1173 1>, <1174 1>, 4115350419fSKefeng Wang <1175 1>, <1176 1>, <1177 1>, <1178 1>, <1179 1>, 4125350419fSKefeng Wang <1180 1>, <1181 1>, <1182 1>, <1183 1>, <1184 1>, 4135350419fSKefeng Wang <1185 1>, <1186 1>, <1187 1>, <1188 1>, <1189 1>, 4145350419fSKefeng Wang <1190 1>, <1191 1>, <1192 1>, <1193 1>, <1194 1>, 4155350419fSKefeng Wang <1195 1>, <1196 1>, <1197 1>, <1198 1>, <1199 1>, 4165350419fSKefeng Wang <1200 1>, <1201 1>, <1202 1>, <1203 1>, <1204 1>, 4175350419fSKefeng Wang <1205 1>, <1206 1>, <1207 1>, <1208 1>, <1209 1>, 4185350419fSKefeng Wang <1210 1>, <1211 1>, <1212 1>, <1213 1>, <1214 1>, 4195350419fSKefeng Wang <1215 1>, <1216 1>, <1217 1>, <1218 1>, <1219 1>, 4205350419fSKefeng Wang <1220 1>, <1221 1>, <1222 1>, <1223 1>, <1224 1>, 4215350419fSKefeng Wang <1225 1>, <1226 1>, <1227 1>, <1228 1>, <1229 1>, 4225350419fSKefeng Wang <1230 1>, <1231 1>, <1232 1>, <1233 1>, <1234 1>, 4235350419fSKefeng Wang <1235 1>, <1236 1>, <1237 1>, <1238 1>, <1239 1>, 4245350419fSKefeng Wang <1240 1>, <1241 1>, <1242 1>, <1243 1>, <1244 1>, 4255350419fSKefeng Wang <1245 1>, <1246 1>, <1247 1>, <1248 1>, <1249 1>, 4265350419fSKefeng Wang <1250 1>, <1251 1>, <1252 1>, <1253 1>, <1254 1>, 4275350419fSKefeng Wang <1255 1>, <1256 1>, <1257 1>, <1258 1>, <1259 1>, 4285350419fSKefeng Wang <1260 1>, <1261 1>, <1262 1>, <1263 1>, <1264 1>, 4295350419fSKefeng Wang <1265 1>, <1266 1>, <1267 1>, <1268 1>, <1269 1>, 4305350419fSKefeng Wang <1270 1>, <1271 1>, <1272 1>, <1273 1>, <1274 1>, 4315350419fSKefeng Wang <1275 1>, <1276 1>, <1277 1>, <1278 1>, <1279 1>, 4325350419fSKefeng Wang <1280 1>, <1281 1>, <1282 1>, <1283 1>, <1284 1>, 4335350419fSKefeng Wang <1285 1>, <1286 1>, <1287 1>, <1288 1>, <1289 1>, 4345350419fSKefeng Wang <1290 1>, <1291 1>, <1292 1>, <1293 1>, <1294 1>, 4355350419fSKefeng Wang <1295 1>, <1296 1>, <1297 1>, <1298 1>, <1299 1>, 4365350419fSKefeng Wang <1300 1>, <1301 1>, <1302 1>, <1303 1>, <1304 1>, 4375350419fSKefeng Wang <1305 1>, <1306 1>, <1307 1>, <1308 1>, <1309 1>, 4385350419fSKefeng Wang <1310 1>, <1311 1>, <1312 1>, <1313 1>, <1314 1>, 4395350419fSKefeng Wang <1315 1>, <1316 1>, <1317 1>, <1318 1>, <1319 1>, 4405350419fSKefeng Wang <1320 1>, <1321 1>, <1322 1>, <1323 1>, <1324 1>, 4415350419fSKefeng Wang <1325 1>, <1326 1>, <1327 1>, <1328 1>, <1329 1>, 4425350419fSKefeng Wang <1330 1>, <1331 1>, <1332 1>, <1333 1>, <1334 1>, 4435350419fSKefeng Wang <1335 1>, <1336 1>, <1337 1>, <1338 1>, <1339 1>, 4445350419fSKefeng Wang <1340 1>, <1341 1>, <1342 1>, <1343 1>; 4455350419fSKefeng Wang 4465350419fSKefeng Wang desc-num = <0x400>; 4475350419fSKefeng Wang buf-size = <0x1000>; 4485350419fSKefeng Wang dma-coherent; 4495350419fSKefeng Wang 4505350419fSKefeng Wang port@0 { 4515350419fSKefeng Wang reg = <0>; 4525350419fSKefeng Wang serdes-syscon = <&serdes_ctrl>; 4535350419fSKefeng Wang port-rst-offset = <0>; 4545350419fSKefeng Wang port-mode-offset = <0>; 4555350419fSKefeng Wang media-type = "fiber"; 4565350419fSKefeng Wang }; 4575350419fSKefeng Wang 4585350419fSKefeng Wang port@1 { 4595350419fSKefeng Wang reg = <1>; 4605350419fSKefeng Wang serdes-syscon= <&serdes_ctrl>; 4615350419fSKefeng Wang port-rst-offset = <1>; 4625350419fSKefeng Wang port-mode-offset = <1>; 4635350419fSKefeng Wang media-type = "fiber"; 4645350419fSKefeng Wang }; 4655350419fSKefeng Wang 4665350419fSKefeng Wang port@4 { 4675350419fSKefeng Wang reg = <4>; 4685350419fSKefeng Wang phy-handle = <&phy0>; 4695350419fSKefeng Wang serdes-syscon= <&serdes_ctrl>; 4705350419fSKefeng Wang port-rst-offset = <4>; 4715350419fSKefeng Wang port-mode-offset = <2>; 4725350419fSKefeng Wang media-type = "copper"; 4735350419fSKefeng Wang }; 4745350419fSKefeng Wang 4755350419fSKefeng Wang port@5 { 4765350419fSKefeng Wang reg = <5>; 4775350419fSKefeng Wang phy-handle = <&phy1>; 4785350419fSKefeng Wang serdes-syscon= <&serdes_ctrl>; 4795350419fSKefeng Wang port-rst-offset = <5>; 4805350419fSKefeng Wang port-mode-offset = <3>; 4815350419fSKefeng Wang media-type = "copper"; 4825350419fSKefeng Wang }; 4835350419fSKefeng Wang }; 4845350419fSKefeng Wang 4855350419fSKefeng Wang eth0: ethernet@4{ 4865350419fSKefeng Wang compatible = "hisilicon,hns-nic-v2"; 4875350419fSKefeng Wang ae-handle = <&dsaf0>; 4885350419fSKefeng Wang port-idx-in-ae = <4>; 4895350419fSKefeng Wang local-mac-address = [00 00 00 00 00 00]; 4905350419fSKefeng Wang status = "disabled"; 4915350419fSKefeng Wang dma-coherent; 4925350419fSKefeng Wang }; 4935350419fSKefeng Wang 4945350419fSKefeng Wang eth1: ethernet@5{ 4955350419fSKefeng Wang compatible = "hisilicon,hns-nic-v2"; 4965350419fSKefeng Wang ae-handle = <&dsaf0>; 4975350419fSKefeng Wang port-idx-in-ae = <5>; 4985350419fSKefeng Wang local-mac-address = [00 00 00 00 00 00]; 4995350419fSKefeng Wang status = "disabled"; 5005350419fSKefeng Wang dma-coherent; 5015350419fSKefeng Wang }; 5025350419fSKefeng Wang 5035350419fSKefeng Wang eth2: ethernet@0{ 5045350419fSKefeng Wang compatible = "hisilicon,hns-nic-v2"; 5055350419fSKefeng Wang ae-handle = <&dsaf0>; 5065350419fSKefeng Wang port-idx-in-ae = <0>; 5075350419fSKefeng Wang local-mac-address = [00 00 00 00 00 00]; 5085350419fSKefeng Wang status = "disabled"; 5095350419fSKefeng Wang dma-coherent; 5105350419fSKefeng Wang }; 5115350419fSKefeng Wang 5125350419fSKefeng Wang eth3: ethernet@1{ 5135350419fSKefeng Wang compatible = "hisilicon,hns-nic-v2"; 5145350419fSKefeng Wang ae-handle = <&dsaf0>; 5155350419fSKefeng Wang port-idx-in-ae = <1>; 5165350419fSKefeng Wang local-mac-address = [00 00 00 00 00 00]; 5175350419fSKefeng Wang status = "disabled"; 5185350419fSKefeng Wang dma-coherent; 5195350419fSKefeng Wang }; 520aa8d3e74SKefeng Wang }; 521aa8d3e74SKefeng Wang 522aa8d3e74SKefeng Wang}; 523