11d0ea069SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-only 2fcab303cSDing Tianhong/** 3fcab303cSDing Tianhong * dts file for Hisilicon D02 Development Board 4fcab303cSDing Tianhong * 5fcab303cSDing Tianhong * Copyright (C) 2014,2015 Hisilicon Ltd. 6fcab303cSDing Tianhong */ 7fcab303cSDing Tianhong 8fcab303cSDing Tianhong/dts-v1/; 9fcab303cSDing Tianhong 1082a14b1eSKefeng Wang#include <dt-bindings/gpio/gpio.h> 11fcab303cSDing Tianhong#include "hip05.dtsi" 12fcab303cSDing Tianhong 13fcab303cSDing Tianhong/ { 14fcab303cSDing Tianhong model = "Hisilicon Hip05 D02 Development Board"; 15fcab303cSDing Tianhong compatible = "hisilicon,hip05-d02"; 16fcab303cSDing Tianhong 17d8bcaabeSRob Herring memory@0 { 18fcab303cSDing Tianhong device_type = "memory"; 19fcab303cSDing Tianhong reg = <0x0 0x00000000 0x0 0x80000000>; 20fcab303cSDing Tianhong }; 21fcab303cSDing Tianhong 22fcab303cSDing Tianhong aliases { 23fcab303cSDing Tianhong serial0 = &uart0; 24fcab303cSDing Tianhong }; 25fcab303cSDing Tianhong 26fcab303cSDing Tianhong chosen { 27fcab303cSDing Tianhong stdout-path = "serial0:115200n8"; 28fcab303cSDing Tianhong }; 2982a14b1eSKefeng Wang 3082a14b1eSKefeng Wang gpio_keys { 3182a14b1eSKefeng Wang compatible = "gpio-keys"; 3282a14b1eSKefeng Wang #address-cells = <1>; 3382a14b1eSKefeng Wang #size-cells = <0>; 3482a14b1eSKefeng Wang 3582a14b1eSKefeng Wang pwrbutton { 3682a14b1eSKefeng Wang label = "Power Button"; 3782a14b1eSKefeng Wang gpios = <&porta 8 GPIO_ACTIVE_LOW>; 3882a14b1eSKefeng Wang linux,code = <116>; 3982a14b1eSKefeng Wang debounce-interval = <0>; 4082a14b1eSKefeng Wang }; 4182a14b1eSKefeng Wang }; 42fcab303cSDing Tianhong}; 43fcab303cSDing Tianhong 44fcab303cSDing Tianhong&uart0 { 45fcab303cSDing Tianhong status = "ok"; 46fcab303cSDing Tianhong}; 4782a14b1eSKefeng Wang 4882a14b1eSKefeng Wang&peri_gpio0 { 4982a14b1eSKefeng Wang status = "ok"; 5082a14b1eSKefeng Wang}; 51162d23bfSKefeng Wang 52162d23bfSKefeng Wang&lbc { 53162d23bfSKefeng Wang status = "ok"; 54162d23bfSKefeng Wang #address-cells = <2>; 55162d23bfSKefeng Wang #size-cells = <1>; 56162d23bfSKefeng Wang ranges = <0 0 0x0 0x90000000 0x08000000>, 57162d23bfSKefeng Wang <1 0 0x0 0x98000000 0x08000000>; 58162d23bfSKefeng Wang 59162d23bfSKefeng Wang nor-flash@0,0 { 60162d23bfSKefeng Wang #address-cells = <1>; 61162d23bfSKefeng Wang #size-cells = <1>; 62162d23bfSKefeng Wang compatible = "numonyx,js28f00a", "cfi-flash"; 63162d23bfSKefeng Wang reg = <0 0x0 0x08000000>; 64162d23bfSKefeng Wang bank-width = <2>; 65162d23bfSKefeng Wang /* The three parts may not used */ 66162d23bfSKefeng Wang partition@0 { 67162d23bfSKefeng Wang label = "BIOS"; 68162d23bfSKefeng Wang reg = <0x0 0x300000>; 69162d23bfSKefeng Wang }; 70162d23bfSKefeng Wang partition@300000 { 71162d23bfSKefeng Wang label = "Linux"; 72162d23bfSKefeng Wang reg = <0x300000 0xa00000>; 73162d23bfSKefeng Wang }; 74162d23bfSKefeng Wang partition@1000000 { 75162d23bfSKefeng Wang label = "Rootfs"; 76162d23bfSKefeng Wang reg = <0x01000000 0x02000000>; 77162d23bfSKefeng Wang }; 78162d23bfSKefeng Wang }; 79162d23bfSKefeng Wang 80162d23bfSKefeng Wang cpld@1,0 { 81162d23bfSKefeng Wang compatible = "hisilicon,hip05-cpld"; 82162d23bfSKefeng Wang reg = <1 0x0 0x100>; 83162d23bfSKefeng Wang }; 84162d23bfSKefeng Wang}; 85