1274c516dSManivannan Sadhasivam// SPDX-License-Identifier: GPL-2.0
2274c516dSManivannan Sadhasivam/*
3274c516dSManivannan Sadhasivam * Pinctrl dts file for HiSilicon HiKey970 development board
4274c516dSManivannan Sadhasivam */
5274c516dSManivannan Sadhasivam
6274c516dSManivannan Sadhasivam#include <dt-bindings/pinctrl/hisi.h>
7274c516dSManivannan Sadhasivam
8274c516dSManivannan Sadhasivam/ {
9274c516dSManivannan Sadhasivam	soc {
10274c516dSManivannan Sadhasivam		range: gpio-range {
11274c516dSManivannan Sadhasivam			#pinctrl-single,gpio-range-cells = <3>;
12274c516dSManivannan Sadhasivam		};
13274c516dSManivannan Sadhasivam
14274c516dSManivannan Sadhasivam		pmx0: pinmux@e896c000 {
15274c516dSManivannan Sadhasivam			compatible = "pinctrl-single";
16274c516dSManivannan Sadhasivam			reg = <0x0 0xe896c000 0x0 0x72c>;
17274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
18274c516dSManivannan Sadhasivam			#gpio-range-cells = <0x3>;
19274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
20274c516dSManivannan Sadhasivam			pinctrl-single,function-mask = <0x7>;
21274c516dSManivannan Sadhasivam			/* pin base, nr pins & gpio function */
22274c516dSManivannan Sadhasivam			pinctrl-single,gpio-range = <&range 0 82 0>;
23274c516dSManivannan Sadhasivam		};
24274c516dSManivannan Sadhasivam
25274c516dSManivannan Sadhasivam		pmx2: pinmux@e896c800 {
26274c516dSManivannan Sadhasivam			compatible = "pinconf-single";
27274c516dSManivannan Sadhasivam			reg = <0x0 0xe896c800 0x0 0x72c>;
28274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
29274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
30274c516dSManivannan Sadhasivam		};
31274c516dSManivannan Sadhasivam
32274c516dSManivannan Sadhasivam		pmx5: pinmux@fc182000 {
33274c516dSManivannan Sadhasivam			compatible = "pinctrl-single";
34274c516dSManivannan Sadhasivam			reg = <0x0 0xfc182000 0x0 0x028>;
35274c516dSManivannan Sadhasivam			#gpio-range-cells = <3>;
36274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
37274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
38274c516dSManivannan Sadhasivam			pinctrl-single,function-mask = <0x7>;
39274c516dSManivannan Sadhasivam			/* pin base, nr pins & gpio function */
40274c516dSManivannan Sadhasivam			pinctrl-single,gpio-range = <&range 0 10 0>;
41274c516dSManivannan Sadhasivam
42274c516dSManivannan Sadhasivam		};
43274c516dSManivannan Sadhasivam
44274c516dSManivannan Sadhasivam		pmx6: pinmux@fc182800 {
45274c516dSManivannan Sadhasivam			compatible = "pinconf-single";
46274c516dSManivannan Sadhasivam			reg = <0x0 0xfc182800 0x0 0x028>;
47274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
48274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
49274c516dSManivannan Sadhasivam		};
50274c516dSManivannan Sadhasivam
51274c516dSManivannan Sadhasivam		pmx7: pinmux@ff37e000 {
52274c516dSManivannan Sadhasivam			compatible = "pinctrl-single";
53274c516dSManivannan Sadhasivam			reg = <0x0 0xff37e000 0x0 0x030>;
54274c516dSManivannan Sadhasivam			#gpio-range-cells = <3>;
55274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
56274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
57274c516dSManivannan Sadhasivam			pinctrl-single,function-mask = <7>;
58274c516dSManivannan Sadhasivam			/* pin base, nr pins & gpio function */
59274c516dSManivannan Sadhasivam			pinctrl-single,gpio-range = <&range 0 12 0>;
60274c516dSManivannan Sadhasivam		};
61274c516dSManivannan Sadhasivam
62274c516dSManivannan Sadhasivam		pmx8: pinmux@ff37e800 {
63274c516dSManivannan Sadhasivam			compatible = "pinconf-single";
64274c516dSManivannan Sadhasivam			reg = <0x0 0xff37e800 0x0 0x030>;
65274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
66274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
67274c516dSManivannan Sadhasivam		};
68274c516dSManivannan Sadhasivam
69274c516dSManivannan Sadhasivam		pmx1: pinmux@fff11000 {
70274c516dSManivannan Sadhasivam			compatible = "pinctrl-single";
71274c516dSManivannan Sadhasivam			reg = <0x0 0xfff11000 0x0 0x73c>;
72274c516dSManivannan Sadhasivam			#gpio-range-cells = <0x3>;
73274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
74274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
75274c516dSManivannan Sadhasivam			pinctrl-single,function-mask = <0x7>;
76274c516dSManivannan Sadhasivam			/* pin base, nr pins & gpio function */
77274c516dSManivannan Sadhasivam			pinctrl-single,gpio-range = <&range 0 46 0>;
78274c516dSManivannan Sadhasivam		};
79274c516dSManivannan Sadhasivam
80274c516dSManivannan Sadhasivam		pmx16: pinmux@fff11800 {
81274c516dSManivannan Sadhasivam			compatible = "pinconf-single";
82274c516dSManivannan Sadhasivam			reg = <0x0 0xfff11800 0x0 0x73c>;
83274c516dSManivannan Sadhasivam			#pinctrl-cells = <1>;
84274c516dSManivannan Sadhasivam			pinctrl-single,register-width = <0x20>;
85274c516dSManivannan Sadhasivam		};
86274c516dSManivannan Sadhasivam	};
87274c516dSManivannan Sadhasivam};
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