186e8f528SBintian Wang/*
286e8f528SBintian Wang * dts file for Hisilicon HiKey Development Board
386e8f528SBintian Wang *
486e8f528SBintian Wang * Copyright (C) 2015, Hisilicon Ltd.
586e8f528SBintian Wang *
686e8f528SBintian Wang */
786e8f528SBintian Wang
886e8f528SBintian Wang/dts-v1/;
986e8f528SBintian Wang#include "hi6220.dtsi"
10379e9bf5SZhong Kaihua#include "hikey-pinctrl.dtsi"
11a817137aSChen Feng#include <dt-bindings/gpio/gpio.h>
1286e8f528SBintian Wang
1386e8f528SBintian Wang/ {
1486e8f528SBintian Wang	model = "HiKey Development Board";
1586e8f528SBintian Wang	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
1686e8f528SBintian Wang
1786e8f528SBintian Wang	aliases {
18a362ec8fSTyler Baker		serial0 = &uart0; /* On board UART0 */
19a362ec8fSTyler Baker		serial1 = &uart1; /* BT UART */
20a362ec8fSTyler Baker		serial2 = &uart2; /* LS Expansion UART0 */
21a362ec8fSTyler Baker		serial3 = &uart3; /* LS Expansion UART1 */
2286e8f528SBintian Wang	};
2386e8f528SBintian Wang
2486e8f528SBintian Wang	chosen {
25a362ec8fSTyler Baker		stdout-path = "serial3:115200n8";
2686e8f528SBintian Wang	};
2786e8f528SBintian Wang
286da3aba6SLeo Yan	/*
296da3aba6SLeo Yan	 * Reserve below regions from memory node:
306da3aba6SLeo Yan	 *
316da3aba6SLeo Yan	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
326da3aba6SLeo Yan	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data
336da3aba6SLeo Yan	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section
346da3aba6SLeo Yan	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE
356da3aba6SLeo Yan	 */
3686e8f528SBintian Wang	memory@0 {
3786e8f528SBintian Wang		device_type = "memory";
386da3aba6SLeo Yan		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
396da3aba6SLeo Yan		      <0x00000000 0x05f00000 0x00000000 0x00eff000>,
406da3aba6SLeo Yan		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,
416da3aba6SLeo Yan		      <0x00000000 0x07410000 0x00000000 0x36bf0000>;
4286e8f528SBintian Wang	};
4360dac1b1SZhong Kaihua
4460dac1b1SZhong Kaihua	soc {
4560dac1b1SZhong Kaihua		spi0: spi@f7106000 {
4660dac1b1SZhong Kaihua			status = "ok";
4760dac1b1SZhong Kaihua		};
480c231751SGuodong Xu
490c231751SGuodong Xu		i2c0: i2c@f7100000 {
500c231751SGuodong Xu			status = "ok";
510c231751SGuodong Xu		};
520c231751SGuodong Xu
530c231751SGuodong Xu		i2c1: i2c@f7101000 {
540c231751SGuodong Xu			status = "ok";
550c231751SGuodong Xu		};
56c2aad932SGuodong Xu
57c2aad932SGuodong Xu		uart1: uart@f7111000 {
581b9c7b2dSJorge Ramirez-Ortiz			assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
591b9c7b2dSJorge Ramirez-Ortiz			assigned-clock-rates = <150000000>;
60c2aad932SGuodong Xu			status = "ok";
61c2aad932SGuodong Xu		};
62c2aad932SGuodong Xu
63c2aad932SGuodong Xu		uart2: uart@f7112000 {
64c2aad932SGuodong Xu			status = "ok";
65c2aad932SGuodong Xu		};
66c2aad932SGuodong Xu
67c2aad932SGuodong Xu		uart3: uart@f7113000 {
68c2aad932SGuodong Xu			status = "ok";
69c2aad932SGuodong Xu		};
70841478d4SGuodong Xu
71bbaf867eSLinus Walleij		/*
72bbaf867eSLinus Walleij		 * Legend: proper name = the GPIO line is used as GPIO
73bbaf867eSLinus Walleij		 *         NC = not connected (not routed from the SoC)
74bbaf867eSLinus Walleij		 *         "[PER]" = pin is muxed for peripheral (not GPIO)
75bbaf867eSLinus Walleij		 *         "" = no idea, schematic doesn't say, could be
76bbaf867eSLinus Walleij		 *              unrouted (not connected to any external pin)
77bbaf867eSLinus Walleij		 *         LSEC = Low Speed External Connector
78bbaf867eSLinus Walleij		 *         HSEC = High Speed External Connector
79bbaf867eSLinus Walleij		 *
80bbaf867eSLinus Walleij		 * Pin assignments taken from LeMaker and CircuitCo Schematics
81bbaf867eSLinus Walleij		 * Rev A1.
82bbaf867eSLinus Walleij		 *
83bbaf867eSLinus Walleij		 * For the lines routed to the external connectors the
84bbaf867eSLinus Walleij		 * lines are named after the 96Boards CE Specification 1.0,
85bbaf867eSLinus Walleij		 * Appendix "Expansion Connector Signal Description".
86bbaf867eSLinus Walleij		 *
87bbaf867eSLinus Walleij		 * When the 96Board naming of a line and the schematic name of
88bbaf867eSLinus Walleij		 * the same line are in conflict, the 96Board specification
89bbaf867eSLinus Walleij		 * takes precedence, which means that the external UART on the
90bbaf867eSLinus Walleij		 * LSEC is named UART0 while the schematic and SoC names this
91bbaf867eSLinus Walleij		 * UART2. This is only for the informational lines i.e. "[FOO]",
92bbaf867eSLinus Walleij		 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
93bbaf867eSLinus Walleij		 * ones actually used for GPIO.
94bbaf867eSLinus Walleij		 */
95bbaf867eSLinus Walleij		gpio0: gpio@f8011000 {
96bbaf867eSLinus Walleij			gpio-line-names = "PWR_HOLD", "DSI_SEL",
97bbaf867eSLinus Walleij			"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
98bbaf867eSLinus Walleij			"PWRON_DET", "5V_HUB_EN";
99bbaf867eSLinus Walleij		};
100bbaf867eSLinus Walleij
101bbaf867eSLinus Walleij		gpio1: gpio@f8012000 {
102bbaf867eSLinus Walleij			gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
103bbaf867eSLinus Walleij			"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
104bbaf867eSLinus Walleij		};
105bbaf867eSLinus Walleij
106bbaf867eSLinus Walleij		gpio2: gpio@f8013000 {
107bbaf867eSLinus Walleij			gpio-line-names =
108bbaf867eSLinus Walleij				"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
109bbaf867eSLinus Walleij				"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
110bbaf867eSLinus Walleij				"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
111bbaf867eSLinus Walleij				"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
112bbaf867eSLinus Walleij				"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
113bbaf867eSLinus Walleij				"USB_ID_DET", "USB_VBUS_DET",
114bbaf867eSLinus Walleij				"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
115bbaf867eSLinus Walleij		};
116bbaf867eSLinus Walleij
117bbaf867eSLinus Walleij		gpio3: gpio@f8014000 {
118bbaf867eSLinus Walleij			gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
119bbaf867eSLinus Walleij			"WLAN_ACTIVE", "NC", "NC";
120bbaf867eSLinus Walleij		};
121bbaf867eSLinus Walleij
122bbaf867eSLinus Walleij		gpio4: gpio@f7020000 {
123bbaf867eSLinus Walleij			gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
124bbaf867eSLinus Walleij			"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
125bbaf867eSLinus Walleij		};
126bbaf867eSLinus Walleij
127bbaf867eSLinus Walleij		gpio5: gpio@f7021000 {
128bbaf867eSLinus Walleij			gpio-line-names = "NC", "NC",
129bbaf867eSLinus Walleij			"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
130bbaf867eSLinus Walleij			"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
131bbaf867eSLinus Walleij			"[AUX_SSI1]", "NC",
132bbaf867eSLinus Walleij			"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
133bbaf867eSLinus Walleij			"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
134bbaf867eSLinus Walleij		};
135bbaf867eSLinus Walleij
136bbaf867eSLinus Walleij		gpio6: gpio@f7022000 {
137bbaf867eSLinus Walleij			gpio-line-names =
138bbaf867eSLinus Walleij			"[SPI0_DIN]", /* Pin 10: SPI0_DI */
139bbaf867eSLinus Walleij			"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
140bbaf867eSLinus Walleij			"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
141bbaf867eSLinus Walleij			"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
142bbaf867eSLinus Walleij			"NC", "NC", "NC",
143bbaf867eSLinus Walleij			"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
144bbaf867eSLinus Walleij		};
145bbaf867eSLinus Walleij
146bbaf867eSLinus Walleij		gpio7: gpio@f7023000 {
147bbaf867eSLinus Walleij			gpio-line-names = "NC", "NC", "NC", "NC",
148bbaf867eSLinus Walleij			"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
149bbaf867eSLinus Walleij			"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
150bbaf867eSLinus Walleij			"NC", "NC";
151bbaf867eSLinus Walleij		};
152bbaf867eSLinus Walleij
153bbaf867eSLinus Walleij		gpio8: gpio@f7024000 {
154bbaf867eSLinus Walleij			gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
155bbaf867eSLinus Walleij			"", "", "", "", "", "";
156bbaf867eSLinus Walleij		};
157bbaf867eSLinus Walleij
158bbaf867eSLinus Walleij		gpio9: gpio@f7025000 {
159bbaf867eSLinus Walleij			gpio-line-names = "",
160bbaf867eSLinus Walleij			"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
161bbaf867eSLinus Walleij			"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
162bbaf867eSLinus Walleij			"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
163bbaf867eSLinus Walleij		};
164bbaf867eSLinus Walleij
165bbaf867eSLinus Walleij		gpio10: gpio@f7026000 {
166bbaf867eSLinus Walleij			gpio-line-names = "BOOT_SEL",
167bbaf867eSLinus Walleij			"[ISP_CCLK1]",
168bbaf867eSLinus Walleij			"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
169bbaf867eSLinus Walleij			"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
170bbaf867eSLinus Walleij			"NC", "NC",
171bbaf867eSLinus Walleij			"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
172bbaf867eSLinus Walleij			"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
173bbaf867eSLinus Walleij		};
174bbaf867eSLinus Walleij
175bbaf867eSLinus Walleij		gpio11: gpio@f7027000 {
176bbaf867eSLinus Walleij			gpio-line-names =
177bbaf867eSLinus Walleij			"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
178bbaf867eSLinus Walleij			"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
179bbaf867eSLinus Walleij			"", "NC", "NC", "NC", "", "";
180bbaf867eSLinus Walleij		};
181bbaf867eSLinus Walleij
182bbaf867eSLinus Walleij		gpio12: gpio@f7028000 {
183bbaf867eSLinus Walleij			gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
184bbaf867eSLinus Walleij			"[BT_PCM_DO]",
185bbaf867eSLinus Walleij			"NC", "NC", "NC", "NC",
186bbaf867eSLinus Walleij			"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
187bbaf867eSLinus Walleij		};
188bbaf867eSLinus Walleij
189bbaf867eSLinus Walleij		gpio13: gpio@f7029000 {
190bbaf867eSLinus Walleij			gpio-line-names = "[UART0_RX]", "[UART0_TX]",
191bbaf867eSLinus Walleij			"[BT_UART1_CTS]", "[BT_UART1_RTS]",
192bbaf867eSLinus Walleij			"[BT_UART1_RX]", "[BT_UART1_TX]",
193bbaf867eSLinus Walleij			"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
194bbaf867eSLinus Walleij			"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
195bbaf867eSLinus Walleij		};
196bbaf867eSLinus Walleij
197bbaf867eSLinus Walleij		gpio14: gpio@f702a000 {
198bbaf867eSLinus Walleij			gpio-line-names =
199bbaf867eSLinus Walleij			"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
200bbaf867eSLinus Walleij			"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
201bbaf867eSLinus Walleij			"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
202bbaf867eSLinus Walleij			"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
203bbaf867eSLinus Walleij			"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
204bbaf867eSLinus Walleij			"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
205bbaf867eSLinus Walleij			"[I2C2_SCL]", "[I2C2_SDA]";
206bbaf867eSLinus Walleij		};
207bbaf867eSLinus Walleij
208bbaf867eSLinus Walleij		gpio15: gpio@f702b000 {
209bbaf867eSLinus Walleij			gpio-line-names = "", "", "", "", "", "", "NC", "";
210bbaf867eSLinus Walleij		};
211bbaf867eSLinus Walleij
212bbaf867eSLinus Walleij		/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
213bbaf867eSLinus Walleij
214841478d4SGuodong Xu		dwmmc_2: dwmmc2@f723f000 {
215841478d4SGuodong Xu			ti,non-removable;
216841478d4SGuodong Xu			non-removable;
217841478d4SGuodong Xu			/* WL_EN */
218841478d4SGuodong Xu			vmmc-supply = <&wlan_en_reg>;
219841478d4SGuodong Xu
220841478d4SGuodong Xu			#address-cells = <0x1>;
221841478d4SGuodong Xu			#size-cells = <0x0>;
222841478d4SGuodong Xu			wlcore: wlcore@2 {
223841478d4SGuodong Xu				compatible = "ti,wl1835";
224841478d4SGuodong Xu				reg = <2>;	/* sdio func num */
225841478d4SGuodong Xu				/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
226841478d4SGuodong Xu				interrupt-parent = <&gpio1>;
227841478d4SGuodong Xu				interrupts = <3 IRQ_TYPE_EDGE_RISING>;
228841478d4SGuodong Xu			};
229841478d4SGuodong Xu		};
230841478d4SGuodong Xu
231841478d4SGuodong Xu		wlan_en_reg: regulator@1 {
232841478d4SGuodong Xu			compatible = "regulator-fixed";
233841478d4SGuodong Xu			regulator-name = "wlan-en-regulator";
234841478d4SGuodong Xu			regulator-min-microvolt = <1800000>;
235841478d4SGuodong Xu			regulator-max-microvolt = <1800000>;
236841478d4SGuodong Xu			/* WLAN_EN GPIO */
237841478d4SGuodong Xu			gpio = <&gpio0 5 0>;
238841478d4SGuodong Xu			/* WLAN card specific delay */
239841478d4SGuodong Xu			startup-delay-us = <70000>;
240841478d4SGuodong Xu			enable-active-high;
241841478d4SGuodong Xu		};
24260dac1b1SZhong Kaihua	};
243ad05f38bSGuodong Xu
244ad05f38bSGuodong Xu	leds {
245ad05f38bSGuodong Xu		compatible = "gpio-leds";
246ad05f38bSGuodong Xu		user_led4 {
247ad05f38bSGuodong Xu			label = "user_led4";
248ad05f38bSGuodong Xu			gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
249ad05f38bSGuodong Xu			linux,default-trigger = "heartbeat";
250ad05f38bSGuodong Xu		};
251ad05f38bSGuodong Xu
252ad05f38bSGuodong Xu		user_led3 {
253ad05f38bSGuodong Xu			label = "user_led3";
254ad05f38bSGuodong Xu			gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
255ad05f38bSGuodong Xu			linux,default-trigger = "mmc0";
256ad05f38bSGuodong Xu		};
257ad05f38bSGuodong Xu
258ad05f38bSGuodong Xu		user_led2 {
259ad05f38bSGuodong Xu			label = "user_led2";
260ad05f38bSGuodong Xu			gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
261ad05f38bSGuodong Xu			linux,default-trigger = "mmc1";
262ad05f38bSGuodong Xu		};
263ad05f38bSGuodong Xu
264ad05f38bSGuodong Xu		user_led1 {
265ad05f38bSGuodong Xu			label = "user_led1";
266ad05f38bSGuodong Xu			gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
267ad05f38bSGuodong Xu			linux,default-trigger = "cpu0";
268ad05f38bSGuodong Xu		};
269ad05f38bSGuodong Xu
270ad05f38bSGuodong Xu		wlan_active_led {
271ad05f38bSGuodong Xu			label = "wifi_active";
272ad05f38bSGuodong Xu			gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
273ad05f38bSGuodong Xu			linux,default-trigger = "phy0tx";
274ad05f38bSGuodong Xu			default-state = "off";
275ad05f38bSGuodong Xu		};
276ad05f38bSGuodong Xu
277ad05f38bSGuodong Xu		bt_active_led {
278ad05f38bSGuodong Xu			label = "bt_active";
279ad05f38bSGuodong Xu			gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
280ad05f38bSGuodong Xu			linux,default-trigger = "hci0rx";
281ad05f38bSGuodong Xu			default-state = "off";
282ad05f38bSGuodong Xu		};
283ad05f38bSGuodong Xu	};
284a817137aSChen Feng
285a817137aSChen Feng	pmic: pmic@f8000000 {
286a817137aSChen Feng		compatible = "hisilicon,hi655x-pmic";
287a817137aSChen Feng		reg = <0x0 0xf8000000 0x0 0x1000>;
288a817137aSChen Feng		interrupt-controller;
289a817137aSChen Feng		#interrupt-cells = <2>;
290a817137aSChen Feng		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
291a817137aSChen Feng
292a817137aSChen Feng		regulators {
293a817137aSChen Feng			ldo2: LDO2 {
294a817137aSChen Feng				regulator-name = "LDO2_2V8";
295a817137aSChen Feng				regulator-min-microvolt = <2500000>;
296a817137aSChen Feng				regulator-max-microvolt = <3200000>;
297a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
298a817137aSChen Feng			};
299a817137aSChen Feng
300a817137aSChen Feng			ldo7: LDO7 {
301a817137aSChen Feng				regulator-name = "LDO7_SDIO";
302a817137aSChen Feng				regulator-min-microvolt = <1800000>;
303a817137aSChen Feng				regulator-max-microvolt = <3300000>;
304a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
305a817137aSChen Feng			};
306a817137aSChen Feng
307a817137aSChen Feng			ldo10: LDO10 {
308a817137aSChen Feng				regulator-name = "LDO10_2V85";
309a817137aSChen Feng				regulator-min-microvolt = <1800000>;
310a817137aSChen Feng				regulator-max-microvolt = <3000000>;
311a817137aSChen Feng				regulator-enable-ramp-delay = <360>;
312a817137aSChen Feng			};
313a817137aSChen Feng
314a817137aSChen Feng			ldo13: LDO13 {
315a817137aSChen Feng				regulator-name = "LDO13_1V8";
316a817137aSChen Feng				regulator-min-microvolt = <1600000>;
317a817137aSChen Feng				regulator-max-microvolt = <1950000>;
318a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
319a817137aSChen Feng			};
320a817137aSChen Feng
321a817137aSChen Feng			ldo14: LDO14 {
322a817137aSChen Feng				regulator-name = "LDO14_2V8";
323a817137aSChen Feng				regulator-min-microvolt = <2500000>;
324a817137aSChen Feng				regulator-max-microvolt = <3200000>;
325a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
326a817137aSChen Feng			};
327a817137aSChen Feng
328a817137aSChen Feng			ldo15: LDO15 {
329a817137aSChen Feng				regulator-name = "LDO15_1V8";
330a817137aSChen Feng				regulator-min-microvolt = <1600000>;
331a817137aSChen Feng				regulator-max-microvolt = <1950000>;
332a817137aSChen Feng				regulator-boot-on;
333a817137aSChen Feng				regulator-always-on;
334a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
335a817137aSChen Feng			};
336a817137aSChen Feng
337a817137aSChen Feng			ldo17: LDO17 {
338a817137aSChen Feng				regulator-name = "LDO17_2V5";
339a817137aSChen Feng				regulator-min-microvolt = <2500000>;
340a817137aSChen Feng				regulator-max-microvolt = <3200000>;
341a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
342a817137aSChen Feng			};
343a817137aSChen Feng
344a817137aSChen Feng			ldo19: LDO19 {
345a817137aSChen Feng				regulator-name = "LDO19_3V0";
346a817137aSChen Feng				regulator-min-microvolt = <1800000>;
347a817137aSChen Feng				regulator-max-microvolt = <3000000>;
348a817137aSChen Feng				regulator-enable-ramp-delay = <360>;
349a817137aSChen Feng			};
350a817137aSChen Feng
351a817137aSChen Feng			ldo21: LDO21 {
352a817137aSChen Feng				regulator-name = "LDO21_1V8";
353a817137aSChen Feng				regulator-min-microvolt = <1650000>;
354a817137aSChen Feng				regulator-max-microvolt = <2000000>;
355a817137aSChen Feng				regulator-always-on;
356a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
357a817137aSChen Feng			};
358a817137aSChen Feng
359a817137aSChen Feng			ldo22: LDO22 {
360a817137aSChen Feng				regulator-name = "LDO22_1V2";
361a817137aSChen Feng				regulator-min-microvolt = <900000>;
362a817137aSChen Feng				regulator-max-microvolt = <1200000>;
363a817137aSChen Feng				regulator-boot-on;
364a817137aSChen Feng				regulator-always-on;
365a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
366a817137aSChen Feng			};
367a817137aSChen Feng		};
368a817137aSChen Feng	};
36986e8f528SBintian Wang};
370dd90caacSRob Herring
371dd90caacSRob Herring&uart2 {
372dd90caacSRob Herring	label = "LS-UART0";
373dd90caacSRob Herring};
374dd90caacSRob Herring&uart3 {
375dd90caacSRob Herring	label = "LS-UART1";
376dd90caacSRob Herring};
3773814b61bSXinliang Liu
3783814b61bSXinliang Liu&ade {
3793814b61bSXinliang Liu	status = "ok";
3803814b61bSXinliang Liu};
3813814b61bSXinliang Liu
3823814b61bSXinliang Liu&dsi {
3833814b61bSXinliang Liu	status = "ok";
384b77c23a0SXinliang Liu
385b77c23a0SXinliang Liu	ports {
386b77c23a0SXinliang Liu		/* 1 for output port */
387b77c23a0SXinliang Liu		port@1 {
388b77c23a0SXinliang Liu			reg = <1>;
389b77c23a0SXinliang Liu
390b77c23a0SXinliang Liu			dsi_out0: endpoint@0 {
391b77c23a0SXinliang Liu				remote-endpoint = <&adv7533_in>;
392b77c23a0SXinliang Liu			};
393b77c23a0SXinliang Liu		};
394b77c23a0SXinliang Liu	};
395b77c23a0SXinliang Liu};
396b77c23a0SXinliang Liu
397b77c23a0SXinliang Liu&i2c2 {
398b77c23a0SXinliang Liu	#address-cells = <1>;
399b77c23a0SXinliang Liu	#size-cells = <0>;
400b77c23a0SXinliang Liu	status = "ok";
401b77c23a0SXinliang Liu
402b77c23a0SXinliang Liu	adv7533: adv7533@39 {
403b77c23a0SXinliang Liu		compatible = "adi,adv7533";
404b77c23a0SXinliang Liu		reg = <0x39>;
405b77c23a0SXinliang Liu		interrupt-parent = <&gpio1>;
406b77c23a0SXinliang Liu		interrupts = <1 2>;
407b77c23a0SXinliang Liu		pd-gpio = <&gpio0 4 0>;
408b77c23a0SXinliang Liu		adi,dsi-lanes = <4>;
409b77c23a0SXinliang Liu
410b77c23a0SXinliang Liu		port {
411b77c23a0SXinliang Liu			adv7533_in: endpoint {
412b77c23a0SXinliang Liu				remote-endpoint = <&dsi_out0>;
413b77c23a0SXinliang Liu			};
414b77c23a0SXinliang Liu		};
415b77c23a0SXinliang Liu	};
4163814b61bSXinliang Liu};
417