186e8f528SBintian Wang/* 286e8f528SBintian Wang * dts file for Hisilicon HiKey Development Board 386e8f528SBintian Wang * 486e8f528SBintian Wang * Copyright (C) 2015, Hisilicon Ltd. 586e8f528SBintian Wang * 686e8f528SBintian Wang */ 786e8f528SBintian Wang 886e8f528SBintian Wang/dts-v1/; 986e8f528SBintian Wang#include "hi6220.dtsi" 10379e9bf5SZhong Kaihua#include "hikey-pinctrl.dtsi" 11a817137aSChen Feng#include <dt-bindings/gpio/gpio.h> 1286e8f528SBintian Wang 1386e8f528SBintian Wang/ { 1486e8f528SBintian Wang model = "HiKey Development Board"; 1586e8f528SBintian Wang compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; 1686e8f528SBintian Wang 1786e8f528SBintian Wang aliases { 18a362ec8fSTyler Baker serial0 = &uart0; /* On board UART0 */ 19a362ec8fSTyler Baker serial1 = &uart1; /* BT UART */ 20a362ec8fSTyler Baker serial2 = &uart2; /* LS Expansion UART0 */ 21a362ec8fSTyler Baker serial3 = &uart3; /* LS Expansion UART1 */ 2286e8f528SBintian Wang }; 2386e8f528SBintian Wang 2486e8f528SBintian Wang chosen { 25a362ec8fSTyler Baker stdout-path = "serial3:115200n8"; 2686e8f528SBintian Wang }; 2786e8f528SBintian Wang 286da3aba6SLeo Yan /* 296da3aba6SLeo Yan * Reserve below regions from memory node: 306da3aba6SLeo Yan * 316da3aba6SLeo Yan * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using 32330fd87cSJohn Stultz * 0x05f0,1000 - 0x05f0,1fff: Reboot reason 336da3aba6SLeo Yan * 0x06df,f000 - 0x06df,ffff: Mailbox message data 346da3aba6SLeo Yan * 0x0740,f000 - 0x0740,ffff: MCU firmware section 35813a7315SJohn Stultz * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer 366da3aba6SLeo Yan * 0x3e00,0000 - 0x3fff,ffff: OP-TEE 376da3aba6SLeo Yan */ 3886e8f528SBintian Wang memory@0 { 3986e8f528SBintian Wang device_type = "memory"; 406da3aba6SLeo Yan reg = <0x00000000 0x00000000 0x00000000 0x05e00000>, 41330fd87cSJohn Stultz <0x00000000 0x05f00000 0x00000000 0x00001000>, 42330fd87cSJohn Stultz <0x00000000 0x05f02000 0x00000000 0x00efd000>, 436da3aba6SLeo Yan <0x00000000 0x06e00000 0x00000000 0x0060f000>, 44813a7315SJohn Stultz <0x00000000 0x07410000 0x00000000 0x1aaf0000>, 45813a7315SJohn Stultz <0x00000000 0x22000000 0x00000000 0x1c000000>; 4686e8f528SBintian Wang }; 4760dac1b1SZhong Kaihua 48813a7315SJohn Stultz reserved-memory { 49813a7315SJohn Stultz #address-cells = <2>; 50813a7315SJohn Stultz #size-cells = <2>; 51813a7315SJohn Stultz ranges; 52813a7315SJohn Stultz 53813a7315SJohn Stultz ramoops@0x21f00000 { 54813a7315SJohn Stultz compatible = "ramoops"; 55813a7315SJohn Stultz reg = <0x0 0x21f00000 0x0 0x00100000>; 56813a7315SJohn Stultz record-size = <0x00020000>; 57813a7315SJohn Stultz console-size = <0x00020000>; 58813a7315SJohn Stultz ftrace-size = <0x00020000>; 59813a7315SJohn Stultz }; 60813a7315SJohn Stultz 618f5203abSGuodong Xu /* global autoconfigured region for contiguous allocations */ 628f5203abSGuodong Xu linux,cma { 638f5203abSGuodong Xu compatible = "shared-dma-pool"; 648f5203abSGuodong Xu reusable; 658f5203abSGuodong Xu size = <0x00000000 0x08000000>; 668f5203abSGuodong Xu linux,cma-default; 678f5203abSGuodong Xu }; 688f5203abSGuodong Xu }; 69813a7315SJohn Stultz 70330fd87cSJohn Stultz reboot-mode-syscon@5f01000 { 71330fd87cSJohn Stultz compatible = "syscon", "simple-mfd"; 72330fd87cSJohn Stultz reg = <0x0 0x05f01000 0x0 0x00001000>; 73330fd87cSJohn Stultz 74330fd87cSJohn Stultz reboot-mode { 75330fd87cSJohn Stultz compatible = "syscon-reboot-mode"; 76330fd87cSJohn Stultz offset = <0x0>; 77330fd87cSJohn Stultz 78330fd87cSJohn Stultz mode-normal = <0x77665501>; 79330fd87cSJohn Stultz mode-bootloader = <0x77665500>; 80330fd87cSJohn Stultz mode-recovery = <0x77665502>; 81330fd87cSJohn Stultz }; 82330fd87cSJohn Stultz }; 83330fd87cSJohn Stultz 8484f7c60bSUlf Hansson reg_sys_5v: regulator@0 { 8584f7c60bSUlf Hansson compatible = "regulator-fixed"; 8684f7c60bSUlf Hansson regulator-name = "SYS_5V"; 8784f7c60bSUlf Hansson regulator-min-microvolt = <5000000>; 8884f7c60bSUlf Hansson regulator-max-microvolt = <5000000>; 8984f7c60bSUlf Hansson regulator-boot-on; 9084f7c60bSUlf Hansson regulator-always-on; 9184f7c60bSUlf Hansson }; 9284f7c60bSUlf Hansson 9384f7c60bSUlf Hansson reg_vdd_3v3: regulator@1 { 9484f7c60bSUlf Hansson compatible = "regulator-fixed"; 9584f7c60bSUlf Hansson regulator-name = "VDD_3V3"; 9684f7c60bSUlf Hansson regulator-min-microvolt = <3300000>; 9784f7c60bSUlf Hansson regulator-max-microvolt = <3300000>; 9884f7c60bSUlf Hansson regulator-boot-on; 9984f7c60bSUlf Hansson regulator-always-on; 10084f7c60bSUlf Hansson vin-supply = <®_sys_5v>; 10184f7c60bSUlf Hansson }; 10284f7c60bSUlf Hansson 10384f7c60bSUlf Hansson reg_5v_hub: regulator@2 { 1041b32a5ffSUlf Hansson compatible = "regulator-fixed"; 1051b32a5ffSUlf Hansson regulator-name = "5V_HUB"; 1061b32a5ffSUlf Hansson regulator-min-microvolt = <5000000>; 1071b32a5ffSUlf Hansson regulator-max-microvolt = <5000000>; 1081b32a5ffSUlf Hansson regulator-boot-on; 1091b32a5ffSUlf Hansson gpio = <&gpio0 7 0>; 1101b32a5ffSUlf Hansson regulator-always-on; 11184f7c60bSUlf Hansson vin-supply = <®_sys_5v>; 1121b32a5ffSUlf Hansson }; 1131b32a5ffSUlf Hansson 114ea452678SUlf Hansson wl1835_pwrseq: wl1835-pwrseq { 115ea452678SUlf Hansson compatible = "mmc-pwrseq-simple"; 116ea452678SUlf Hansson /* WLAN_EN GPIO */ 117ea452678SUlf Hansson reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 118ea452678SUlf Hansson clocks = <&pmic>; 119ea452678SUlf Hansson clock-names = "ext_clock"; 120ea452678SUlf Hansson power-off-delay-us = <10>; 121ea452678SUlf Hansson }; 122ea452678SUlf Hansson 12360dac1b1SZhong Kaihua soc { 12460dac1b1SZhong Kaihua spi0: spi@f7106000 { 12560dac1b1SZhong Kaihua status = "ok"; 12660dac1b1SZhong Kaihua }; 1270c231751SGuodong Xu 1280c231751SGuodong Xu i2c0: i2c@f7100000 { 1290c231751SGuodong Xu status = "ok"; 1300c231751SGuodong Xu }; 1310c231751SGuodong Xu 1320c231751SGuodong Xu i2c1: i2c@f7101000 { 1330c231751SGuodong Xu status = "ok"; 1340c231751SGuodong Xu }; 135c2aad932SGuodong Xu 136c2aad932SGuodong Xu uart1: uart@f7111000 { 1371b9c7b2dSJorge Ramirez-Ortiz assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>; 1381b9c7b2dSJorge Ramirez-Ortiz assigned-clock-rates = <150000000>; 139c2aad932SGuodong Xu status = "ok"; 140019aa56bSRob Herring 141019aa56bSRob Herring bluetooth { 142019aa56bSRob Herring compatible = "ti,wl1835-st"; 143019aa56bSRob Herring enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 144b73f2269SUlf Hansson clocks = <&pmic>; 145b73f2269SUlf Hansson clock-names = "ext_clock"; 146019aa56bSRob Herring }; 147c2aad932SGuodong Xu }; 148c2aad932SGuodong Xu 149c2aad932SGuodong Xu uart2: uart@f7112000 { 150c2aad932SGuodong Xu status = "ok"; 151c2aad932SGuodong Xu }; 152c2aad932SGuodong Xu 153c2aad932SGuodong Xu uart3: uart@f7113000 { 154c2aad932SGuodong Xu status = "ok"; 155c2aad932SGuodong Xu }; 156841478d4SGuodong Xu 157bbaf867eSLinus Walleij /* 158bbaf867eSLinus Walleij * Legend: proper name = the GPIO line is used as GPIO 159bbaf867eSLinus Walleij * NC = not connected (not routed from the SoC) 160bbaf867eSLinus Walleij * "[PER]" = pin is muxed for peripheral (not GPIO) 161bbaf867eSLinus Walleij * "" = no idea, schematic doesn't say, could be 162bbaf867eSLinus Walleij * unrouted (not connected to any external pin) 163bbaf867eSLinus Walleij * LSEC = Low Speed External Connector 164bbaf867eSLinus Walleij * HSEC = High Speed External Connector 165bbaf867eSLinus Walleij * 166bbaf867eSLinus Walleij * Pin assignments taken from LeMaker and CircuitCo Schematics 167bbaf867eSLinus Walleij * Rev A1. 168bbaf867eSLinus Walleij * 169bbaf867eSLinus Walleij * For the lines routed to the external connectors the 170bbaf867eSLinus Walleij * lines are named after the 96Boards CE Specification 1.0, 171bbaf867eSLinus Walleij * Appendix "Expansion Connector Signal Description". 172bbaf867eSLinus Walleij * 173bbaf867eSLinus Walleij * When the 96Board naming of a line and the schematic name of 174bbaf867eSLinus Walleij * the same line are in conflict, the 96Board specification 175bbaf867eSLinus Walleij * takes precedence, which means that the external UART on the 176bbaf867eSLinus Walleij * LSEC is named UART0 while the schematic and SoC names this 177bbaf867eSLinus Walleij * UART2. This is only for the informational lines i.e. "[FOO]", 178bbaf867eSLinus Walleij * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 179bbaf867eSLinus Walleij * ones actually used for GPIO. 180bbaf867eSLinus Walleij */ 181bbaf867eSLinus Walleij gpio0: gpio@f8011000 { 182bbaf867eSLinus Walleij gpio-line-names = "PWR_HOLD", "DSI_SEL", 183bbaf867eSLinus Walleij "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON", 184bbaf867eSLinus Walleij "PWRON_DET", "5V_HUB_EN"; 185bbaf867eSLinus Walleij }; 186bbaf867eSLinus Walleij 187bbaf867eSLinus Walleij gpio1: gpio@f8012000 { 188bbaf867eSLinus Walleij gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N", 189bbaf867eSLinus Walleij "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON"; 190bbaf867eSLinus Walleij }; 191bbaf867eSLinus Walleij 192bbaf867eSLinus Walleij gpio2: gpio@f8013000 { 193bbaf867eSLinus Walleij gpio-line-names = 194bbaf867eSLinus Walleij "GPIO-A", /* LSEC Pin 23: GPIO2_0 */ 195bbaf867eSLinus Walleij "GPIO-B", /* LSEC Pin 24: GPIO2_1 */ 196bbaf867eSLinus Walleij "GPIO-C", /* LSEC Pin 25: GPIO2_2 */ 197bbaf867eSLinus Walleij "GPIO-D", /* LSEC Pin 26: GPIO2_3 */ 198bbaf867eSLinus Walleij "GPIO-E", /* LSEC Pin 27: GPIO2_4 */ 199bbaf867eSLinus Walleij "USB_ID_DET", "USB_VBUS_DET", 200bbaf867eSLinus Walleij "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */ 201bbaf867eSLinus Walleij }; 202bbaf867eSLinus Walleij 203bbaf867eSLinus Walleij gpio3: gpio@f8014000 { 204bbaf867eSLinus Walleij gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "", 205bbaf867eSLinus Walleij "WLAN_ACTIVE", "NC", "NC"; 206bbaf867eSLinus Walleij }; 207bbaf867eSLinus Walleij 208bbaf867eSLinus Walleij gpio4: gpio@f7020000 { 209bbaf867eSLinus Walleij gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3", 210bbaf867eSLinus Walleij "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE"; 211bbaf867eSLinus Walleij }; 212bbaf867eSLinus Walleij 213bbaf867eSLinus Walleij gpio5: gpio@f7021000 { 214bbaf867eSLinus Walleij gpio-line-names = "NC", "NC", 215bbaf867eSLinus Walleij "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */ 216bbaf867eSLinus Walleij "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */ 217bbaf867eSLinus Walleij "[AUX_SSI1]", "NC", 218bbaf867eSLinus Walleij "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */ 219bbaf867eSLinus Walleij "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */ 220bbaf867eSLinus Walleij }; 221bbaf867eSLinus Walleij 222bbaf867eSLinus Walleij gpio6: gpio@f7022000 { 223bbaf867eSLinus Walleij gpio-line-names = 224bbaf867eSLinus Walleij "[SPI0_DIN]", /* Pin 10: SPI0_DI */ 225bbaf867eSLinus Walleij "[SPI0_DOUT]", /* Pin 14: SPI0_DO */ 226bbaf867eSLinus Walleij "[SPI0_CS]", /* Pin 12: SPI0_CS_N */ 227bbaf867eSLinus Walleij "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */ 228bbaf867eSLinus Walleij "NC", "NC", "NC", 229bbaf867eSLinus Walleij "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */ 230bbaf867eSLinus Walleij }; 231bbaf867eSLinus Walleij 232bbaf867eSLinus Walleij gpio7: gpio@f7023000 { 233bbaf867eSLinus Walleij gpio-line-names = "NC", "NC", "NC", "NC", 234bbaf867eSLinus Walleij "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */ 235bbaf867eSLinus Walleij "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */ 236bbaf867eSLinus Walleij "NC", "NC"; 237bbaf867eSLinus Walleij }; 238bbaf867eSLinus Walleij 239bbaf867eSLinus Walleij gpio8: gpio@f7024000 { 240bbaf867eSLinus Walleij gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC", 241bbaf867eSLinus Walleij "", "", "", "", "", ""; 242bbaf867eSLinus Walleij }; 243bbaf867eSLinus Walleij 244bbaf867eSLinus Walleij gpio9: gpio@f7025000 { 245bbaf867eSLinus Walleij gpio-line-names = "", 246bbaf867eSLinus Walleij "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */ 247bbaf867eSLinus Walleij "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */ 248bbaf867eSLinus Walleij "NC", "NC", "NC", "NC", "[ISP_CCLK0]"; 249bbaf867eSLinus Walleij }; 250bbaf867eSLinus Walleij 251bbaf867eSLinus Walleij gpio10: gpio@f7026000 { 252bbaf867eSLinus Walleij gpio-line-names = "BOOT_SEL", 253bbaf867eSLinus Walleij "[ISP_CCLK1]", 254bbaf867eSLinus Walleij "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */ 255bbaf867eSLinus Walleij "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */ 256bbaf867eSLinus Walleij "NC", "NC", 257bbaf867eSLinus Walleij "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */ 258bbaf867eSLinus Walleij "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */ 259bbaf867eSLinus Walleij }; 260bbaf867eSLinus Walleij 261bbaf867eSLinus Walleij gpio11: gpio@f7027000 { 262bbaf867eSLinus Walleij gpio-line-names = 263bbaf867eSLinus Walleij "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */ 264bbaf867eSLinus Walleij "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */ 265bbaf867eSLinus Walleij "", "NC", "NC", "NC", "", ""; 266bbaf867eSLinus Walleij }; 267bbaf867eSLinus Walleij 268bbaf867eSLinus Walleij gpio12: gpio@f7028000 { 269bbaf867eSLinus Walleij gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]", 270bbaf867eSLinus Walleij "[BT_PCM_DO]", 271bbaf867eSLinus Walleij "NC", "NC", "NC", "NC", 272bbaf867eSLinus Walleij "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */ 273bbaf867eSLinus Walleij }; 274bbaf867eSLinus Walleij 275bbaf867eSLinus Walleij gpio13: gpio@f7029000 { 276bbaf867eSLinus Walleij gpio-line-names = "[UART0_RX]", "[UART0_TX]", 277bbaf867eSLinus Walleij "[BT_UART1_CTS]", "[BT_UART1_RTS]", 278bbaf867eSLinus Walleij "[BT_UART1_RX]", "[BT_UART1_TX]", 279bbaf867eSLinus Walleij "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */ 280bbaf867eSLinus Walleij "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */ 281bbaf867eSLinus Walleij }; 282bbaf867eSLinus Walleij 283bbaf867eSLinus Walleij gpio14: gpio@f702a000 { 284bbaf867eSLinus Walleij gpio-line-names = 285bbaf867eSLinus Walleij "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */ 286bbaf867eSLinus Walleij "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */ 287bbaf867eSLinus Walleij "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */ 288bbaf867eSLinus Walleij "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */ 289bbaf867eSLinus Walleij "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */ 290bbaf867eSLinus Walleij "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */ 291bbaf867eSLinus Walleij "[I2C2_SCL]", "[I2C2_SDA]"; 292bbaf867eSLinus Walleij }; 293bbaf867eSLinus Walleij 294bbaf867eSLinus Walleij gpio15: gpio@f702b000 { 295bbaf867eSLinus Walleij gpio-line-names = "", "", "", "", "", "", "NC", ""; 296bbaf867eSLinus Walleij }; 297bbaf867eSLinus Walleij 298bbaf867eSLinus Walleij /* GPIO blocks 16 thru 19 do not appear to be routed to pins */ 299bbaf867eSLinus Walleij 30076f1dfb6SUlf Hansson dwmmc_0: dwmmc0@f723d000 { 30176f1dfb6SUlf Hansson cap-mmc-highspeed; 30276f1dfb6SUlf Hansson non-removable; 30376f1dfb6SUlf Hansson bus-width = <0x8>; 30476f1dfb6SUlf Hansson vmmc-supply = <&ldo19>; 30576f1dfb6SUlf Hansson }; 30676f1dfb6SUlf Hansson 30776f1dfb6SUlf Hansson dwmmc_1: dwmmc1@f723e000 { 30876f1dfb6SUlf Hansson card-detect-delay = <200>; 30976f1dfb6SUlf Hansson cap-sd-highspeed; 31076f1dfb6SUlf Hansson sd-uhs-sdr12; 31176f1dfb6SUlf Hansson sd-uhs-sdr25; 31276f1dfb6SUlf Hansson sd-uhs-sdr50; 31376f1dfb6SUlf Hansson vqmmc-supply = <&ldo7>; 31476f1dfb6SUlf Hansson vmmc-supply = <&ldo10>; 31576f1dfb6SUlf Hansson bus-width = <0x4>; 31676f1dfb6SUlf Hansson disable-wp; 31776f1dfb6SUlf Hansson cd-gpios = <&gpio1 0 1>; 31876f1dfb6SUlf Hansson }; 31976f1dfb6SUlf Hansson 320841478d4SGuodong Xu dwmmc_2: dwmmc2@f723f000 { 32176f1dfb6SUlf Hansson bus-width = <0x4>; 322841478d4SGuodong Xu non-removable; 323ea452678SUlf Hansson vmmc-supply = <®_vdd_3v3>; 324ea452678SUlf Hansson mmc-pwrseq = <&wl1835_pwrseq>; 325841478d4SGuodong Xu 326841478d4SGuodong Xu #address-cells = <0x1>; 327841478d4SGuodong Xu #size-cells = <0x0>; 328841478d4SGuodong Xu wlcore: wlcore@2 { 329841478d4SGuodong Xu compatible = "ti,wl1835"; 330841478d4SGuodong Xu reg = <2>; /* sdio func num */ 331841478d4SGuodong Xu /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */ 332841478d4SGuodong Xu interrupt-parent = <&gpio1>; 333841478d4SGuodong Xu interrupts = <3 IRQ_TYPE_EDGE_RISING>; 334841478d4SGuodong Xu }; 335841478d4SGuodong Xu }; 33660dac1b1SZhong Kaihua }; 337ad05f38bSGuodong Xu 338ad05f38bSGuodong Xu leds { 339ad05f38bSGuodong Xu compatible = "gpio-leds"; 340ad05f38bSGuodong Xu user_led4 { 341ad05f38bSGuodong Xu label = "user_led4"; 342ad05f38bSGuodong Xu gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */ 343ad05f38bSGuodong Xu linux,default-trigger = "heartbeat"; 344ad05f38bSGuodong Xu }; 345ad05f38bSGuodong Xu 346ad05f38bSGuodong Xu user_led3 { 347ad05f38bSGuodong Xu label = "user_led3"; 348ad05f38bSGuodong Xu gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */ 349ad05f38bSGuodong Xu linux,default-trigger = "mmc0"; 350ad05f38bSGuodong Xu }; 351ad05f38bSGuodong Xu 352ad05f38bSGuodong Xu user_led2 { 353ad05f38bSGuodong Xu label = "user_led2"; 354ad05f38bSGuodong Xu gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */ 355ad05f38bSGuodong Xu linux,default-trigger = "mmc1"; 356ad05f38bSGuodong Xu }; 357ad05f38bSGuodong Xu 358ad05f38bSGuodong Xu user_led1 { 359ad05f38bSGuodong Xu label = "user_led1"; 360ad05f38bSGuodong Xu gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */ 361ad05f38bSGuodong Xu linux,default-trigger = "cpu0"; 362ad05f38bSGuodong Xu }; 363ad05f38bSGuodong Xu 364ad05f38bSGuodong Xu wlan_active_led { 365ad05f38bSGuodong Xu label = "wifi_active"; 366ad05f38bSGuodong Xu gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */ 367ad05f38bSGuodong Xu linux,default-trigger = "phy0tx"; 368ad05f38bSGuodong Xu default-state = "off"; 369ad05f38bSGuodong Xu }; 370ad05f38bSGuodong Xu 371ad05f38bSGuodong Xu bt_active_led { 372ad05f38bSGuodong Xu label = "bt_active"; 373ad05f38bSGuodong Xu gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */ 374ad05f38bSGuodong Xu linux,default-trigger = "hci0rx"; 375ad05f38bSGuodong Xu default-state = "off"; 376ad05f38bSGuodong Xu }; 377ad05f38bSGuodong Xu }; 378a817137aSChen Feng 379a817137aSChen Feng pmic: pmic@f8000000 { 380a817137aSChen Feng compatible = "hisilicon,hi655x-pmic"; 381a817137aSChen Feng reg = <0x0 0xf8000000 0x0 0x1000>; 382307ded89SDaniel Lezcano #clock-cells = <0>; 383a817137aSChen Feng interrupt-controller; 384a817137aSChen Feng #interrupt-cells = <2>; 385a817137aSChen Feng pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 386a817137aSChen Feng 387a817137aSChen Feng regulators { 388a817137aSChen Feng ldo2: LDO2 { 389a817137aSChen Feng regulator-name = "LDO2_2V8"; 390a817137aSChen Feng regulator-min-microvolt = <2500000>; 391a817137aSChen Feng regulator-max-microvolt = <3200000>; 392a817137aSChen Feng regulator-enable-ramp-delay = <120>; 393a817137aSChen Feng }; 394a817137aSChen Feng 395a817137aSChen Feng ldo7: LDO7 { 396a817137aSChen Feng regulator-name = "LDO7_SDIO"; 397a817137aSChen Feng regulator-min-microvolt = <1800000>; 398a817137aSChen Feng regulator-max-microvolt = <3300000>; 399a817137aSChen Feng regulator-enable-ramp-delay = <120>; 400a817137aSChen Feng }; 401a817137aSChen Feng 402a817137aSChen Feng ldo10: LDO10 { 403a817137aSChen Feng regulator-name = "LDO10_2V85"; 404a817137aSChen Feng regulator-min-microvolt = <1800000>; 405a817137aSChen Feng regulator-max-microvolt = <3000000>; 406a817137aSChen Feng regulator-enable-ramp-delay = <360>; 407a817137aSChen Feng }; 408a817137aSChen Feng 409a817137aSChen Feng ldo13: LDO13 { 410a817137aSChen Feng regulator-name = "LDO13_1V8"; 411a817137aSChen Feng regulator-min-microvolt = <1600000>; 412a817137aSChen Feng regulator-max-microvolt = <1950000>; 413a817137aSChen Feng regulator-enable-ramp-delay = <120>; 414a817137aSChen Feng }; 415a817137aSChen Feng 416a817137aSChen Feng ldo14: LDO14 { 417a817137aSChen Feng regulator-name = "LDO14_2V8"; 418a817137aSChen Feng regulator-min-microvolt = <2500000>; 419a817137aSChen Feng regulator-max-microvolt = <3200000>; 420a817137aSChen Feng regulator-enable-ramp-delay = <120>; 421a817137aSChen Feng }; 422a817137aSChen Feng 423a817137aSChen Feng ldo15: LDO15 { 424a817137aSChen Feng regulator-name = "LDO15_1V8"; 425a817137aSChen Feng regulator-min-microvolt = <1600000>; 426a817137aSChen Feng regulator-max-microvolt = <1950000>; 427a817137aSChen Feng regulator-boot-on; 428a817137aSChen Feng regulator-always-on; 429a817137aSChen Feng regulator-enable-ramp-delay = <120>; 430a817137aSChen Feng }; 431a817137aSChen Feng 432a817137aSChen Feng ldo17: LDO17 { 433a817137aSChen Feng regulator-name = "LDO17_2V5"; 434a817137aSChen Feng regulator-min-microvolt = <2500000>; 435a817137aSChen Feng regulator-max-microvolt = <3200000>; 436a817137aSChen Feng regulator-enable-ramp-delay = <120>; 437a817137aSChen Feng }; 438a817137aSChen Feng 439a817137aSChen Feng ldo19: LDO19 { 440a817137aSChen Feng regulator-name = "LDO19_3V0"; 441a817137aSChen Feng regulator-min-microvolt = <1800000>; 442a817137aSChen Feng regulator-max-microvolt = <3000000>; 443a817137aSChen Feng regulator-enable-ramp-delay = <360>; 444a817137aSChen Feng }; 445a817137aSChen Feng 446a817137aSChen Feng ldo21: LDO21 { 447a817137aSChen Feng regulator-name = "LDO21_1V8"; 448a817137aSChen Feng regulator-min-microvolt = <1650000>; 449a817137aSChen Feng regulator-max-microvolt = <2000000>; 450a817137aSChen Feng regulator-always-on; 451a817137aSChen Feng regulator-enable-ramp-delay = <120>; 452a817137aSChen Feng }; 453a817137aSChen Feng 454a817137aSChen Feng ldo22: LDO22 { 455a817137aSChen Feng regulator-name = "LDO22_1V2"; 456a817137aSChen Feng regulator-min-microvolt = <900000>; 457a817137aSChen Feng regulator-max-microvolt = <1200000>; 458a817137aSChen Feng regulator-boot-on; 459a817137aSChen Feng regulator-always-on; 460a817137aSChen Feng regulator-enable-ramp-delay = <120>; 461a817137aSChen Feng }; 462a817137aSChen Feng }; 463a817137aSChen Feng }; 46414e21cb8SJerome Forissier 46514e21cb8SJerome Forissier firmware { 46614e21cb8SJerome Forissier optee { 46714e21cb8SJerome Forissier compatible = "linaro,optee-tz"; 46814e21cb8SJerome Forissier method = "smc"; 46914e21cb8SJerome Forissier }; 47014e21cb8SJerome Forissier }; 47186e8f528SBintian Wang}; 472dd90caacSRob Herring 473dd90caacSRob Herring&uart2 { 474dd90caacSRob Herring label = "LS-UART0"; 475dd90caacSRob Herring}; 476dd90caacSRob Herring&uart3 { 477dd90caacSRob Herring label = "LS-UART1"; 478dd90caacSRob Herring}; 4793814b61bSXinliang Liu 4803814b61bSXinliang Liu&ade { 4813814b61bSXinliang Liu status = "ok"; 4823814b61bSXinliang Liu}; 4833814b61bSXinliang Liu 4843814b61bSXinliang Liu&dsi { 4853814b61bSXinliang Liu status = "ok"; 486b77c23a0SXinliang Liu 487b77c23a0SXinliang Liu ports { 488b77c23a0SXinliang Liu /* 1 for output port */ 489b77c23a0SXinliang Liu port@1 { 490b77c23a0SXinliang Liu reg = <1>; 491b77c23a0SXinliang Liu 492b77c23a0SXinliang Liu dsi_out0: endpoint@0 { 493b77c23a0SXinliang Liu remote-endpoint = <&adv7533_in>; 494b77c23a0SXinliang Liu }; 495b77c23a0SXinliang Liu }; 496b77c23a0SXinliang Liu }; 497b77c23a0SXinliang Liu}; 498b77c23a0SXinliang Liu 499b77c23a0SXinliang Liu&i2c2 { 500b77c23a0SXinliang Liu #address-cells = <1>; 501b77c23a0SXinliang Liu #size-cells = <0>; 502b77c23a0SXinliang Liu status = "ok"; 503b77c23a0SXinliang Liu 504b77c23a0SXinliang Liu adv7533: adv7533@39 { 505b77c23a0SXinliang Liu compatible = "adi,adv7533"; 506b77c23a0SXinliang Liu reg = <0x39>; 507b77c23a0SXinliang Liu interrupt-parent = <&gpio1>; 508b77c23a0SXinliang Liu interrupts = <1 2>; 509b77c23a0SXinliang Liu pd-gpio = <&gpio0 4 0>; 510b77c23a0SXinliang Liu adi,dsi-lanes = <4>; 511b77c23a0SXinliang Liu 512b77c23a0SXinliang Liu port { 513b77c23a0SXinliang Liu adv7533_in: endpoint { 514b77c23a0SXinliang Liu remote-endpoint = <&dsi_out0>; 515b77c23a0SXinliang Liu }; 516b77c23a0SXinliang Liu }; 517b77c23a0SXinliang Liu }; 5183814b61bSXinliang Liu}; 519