1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0
286e8f528SBintian Wang/*
386e8f528SBintian Wang * dts file for Hisilicon HiKey Development Board
486e8f528SBintian Wang *
586e8f528SBintian Wang * Copyright (C) 2015, Hisilicon Ltd.
686e8f528SBintian Wang *
786e8f528SBintian Wang */
886e8f528SBintian Wang
986e8f528SBintian Wang/dts-v1/;
1086e8f528SBintian Wang#include "hi6220.dtsi"
11379e9bf5SZhong Kaihua#include "hikey-pinctrl.dtsi"
12a817137aSChen Feng#include <dt-bindings/gpio/gpio.h>
1386e8f528SBintian Wang
1486e8f528SBintian Wang/ {
1586e8f528SBintian Wang	model = "HiKey Development Board";
1686e8f528SBintian Wang	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
1786e8f528SBintian Wang
1886e8f528SBintian Wang	aliases {
19a362ec8fSTyler Baker		serial0 = &uart0; /* On board UART0 */
20a362ec8fSTyler Baker		serial1 = &uart1; /* BT UART */
21a362ec8fSTyler Baker		serial2 = &uart2; /* LS Expansion UART0 */
22a362ec8fSTyler Baker		serial3 = &uart3; /* LS Expansion UART1 */
2386e8f528SBintian Wang	};
2486e8f528SBintian Wang
2586e8f528SBintian Wang	chosen {
26a362ec8fSTyler Baker		stdout-path = "serial3:115200n8";
2786e8f528SBintian Wang	};
2886e8f528SBintian Wang
296da3aba6SLeo Yan	/*
306da3aba6SLeo Yan	 * Reserve below regions from memory node:
316da3aba6SLeo Yan	 *
326da3aba6SLeo Yan	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33330fd87cSJohn Stultz	 *  0x05f0,1000 - 0x05f0,1fff: Reboot reason
346da3aba6SLeo Yan	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data
356da3aba6SLeo Yan	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section
36813a7315SJohn Stultz	 *  0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
376da3aba6SLeo Yan	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE
386da3aba6SLeo Yan	 */
3986e8f528SBintian Wang	memory@0 {
4086e8f528SBintian Wang		device_type = "memory";
416da3aba6SLeo Yan		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
42330fd87cSJohn Stultz		      <0x00000000 0x05f00000 0x00000000 0x00001000>,
43330fd87cSJohn Stultz		      <0x00000000 0x05f02000 0x00000000 0x00efd000>,
446da3aba6SLeo Yan		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,
45813a7315SJohn Stultz		      <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
46813a7315SJohn Stultz		      <0x00000000 0x22000000 0x00000000 0x1c000000>;
4786e8f528SBintian Wang	};
4860dac1b1SZhong Kaihua
49813a7315SJohn Stultz	reserved-memory {
50813a7315SJohn Stultz		#address-cells = <2>;
51813a7315SJohn Stultz		#size-cells = <2>;
52813a7315SJohn Stultz		ranges;
53813a7315SJohn Stultz
54813a7315SJohn Stultz		ramoops@0x21f00000 {
55813a7315SJohn Stultz			compatible = "ramoops";
56813a7315SJohn Stultz			reg = <0x0 0x21f00000 0x0 0x00100000>;
57813a7315SJohn Stultz			record-size	= <0x00020000>;
58813a7315SJohn Stultz			console-size	= <0x00020000>;
59813a7315SJohn Stultz			ftrace-size	= <0x00020000>;
60813a7315SJohn Stultz		};
61813a7315SJohn Stultz
628f5203abSGuodong Xu		/* global autoconfigured region for contiguous allocations */
638f5203abSGuodong Xu		linux,cma {
648f5203abSGuodong Xu			compatible = "shared-dma-pool";
658f5203abSGuodong Xu			reusable;
668f5203abSGuodong Xu			size = <0x00000000 0x08000000>;
678f5203abSGuodong Xu			linux,cma-default;
688f5203abSGuodong Xu		};
698f5203abSGuodong Xu	};
70813a7315SJohn Stultz
71330fd87cSJohn Stultz	reboot-mode-syscon@5f01000 {
72330fd87cSJohn Stultz		compatible = "syscon", "simple-mfd";
73330fd87cSJohn Stultz		reg = <0x0 0x05f01000 0x0 0x00001000>;
74330fd87cSJohn Stultz
75330fd87cSJohn Stultz		reboot-mode {
76330fd87cSJohn Stultz			compatible = "syscon-reboot-mode";
77330fd87cSJohn Stultz			offset = <0x0>;
78330fd87cSJohn Stultz
79330fd87cSJohn Stultz			mode-normal	= <0x77665501>;
80330fd87cSJohn Stultz			mode-bootloader	= <0x77665500>;
81330fd87cSJohn Stultz			mode-recovery	= <0x77665502>;
82330fd87cSJohn Stultz		};
83330fd87cSJohn Stultz	};
84330fd87cSJohn Stultz
8584f7c60bSUlf Hansson	reg_sys_5v: regulator@0 {
8684f7c60bSUlf Hansson		compatible = "regulator-fixed";
8784f7c60bSUlf Hansson		regulator-name = "SYS_5V";
8884f7c60bSUlf Hansson		regulator-min-microvolt = <5000000>;
8984f7c60bSUlf Hansson		regulator-max-microvolt = <5000000>;
9084f7c60bSUlf Hansson		regulator-boot-on;
9184f7c60bSUlf Hansson		regulator-always-on;
9284f7c60bSUlf Hansson	};
9384f7c60bSUlf Hansson
9484f7c60bSUlf Hansson	reg_vdd_3v3: regulator@1 {
9584f7c60bSUlf Hansson		compatible = "regulator-fixed";
9684f7c60bSUlf Hansson		regulator-name = "VDD_3V3";
9784f7c60bSUlf Hansson		regulator-min-microvolt = <3300000>;
9884f7c60bSUlf Hansson		regulator-max-microvolt = <3300000>;
9984f7c60bSUlf Hansson		regulator-boot-on;
10084f7c60bSUlf Hansson		regulator-always-on;
10184f7c60bSUlf Hansson		vin-supply = <&reg_sys_5v>;
10284f7c60bSUlf Hansson	};
10384f7c60bSUlf Hansson
10484f7c60bSUlf Hansson	reg_5v_hub: regulator@2 {
1051b32a5ffSUlf Hansson		compatible = "regulator-fixed";
1061b32a5ffSUlf Hansson		regulator-name = "5V_HUB";
1071b32a5ffSUlf Hansson		regulator-min-microvolt = <5000000>;
1081b32a5ffSUlf Hansson		regulator-max-microvolt = <5000000>;
1091b32a5ffSUlf Hansson		regulator-boot-on;
1101b32a5ffSUlf Hansson		gpio = <&gpio0 7 0>;
1111b32a5ffSUlf Hansson		regulator-always-on;
11284f7c60bSUlf Hansson		vin-supply = <&reg_sys_5v>;
1131b32a5ffSUlf Hansson	};
1141b32a5ffSUlf Hansson
115ea452678SUlf Hansson	wl1835_pwrseq: wl1835-pwrseq {
116ea452678SUlf Hansson		compatible = "mmc-pwrseq-simple";
117ea452678SUlf Hansson		/* WLAN_EN GPIO */
118ea452678SUlf Hansson		reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
119ea452678SUlf Hansson		clocks = <&pmic>;
120ea452678SUlf Hansson		clock-names = "ext_clock";
121ea452678SUlf Hansson		power-off-delay-us = <10>;
122ea452678SUlf Hansson	};
123ea452678SUlf Hansson
12460dac1b1SZhong Kaihua	soc {
12560dac1b1SZhong Kaihua		spi0: spi@f7106000 {
12660dac1b1SZhong Kaihua			status = "ok";
12760dac1b1SZhong Kaihua		};
1280c231751SGuodong Xu
1290c231751SGuodong Xu		i2c0: i2c@f7100000 {
1300c231751SGuodong Xu			status = "ok";
1310c231751SGuodong Xu		};
1320c231751SGuodong Xu
1330c231751SGuodong Xu		i2c1: i2c@f7101000 {
1340c231751SGuodong Xu			status = "ok";
1350c231751SGuodong Xu		};
136c2aad932SGuodong Xu
137c2aad932SGuodong Xu		uart1: uart@f7111000 {
1381b9c7b2dSJorge Ramirez-Ortiz			assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
1391b9c7b2dSJorge Ramirez-Ortiz			assigned-clock-rates = <150000000>;
140c2aad932SGuodong Xu			status = "ok";
141019aa56bSRob Herring
142019aa56bSRob Herring			bluetooth {
143019aa56bSRob Herring				compatible = "ti,wl1835-st";
144019aa56bSRob Herring				enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
145b73f2269SUlf Hansson				clocks = <&pmic>;
146b73f2269SUlf Hansson				clock-names = "ext_clock";
147019aa56bSRob Herring			};
148c2aad932SGuodong Xu		};
149c2aad932SGuodong Xu
150c2aad932SGuodong Xu		uart2: uart@f7112000 {
151c2aad932SGuodong Xu			status = "ok";
152c2aad932SGuodong Xu		};
153c2aad932SGuodong Xu
154c2aad932SGuodong Xu		uart3: uart@f7113000 {
155c2aad932SGuodong Xu			status = "ok";
156c2aad932SGuodong Xu		};
157841478d4SGuodong Xu
158bbaf867eSLinus Walleij		/*
159bbaf867eSLinus Walleij		 * Legend: proper name = the GPIO line is used as GPIO
160bbaf867eSLinus Walleij		 *         NC = not connected (not routed from the SoC)
161bbaf867eSLinus Walleij		 *         "[PER]" = pin is muxed for peripheral (not GPIO)
162bbaf867eSLinus Walleij		 *         "" = no idea, schematic doesn't say, could be
163bbaf867eSLinus Walleij		 *              unrouted (not connected to any external pin)
164bbaf867eSLinus Walleij		 *         LSEC = Low Speed External Connector
165bbaf867eSLinus Walleij		 *         HSEC = High Speed External Connector
166bbaf867eSLinus Walleij		 *
167bbaf867eSLinus Walleij		 * Pin assignments taken from LeMaker and CircuitCo Schematics
168bbaf867eSLinus Walleij		 * Rev A1.
169bbaf867eSLinus Walleij		 *
170bbaf867eSLinus Walleij		 * For the lines routed to the external connectors the
171bbaf867eSLinus Walleij		 * lines are named after the 96Boards CE Specification 1.0,
172bbaf867eSLinus Walleij		 * Appendix "Expansion Connector Signal Description".
173bbaf867eSLinus Walleij		 *
174bbaf867eSLinus Walleij		 * When the 96Board naming of a line and the schematic name of
175bbaf867eSLinus Walleij		 * the same line are in conflict, the 96Board specification
176bbaf867eSLinus Walleij		 * takes precedence, which means that the external UART on the
177bbaf867eSLinus Walleij		 * LSEC is named UART0 while the schematic and SoC names this
178bbaf867eSLinus Walleij		 * UART2. This is only for the informational lines i.e. "[FOO]",
179bbaf867eSLinus Walleij		 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
180bbaf867eSLinus Walleij		 * ones actually used for GPIO.
181bbaf867eSLinus Walleij		 */
182bbaf867eSLinus Walleij		gpio0: gpio@f8011000 {
183bbaf867eSLinus Walleij			gpio-line-names = "PWR_HOLD", "DSI_SEL",
184bbaf867eSLinus Walleij			"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
185bbaf867eSLinus Walleij			"PWRON_DET", "5V_HUB_EN";
186bbaf867eSLinus Walleij		};
187bbaf867eSLinus Walleij
188bbaf867eSLinus Walleij		gpio1: gpio@f8012000 {
189bbaf867eSLinus Walleij			gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
190bbaf867eSLinus Walleij			"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
191bbaf867eSLinus Walleij		};
192bbaf867eSLinus Walleij
193bbaf867eSLinus Walleij		gpio2: gpio@f8013000 {
194bbaf867eSLinus Walleij			gpio-line-names =
195bbaf867eSLinus Walleij				"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
196bbaf867eSLinus Walleij				"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
197bbaf867eSLinus Walleij				"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
198bbaf867eSLinus Walleij				"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
199bbaf867eSLinus Walleij				"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
200bbaf867eSLinus Walleij				"USB_ID_DET", "USB_VBUS_DET",
201bbaf867eSLinus Walleij				"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
202bbaf867eSLinus Walleij		};
203bbaf867eSLinus Walleij
204bbaf867eSLinus Walleij		gpio3: gpio@f8014000 {
205bbaf867eSLinus Walleij			gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
206bbaf867eSLinus Walleij			"WLAN_ACTIVE", "NC", "NC";
207bbaf867eSLinus Walleij		};
208bbaf867eSLinus Walleij
209bbaf867eSLinus Walleij		gpio4: gpio@f7020000 {
210bbaf867eSLinus Walleij			gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
211bbaf867eSLinus Walleij			"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
212bbaf867eSLinus Walleij		};
213bbaf867eSLinus Walleij
214bbaf867eSLinus Walleij		gpio5: gpio@f7021000 {
215bbaf867eSLinus Walleij			gpio-line-names = "NC", "NC",
216bbaf867eSLinus Walleij			"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
217bbaf867eSLinus Walleij			"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
218bbaf867eSLinus Walleij			"[AUX_SSI1]", "NC",
219bbaf867eSLinus Walleij			"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
220bbaf867eSLinus Walleij			"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
221bbaf867eSLinus Walleij		};
222bbaf867eSLinus Walleij
223bbaf867eSLinus Walleij		gpio6: gpio@f7022000 {
224bbaf867eSLinus Walleij			gpio-line-names =
225bbaf867eSLinus Walleij			"[SPI0_DIN]", /* Pin 10: SPI0_DI */
226bbaf867eSLinus Walleij			"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
227bbaf867eSLinus Walleij			"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
228bbaf867eSLinus Walleij			"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
229bbaf867eSLinus Walleij			"NC", "NC", "NC",
230bbaf867eSLinus Walleij			"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
231bbaf867eSLinus Walleij		};
232bbaf867eSLinus Walleij
233bbaf867eSLinus Walleij		gpio7: gpio@f7023000 {
234bbaf867eSLinus Walleij			gpio-line-names = "NC", "NC", "NC", "NC",
235bbaf867eSLinus Walleij			"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
236bbaf867eSLinus Walleij			"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
237bbaf867eSLinus Walleij			"NC", "NC";
238bbaf867eSLinus Walleij		};
239bbaf867eSLinus Walleij
240bbaf867eSLinus Walleij		gpio8: gpio@f7024000 {
241bbaf867eSLinus Walleij			gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
242bbaf867eSLinus Walleij			"", "", "", "", "", "";
243bbaf867eSLinus Walleij		};
244bbaf867eSLinus Walleij
245bbaf867eSLinus Walleij		gpio9: gpio@f7025000 {
246bbaf867eSLinus Walleij			gpio-line-names = "",
247bbaf867eSLinus Walleij			"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
248bbaf867eSLinus Walleij			"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
249bbaf867eSLinus Walleij			"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
250bbaf867eSLinus Walleij		};
251bbaf867eSLinus Walleij
252bbaf867eSLinus Walleij		gpio10: gpio@f7026000 {
253bbaf867eSLinus Walleij			gpio-line-names = "BOOT_SEL",
254bbaf867eSLinus Walleij			"[ISP_CCLK1]",
255bbaf867eSLinus Walleij			"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
256bbaf867eSLinus Walleij			"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
257bbaf867eSLinus Walleij			"NC", "NC",
258bbaf867eSLinus Walleij			"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
259bbaf867eSLinus Walleij			"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
260bbaf867eSLinus Walleij		};
261bbaf867eSLinus Walleij
262bbaf867eSLinus Walleij		gpio11: gpio@f7027000 {
263bbaf867eSLinus Walleij			gpio-line-names =
264bbaf867eSLinus Walleij			"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
265bbaf867eSLinus Walleij			"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
266bbaf867eSLinus Walleij			"", "NC", "NC", "NC", "", "";
267bbaf867eSLinus Walleij		};
268bbaf867eSLinus Walleij
269bbaf867eSLinus Walleij		gpio12: gpio@f7028000 {
270bbaf867eSLinus Walleij			gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
271bbaf867eSLinus Walleij			"[BT_PCM_DO]",
272bbaf867eSLinus Walleij			"NC", "NC", "NC", "NC",
273bbaf867eSLinus Walleij			"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
274bbaf867eSLinus Walleij		};
275bbaf867eSLinus Walleij
276bbaf867eSLinus Walleij		gpio13: gpio@f7029000 {
277bbaf867eSLinus Walleij			gpio-line-names = "[UART0_RX]", "[UART0_TX]",
278bbaf867eSLinus Walleij			"[BT_UART1_CTS]", "[BT_UART1_RTS]",
279bbaf867eSLinus Walleij			"[BT_UART1_RX]", "[BT_UART1_TX]",
280bbaf867eSLinus Walleij			"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
281bbaf867eSLinus Walleij			"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
282bbaf867eSLinus Walleij		};
283bbaf867eSLinus Walleij
284bbaf867eSLinus Walleij		gpio14: gpio@f702a000 {
285bbaf867eSLinus Walleij			gpio-line-names =
286bbaf867eSLinus Walleij			"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
287bbaf867eSLinus Walleij			"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
288bbaf867eSLinus Walleij			"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
289bbaf867eSLinus Walleij			"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
290bbaf867eSLinus Walleij			"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
291bbaf867eSLinus Walleij			"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
292bbaf867eSLinus Walleij			"[I2C2_SCL]", "[I2C2_SDA]";
293bbaf867eSLinus Walleij		};
294bbaf867eSLinus Walleij
295bbaf867eSLinus Walleij		gpio15: gpio@f702b000 {
296bbaf867eSLinus Walleij			gpio-line-names = "", "", "", "", "", "", "NC", "";
297bbaf867eSLinus Walleij		};
298bbaf867eSLinus Walleij
299bbaf867eSLinus Walleij		/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
300bbaf867eSLinus Walleij
30176f1dfb6SUlf Hansson		dwmmc_0: dwmmc0@f723d000 {
30276f1dfb6SUlf Hansson			cap-mmc-highspeed;
30376f1dfb6SUlf Hansson			non-removable;
30476f1dfb6SUlf Hansson			bus-width = <0x8>;
30576f1dfb6SUlf Hansson			vmmc-supply = <&ldo19>;
30676f1dfb6SUlf Hansson		};
30776f1dfb6SUlf Hansson
30876f1dfb6SUlf Hansson		dwmmc_1: dwmmc1@f723e000 {
30976f1dfb6SUlf Hansson			card-detect-delay = <200>;
31076f1dfb6SUlf Hansson			cap-sd-highspeed;
31176f1dfb6SUlf Hansson			sd-uhs-sdr12;
31276f1dfb6SUlf Hansson			sd-uhs-sdr25;
31376f1dfb6SUlf Hansson			sd-uhs-sdr50;
31476f1dfb6SUlf Hansson			vqmmc-supply = <&ldo7>;
31576f1dfb6SUlf Hansson			vmmc-supply = <&ldo10>;
31676f1dfb6SUlf Hansson			bus-width = <0x4>;
31776f1dfb6SUlf Hansson			disable-wp;
31876f1dfb6SUlf Hansson			cd-gpios = <&gpio1 0 1>;
31976f1dfb6SUlf Hansson		};
32076f1dfb6SUlf Hansson
321841478d4SGuodong Xu		dwmmc_2: dwmmc2@f723f000 {
32276f1dfb6SUlf Hansson			bus-width = <0x4>;
323841478d4SGuodong Xu			non-removable;
324ea452678SUlf Hansson			vmmc-supply = <&reg_vdd_3v3>;
325ea452678SUlf Hansson			mmc-pwrseq = <&wl1835_pwrseq>;
326841478d4SGuodong Xu
327841478d4SGuodong Xu			#address-cells = <0x1>;
328841478d4SGuodong Xu			#size-cells = <0x0>;
329841478d4SGuodong Xu			wlcore: wlcore@2 {
330841478d4SGuodong Xu				compatible = "ti,wl1835";
331841478d4SGuodong Xu				reg = <2>;	/* sdio func num */
332841478d4SGuodong Xu				/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
333841478d4SGuodong Xu				interrupt-parent = <&gpio1>;
334841478d4SGuodong Xu				interrupts = <3 IRQ_TYPE_EDGE_RISING>;
335841478d4SGuodong Xu			};
336841478d4SGuodong Xu		};
33760dac1b1SZhong Kaihua	};
338ad05f38bSGuodong Xu
339ad05f38bSGuodong Xu	leds {
340ad05f38bSGuodong Xu		compatible = "gpio-leds";
341ad05f38bSGuodong Xu		user_led4 {
342ad05f38bSGuodong Xu			label = "user_led4";
343ad05f38bSGuodong Xu			gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
344ad05f38bSGuodong Xu			linux,default-trigger = "heartbeat";
345ad05f38bSGuodong Xu		};
346ad05f38bSGuodong Xu
347ad05f38bSGuodong Xu		user_led3 {
348ad05f38bSGuodong Xu			label = "user_led3";
349ad05f38bSGuodong Xu			gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
350ad05f38bSGuodong Xu			linux,default-trigger = "mmc0";
351ad05f38bSGuodong Xu		};
352ad05f38bSGuodong Xu
353ad05f38bSGuodong Xu		user_led2 {
354ad05f38bSGuodong Xu			label = "user_led2";
355ad05f38bSGuodong Xu			gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
356ad05f38bSGuodong Xu			linux,default-trigger = "mmc1";
357ad05f38bSGuodong Xu		};
358ad05f38bSGuodong Xu
359ad05f38bSGuodong Xu		user_led1 {
360ad05f38bSGuodong Xu			label = "user_led1";
361ad05f38bSGuodong Xu			gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
362ad05f38bSGuodong Xu			linux,default-trigger = "cpu0";
363ad05f38bSGuodong Xu		};
364ad05f38bSGuodong Xu
365ad05f38bSGuodong Xu		wlan_active_led {
366ad05f38bSGuodong Xu			label = "wifi_active";
367ad05f38bSGuodong Xu			gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
368ad05f38bSGuodong Xu			linux,default-trigger = "phy0tx";
369ad05f38bSGuodong Xu			default-state = "off";
370ad05f38bSGuodong Xu		};
371ad05f38bSGuodong Xu
372ad05f38bSGuodong Xu		bt_active_led {
373ad05f38bSGuodong Xu			label = "bt_active";
374ad05f38bSGuodong Xu			gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
375ad05f38bSGuodong Xu			linux,default-trigger = "hci0rx";
376ad05f38bSGuodong Xu			default-state = "off";
377ad05f38bSGuodong Xu		};
378ad05f38bSGuodong Xu	};
379a817137aSChen Feng
380a817137aSChen Feng	pmic: pmic@f8000000 {
381a817137aSChen Feng		compatible = "hisilicon,hi655x-pmic";
382a817137aSChen Feng		reg = <0x0 0xf8000000 0x0 0x1000>;
383307ded89SDaniel Lezcano		#clock-cells = <0>;
384a817137aSChen Feng		interrupt-controller;
385a817137aSChen Feng		#interrupt-cells = <2>;
386a817137aSChen Feng		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
387a817137aSChen Feng
388a817137aSChen Feng		regulators {
389a817137aSChen Feng			ldo2: LDO2 {
390a817137aSChen Feng				regulator-name = "LDO2_2V8";
391a817137aSChen Feng				regulator-min-microvolt = <2500000>;
392a817137aSChen Feng				regulator-max-microvolt = <3200000>;
393a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
394a817137aSChen Feng			};
395a817137aSChen Feng
396a817137aSChen Feng			ldo7: LDO7 {
397a817137aSChen Feng				regulator-name = "LDO7_SDIO";
398a817137aSChen Feng				regulator-min-microvolt = <1800000>;
399a817137aSChen Feng				regulator-max-microvolt = <3300000>;
400a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
401a817137aSChen Feng			};
402a817137aSChen Feng
403a817137aSChen Feng			ldo10: LDO10 {
404a817137aSChen Feng				regulator-name = "LDO10_2V85";
405a817137aSChen Feng				regulator-min-microvolt = <1800000>;
406a817137aSChen Feng				regulator-max-microvolt = <3000000>;
407a817137aSChen Feng				regulator-enable-ramp-delay = <360>;
408a817137aSChen Feng			};
409a817137aSChen Feng
410a817137aSChen Feng			ldo13: LDO13 {
411a817137aSChen Feng				regulator-name = "LDO13_1V8";
412a817137aSChen Feng				regulator-min-microvolt = <1600000>;
413a817137aSChen Feng				regulator-max-microvolt = <1950000>;
414a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
415a817137aSChen Feng			};
416a817137aSChen Feng
417a817137aSChen Feng			ldo14: LDO14 {
418a817137aSChen Feng				regulator-name = "LDO14_2V8";
419a817137aSChen Feng				regulator-min-microvolt = <2500000>;
420a817137aSChen Feng				regulator-max-microvolt = <3200000>;
421a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
422a817137aSChen Feng			};
423a817137aSChen Feng
424a817137aSChen Feng			ldo15: LDO15 {
425a817137aSChen Feng				regulator-name = "LDO15_1V8";
426a817137aSChen Feng				regulator-min-microvolt = <1600000>;
427a817137aSChen Feng				regulator-max-microvolt = <1950000>;
428a817137aSChen Feng				regulator-boot-on;
429a817137aSChen Feng				regulator-always-on;
430a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
431a817137aSChen Feng			};
432a817137aSChen Feng
433a817137aSChen Feng			ldo17: LDO17 {
434a817137aSChen Feng				regulator-name = "LDO17_2V5";
435a817137aSChen Feng				regulator-min-microvolt = <2500000>;
436a817137aSChen Feng				regulator-max-microvolt = <3200000>;
437a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
438a817137aSChen Feng			};
439a817137aSChen Feng
440a817137aSChen Feng			ldo19: LDO19 {
441a817137aSChen Feng				regulator-name = "LDO19_3V0";
442a817137aSChen Feng				regulator-min-microvolt = <1800000>;
443a817137aSChen Feng				regulator-max-microvolt = <3000000>;
444a817137aSChen Feng				regulator-enable-ramp-delay = <360>;
445a817137aSChen Feng			};
446a817137aSChen Feng
447a817137aSChen Feng			ldo21: LDO21 {
448a817137aSChen Feng				regulator-name = "LDO21_1V8";
449a817137aSChen Feng				regulator-min-microvolt = <1650000>;
450a817137aSChen Feng				regulator-max-microvolt = <2000000>;
451a817137aSChen Feng				regulator-always-on;
452a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
453a817137aSChen Feng			};
454a817137aSChen Feng
455a817137aSChen Feng			ldo22: LDO22 {
456a817137aSChen Feng				regulator-name = "LDO22_1V2";
457a817137aSChen Feng				regulator-min-microvolt = <900000>;
458a817137aSChen Feng				regulator-max-microvolt = <1200000>;
459a817137aSChen Feng				regulator-boot-on;
460a817137aSChen Feng				regulator-always-on;
461a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
462a817137aSChen Feng			};
463a817137aSChen Feng		};
464a817137aSChen Feng	};
46514e21cb8SJerome Forissier
46614e21cb8SJerome Forissier	firmware {
46714e21cb8SJerome Forissier		optee {
46814e21cb8SJerome Forissier			compatible = "linaro,optee-tz";
46914e21cb8SJerome Forissier			method = "smc";
47014e21cb8SJerome Forissier		};
47114e21cb8SJerome Forissier	};
4720cf6a8e2SJohn Stultz
4730cf6a8e2SJohn Stultz	sound_card {
4740cf6a8e2SJohn Stultz		compatible = "audio-graph-card";
4750cf6a8e2SJohn Stultz		dais = <&i2s0_port0>;
4760cf6a8e2SJohn Stultz	};
47786e8f528SBintian Wang};
478dd90caacSRob Herring
479dd90caacSRob Herring&uart2 {
480dd90caacSRob Herring	label = "LS-UART0";
481dd90caacSRob Herring};
482dd90caacSRob Herring&uart3 {
483dd90caacSRob Herring	label = "LS-UART1";
484dd90caacSRob Herring};
4853814b61bSXinliang Liu
4863814b61bSXinliang Liu&ade {
4873814b61bSXinliang Liu	status = "ok";
4883814b61bSXinliang Liu};
4893814b61bSXinliang Liu
4903814b61bSXinliang Liu&dsi {
4913814b61bSXinliang Liu	status = "ok";
492b77c23a0SXinliang Liu
493b77c23a0SXinliang Liu	ports {
494b77c23a0SXinliang Liu		/* 1 for output port */
495b77c23a0SXinliang Liu		port@1 {
496b77c23a0SXinliang Liu			reg = <1>;
497b77c23a0SXinliang Liu
498b77c23a0SXinliang Liu			dsi_out0: endpoint@0 {
499b77c23a0SXinliang Liu				remote-endpoint = <&adv7533_in>;
500b77c23a0SXinliang Liu			};
501b77c23a0SXinliang Liu		};
502b77c23a0SXinliang Liu	};
503b77c23a0SXinliang Liu};
504b77c23a0SXinliang Liu
505b77c23a0SXinliang Liu&i2c2 {
506b77c23a0SXinliang Liu	#address-cells = <1>;
507b77c23a0SXinliang Liu	#size-cells = <0>;
508b77c23a0SXinliang Liu	status = "ok";
509b77c23a0SXinliang Liu
510b77c23a0SXinliang Liu	adv7533: adv7533@39 {
511b77c23a0SXinliang Liu		compatible = "adi,adv7533";
512b77c23a0SXinliang Liu		reg = <0x39>;
513b77c23a0SXinliang Liu		interrupt-parent = <&gpio1>;
514b77c23a0SXinliang Liu		interrupts = <1 2>;
515b77c23a0SXinliang Liu		pd-gpio = <&gpio0 4 0>;
516b77c23a0SXinliang Liu		adi,dsi-lanes = <4>;
5170cf6a8e2SJohn Stultz		#sound-dai-cells = <0>;
518b77c23a0SXinliang Liu
5190cf6a8e2SJohn Stultz		ports {
5200cf6a8e2SJohn Stultz			#address-cells = <1>;
5210cf6a8e2SJohn Stultz			#size-cells = <0>;
5220cf6a8e2SJohn Stultz			port@0 {
523b77c23a0SXinliang Liu				adv7533_in: endpoint {
524b77c23a0SXinliang Liu					remote-endpoint = <&dsi_out0>;
525b77c23a0SXinliang Liu				};
526b77c23a0SXinliang Liu			};
5270cf6a8e2SJohn Stultz			port@2 {
5280cf6a8e2SJohn Stultz				reg = <2>;
5290cf6a8e2SJohn Stultz				codec_endpoint: endpoint {
5300cf6a8e2SJohn Stultz					remote-endpoint = <&i2s0_cpu_endpoint>;
5310cf6a8e2SJohn Stultz				};
5320cf6a8e2SJohn Stultz			};
5330cf6a8e2SJohn Stultz		};
5340cf6a8e2SJohn Stultz	};
5350cf6a8e2SJohn Stultz};
5360cf6a8e2SJohn Stultz
5370cf6a8e2SJohn Stultz&i2s0 {
5380cf6a8e2SJohn Stultz
5390cf6a8e2SJohn Stultz	ports {
5400cf6a8e2SJohn Stultz		i2s0_port0: port@0 {
5410cf6a8e2SJohn Stultz			i2s0_cpu_endpoint: endpoint {
5420cf6a8e2SJohn Stultz				remote-endpoint = <&codec_endpoint>;
5430cf6a8e2SJohn Stultz				dai-format = "i2s";
5440cf6a8e2SJohn Stultz			};
5450cf6a8e2SJohn Stultz		};
546b77c23a0SXinliang Liu	};
5473814b61bSXinliang Liu};
548