1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 286e8f528SBintian Wang/* 386e8f528SBintian Wang * dts file for Hisilicon HiKey Development Board 486e8f528SBintian Wang * 586e8f528SBintian Wang * Copyright (C) 2015, Hisilicon Ltd. 686e8f528SBintian Wang * 786e8f528SBintian Wang */ 886e8f528SBintian Wang 986e8f528SBintian Wang/dts-v1/; 1086e8f528SBintian Wang#include "hi6220.dtsi" 11379e9bf5SZhong Kaihua#include "hikey-pinctrl.dtsi" 12a817137aSChen Feng#include <dt-bindings/gpio/gpio.h> 1386e8f528SBintian Wang 1486e8f528SBintian Wang/ { 1586e8f528SBintian Wang model = "HiKey Development Board"; 1686e8f528SBintian Wang compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; 1786e8f528SBintian Wang 1886e8f528SBintian Wang aliases { 19a362ec8fSTyler Baker serial0 = &uart0; /* On board UART0 */ 20a362ec8fSTyler Baker serial1 = &uart1; /* BT UART */ 21a362ec8fSTyler Baker serial2 = &uart2; /* LS Expansion UART0 */ 22a362ec8fSTyler Baker serial3 = &uart3; /* LS Expansion UART1 */ 2386e8f528SBintian Wang }; 2486e8f528SBintian Wang 2586e8f528SBintian Wang chosen { 26a362ec8fSTyler Baker stdout-path = "serial3:115200n8"; 2786e8f528SBintian Wang }; 2886e8f528SBintian Wang 296da3aba6SLeo Yan /* 306da3aba6SLeo Yan * Reserve below regions from memory node: 316da3aba6SLeo Yan * 326da3aba6SLeo Yan * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using 33330fd87cSJohn Stultz * 0x05f0,1000 - 0x05f0,1fff: Reboot reason 346da3aba6SLeo Yan * 0x06df,f000 - 0x06df,ffff: Mailbox message data 356da3aba6SLeo Yan * 0x0740,f000 - 0x0740,ffff: MCU firmware section 36813a7315SJohn Stultz * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer 376da3aba6SLeo Yan * 0x3e00,0000 - 0x3fff,ffff: OP-TEE 386da3aba6SLeo Yan */ 3986e8f528SBintian Wang memory@0 { 4086e8f528SBintian Wang device_type = "memory"; 416da3aba6SLeo Yan reg = <0x00000000 0x00000000 0x00000000 0x05e00000>, 42330fd87cSJohn Stultz <0x00000000 0x05f00000 0x00000000 0x00001000>, 43330fd87cSJohn Stultz <0x00000000 0x05f02000 0x00000000 0x00efd000>, 446da3aba6SLeo Yan <0x00000000 0x06e00000 0x00000000 0x0060f000>, 45813a7315SJohn Stultz <0x00000000 0x07410000 0x00000000 0x1aaf0000>, 46813a7315SJohn Stultz <0x00000000 0x22000000 0x00000000 0x1c000000>; 4786e8f528SBintian Wang }; 4860dac1b1SZhong Kaihua 49813a7315SJohn Stultz reserved-memory { 50813a7315SJohn Stultz #address-cells = <2>; 51813a7315SJohn Stultz #size-cells = <2>; 52813a7315SJohn Stultz ranges; 53813a7315SJohn Stultz 549977a8c3SMathieu Malaterre ramoops@21f00000 { 55813a7315SJohn Stultz compatible = "ramoops"; 56813a7315SJohn Stultz reg = <0x0 0x21f00000 0x0 0x00100000>; 57813a7315SJohn Stultz record-size = <0x00020000>; 58813a7315SJohn Stultz console-size = <0x00020000>; 59813a7315SJohn Stultz ftrace-size = <0x00020000>; 60813a7315SJohn Stultz }; 61813a7315SJohn Stultz 628f5203abSGuodong Xu /* global autoconfigured region for contiguous allocations */ 638f5203abSGuodong Xu linux,cma { 648f5203abSGuodong Xu compatible = "shared-dma-pool"; 658f5203abSGuodong Xu reusable; 668f5203abSGuodong Xu size = <0x00000000 0x08000000>; 678f5203abSGuodong Xu linux,cma-default; 688f5203abSGuodong Xu }; 698f5203abSGuodong Xu }; 70813a7315SJohn Stultz 71330fd87cSJohn Stultz reboot-mode-syscon@5f01000 { 72330fd87cSJohn Stultz compatible = "syscon", "simple-mfd"; 73330fd87cSJohn Stultz reg = <0x0 0x05f01000 0x0 0x00001000>; 74330fd87cSJohn Stultz 75330fd87cSJohn Stultz reboot-mode { 76330fd87cSJohn Stultz compatible = "syscon-reboot-mode"; 77330fd87cSJohn Stultz offset = <0x0>; 78330fd87cSJohn Stultz 79330fd87cSJohn Stultz mode-normal = <0x77665501>; 80330fd87cSJohn Stultz mode-bootloader = <0x77665500>; 81330fd87cSJohn Stultz mode-recovery = <0x77665502>; 82330fd87cSJohn Stultz }; 83330fd87cSJohn Stultz }; 84330fd87cSJohn Stultz 8584f7c60bSUlf Hansson reg_sys_5v: regulator@0 { 8684f7c60bSUlf Hansson compatible = "regulator-fixed"; 8784f7c60bSUlf Hansson regulator-name = "SYS_5V"; 8884f7c60bSUlf Hansson regulator-min-microvolt = <5000000>; 8984f7c60bSUlf Hansson regulator-max-microvolt = <5000000>; 9084f7c60bSUlf Hansson regulator-boot-on; 9184f7c60bSUlf Hansson regulator-always-on; 9284f7c60bSUlf Hansson }; 9384f7c60bSUlf Hansson 9484f7c60bSUlf Hansson reg_vdd_3v3: regulator@1 { 9584f7c60bSUlf Hansson compatible = "regulator-fixed"; 9684f7c60bSUlf Hansson regulator-name = "VDD_3V3"; 9784f7c60bSUlf Hansson regulator-min-microvolt = <3300000>; 9884f7c60bSUlf Hansson regulator-max-microvolt = <3300000>; 9984f7c60bSUlf Hansson regulator-boot-on; 10084f7c60bSUlf Hansson regulator-always-on; 10184f7c60bSUlf Hansson vin-supply = <®_sys_5v>; 10284f7c60bSUlf Hansson }; 10384f7c60bSUlf Hansson 10484f7c60bSUlf Hansson reg_5v_hub: regulator@2 { 1051b32a5ffSUlf Hansson compatible = "regulator-fixed"; 1061b32a5ffSUlf Hansson regulator-name = "5V_HUB"; 1071b32a5ffSUlf Hansson regulator-min-microvolt = <5000000>; 1081b32a5ffSUlf Hansson regulator-max-microvolt = <5000000>; 1091b32a5ffSUlf Hansson regulator-boot-on; 1101b32a5ffSUlf Hansson gpio = <&gpio0 7 0>; 1111b32a5ffSUlf Hansson regulator-always-on; 11284f7c60bSUlf Hansson vin-supply = <®_sys_5v>; 1131b32a5ffSUlf Hansson }; 1141b32a5ffSUlf Hansson 115ea452678SUlf Hansson wl1835_pwrseq: wl1835-pwrseq { 116ea452678SUlf Hansson compatible = "mmc-pwrseq-simple"; 117ea452678SUlf Hansson /* WLAN_EN GPIO */ 118ea452678SUlf Hansson reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 119ea452678SUlf Hansson clocks = <&pmic>; 120ea452678SUlf Hansson clock-names = "ext_clock"; 12183b94417SJan Kiszka post-power-on-delay-ms = <10>; 122ea452678SUlf Hansson power-off-delay-us = <10>; 123ea452678SUlf Hansson }; 124ea452678SUlf Hansson 12560dac1b1SZhong Kaihua soc { 12660dac1b1SZhong Kaihua spi0: spi@f7106000 { 12760dac1b1SZhong Kaihua status = "ok"; 12860dac1b1SZhong Kaihua }; 1290c231751SGuodong Xu 1300c231751SGuodong Xu i2c0: i2c@f7100000 { 1310c231751SGuodong Xu status = "ok"; 1320c231751SGuodong Xu }; 1330c231751SGuodong Xu 1340c231751SGuodong Xu i2c1: i2c@f7101000 { 1350c231751SGuodong Xu status = "ok"; 1360c231751SGuodong Xu }; 137c2aad932SGuodong Xu 138c2aad932SGuodong Xu uart1: uart@f7111000 { 1391b9c7b2dSJorge Ramirez-Ortiz assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>; 1401b9c7b2dSJorge Ramirez-Ortiz assigned-clock-rates = <150000000>; 141c2aad932SGuodong Xu status = "ok"; 142019aa56bSRob Herring 143019aa56bSRob Herring bluetooth { 144019aa56bSRob Herring compatible = "ti,wl1835-st"; 145019aa56bSRob Herring enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 146b73f2269SUlf Hansson clocks = <&pmic>; 147b73f2269SUlf Hansson clock-names = "ext_clock"; 148019aa56bSRob Herring }; 149c2aad932SGuodong Xu }; 150c2aad932SGuodong Xu 151c2aad932SGuodong Xu uart2: uart@f7112000 { 152c2aad932SGuodong Xu status = "ok"; 153c2aad932SGuodong Xu }; 154c2aad932SGuodong Xu 155c2aad932SGuodong Xu uart3: uart@f7113000 { 156c2aad932SGuodong Xu status = "ok"; 157c2aad932SGuodong Xu }; 158841478d4SGuodong Xu 159bbaf867eSLinus Walleij /* 160bbaf867eSLinus Walleij * Legend: proper name = the GPIO line is used as GPIO 161bbaf867eSLinus Walleij * NC = not connected (not routed from the SoC) 162bbaf867eSLinus Walleij * "[PER]" = pin is muxed for peripheral (not GPIO) 163bbaf867eSLinus Walleij * "" = no idea, schematic doesn't say, could be 164bbaf867eSLinus Walleij * unrouted (not connected to any external pin) 165bbaf867eSLinus Walleij * LSEC = Low Speed External Connector 166bbaf867eSLinus Walleij * HSEC = High Speed External Connector 167bbaf867eSLinus Walleij * 168bbaf867eSLinus Walleij * Pin assignments taken from LeMaker and CircuitCo Schematics 169bbaf867eSLinus Walleij * Rev A1. 170bbaf867eSLinus Walleij * 171bbaf867eSLinus Walleij * For the lines routed to the external connectors the 172bbaf867eSLinus Walleij * lines are named after the 96Boards CE Specification 1.0, 173bbaf867eSLinus Walleij * Appendix "Expansion Connector Signal Description". 174bbaf867eSLinus Walleij * 175bbaf867eSLinus Walleij * When the 96Board naming of a line and the schematic name of 176bbaf867eSLinus Walleij * the same line are in conflict, the 96Board specification 177bbaf867eSLinus Walleij * takes precedence, which means that the external UART on the 178bbaf867eSLinus Walleij * LSEC is named UART0 while the schematic and SoC names this 179bbaf867eSLinus Walleij * UART2. This is only for the informational lines i.e. "[FOO]", 180bbaf867eSLinus Walleij * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 181bbaf867eSLinus Walleij * ones actually used for GPIO. 182bbaf867eSLinus Walleij */ 183bbaf867eSLinus Walleij gpio0: gpio@f8011000 { 184bbaf867eSLinus Walleij gpio-line-names = "PWR_HOLD", "DSI_SEL", 185bbaf867eSLinus Walleij "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON", 186bbaf867eSLinus Walleij "PWRON_DET", "5V_HUB_EN"; 187bbaf867eSLinus Walleij }; 188bbaf867eSLinus Walleij 189bbaf867eSLinus Walleij gpio1: gpio@f8012000 { 190bbaf867eSLinus Walleij gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N", 191bbaf867eSLinus Walleij "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON"; 192bbaf867eSLinus Walleij }; 193bbaf867eSLinus Walleij 194bbaf867eSLinus Walleij gpio2: gpio@f8013000 { 195bbaf867eSLinus Walleij gpio-line-names = 196bbaf867eSLinus Walleij "GPIO-A", /* LSEC Pin 23: GPIO2_0 */ 197bbaf867eSLinus Walleij "GPIO-B", /* LSEC Pin 24: GPIO2_1 */ 198bbaf867eSLinus Walleij "GPIO-C", /* LSEC Pin 25: GPIO2_2 */ 199bbaf867eSLinus Walleij "GPIO-D", /* LSEC Pin 26: GPIO2_3 */ 200bbaf867eSLinus Walleij "GPIO-E", /* LSEC Pin 27: GPIO2_4 */ 201bbaf867eSLinus Walleij "USB_ID_DET", "USB_VBUS_DET", 202bbaf867eSLinus Walleij "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */ 203bbaf867eSLinus Walleij }; 204bbaf867eSLinus Walleij 205bbaf867eSLinus Walleij gpio3: gpio@f8014000 { 206bbaf867eSLinus Walleij gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "", 207bbaf867eSLinus Walleij "WLAN_ACTIVE", "NC", "NC"; 208bbaf867eSLinus Walleij }; 209bbaf867eSLinus Walleij 210bbaf867eSLinus Walleij gpio4: gpio@f7020000 { 211bbaf867eSLinus Walleij gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3", 212bbaf867eSLinus Walleij "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE"; 213bbaf867eSLinus Walleij }; 214bbaf867eSLinus Walleij 215bbaf867eSLinus Walleij gpio5: gpio@f7021000 { 216bbaf867eSLinus Walleij gpio-line-names = "NC", "NC", 217bbaf867eSLinus Walleij "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */ 218bbaf867eSLinus Walleij "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */ 219bbaf867eSLinus Walleij "[AUX_SSI1]", "NC", 220bbaf867eSLinus Walleij "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */ 221bbaf867eSLinus Walleij "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */ 222bbaf867eSLinus Walleij }; 223bbaf867eSLinus Walleij 224bbaf867eSLinus Walleij gpio6: gpio@f7022000 { 225bbaf867eSLinus Walleij gpio-line-names = 226bbaf867eSLinus Walleij "[SPI0_DIN]", /* Pin 10: SPI0_DI */ 227bbaf867eSLinus Walleij "[SPI0_DOUT]", /* Pin 14: SPI0_DO */ 228bbaf867eSLinus Walleij "[SPI0_CS]", /* Pin 12: SPI0_CS_N */ 229bbaf867eSLinus Walleij "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */ 230bbaf867eSLinus Walleij "NC", "NC", "NC", 231bbaf867eSLinus Walleij "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */ 232bbaf867eSLinus Walleij }; 233bbaf867eSLinus Walleij 234bbaf867eSLinus Walleij gpio7: gpio@f7023000 { 235bbaf867eSLinus Walleij gpio-line-names = "NC", "NC", "NC", "NC", 236bbaf867eSLinus Walleij "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */ 237bbaf867eSLinus Walleij "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */ 238bbaf867eSLinus Walleij "NC", "NC"; 239bbaf867eSLinus Walleij }; 240bbaf867eSLinus Walleij 241bbaf867eSLinus Walleij gpio8: gpio@f7024000 { 242bbaf867eSLinus Walleij gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC", 243bbaf867eSLinus Walleij "", "", "", "", "", ""; 244bbaf867eSLinus Walleij }; 245bbaf867eSLinus Walleij 246bbaf867eSLinus Walleij gpio9: gpio@f7025000 { 247bbaf867eSLinus Walleij gpio-line-names = "", 248bbaf867eSLinus Walleij "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */ 249bbaf867eSLinus Walleij "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */ 250bbaf867eSLinus Walleij "NC", "NC", "NC", "NC", "[ISP_CCLK0]"; 251bbaf867eSLinus Walleij }; 252bbaf867eSLinus Walleij 253bbaf867eSLinus Walleij gpio10: gpio@f7026000 { 254bbaf867eSLinus Walleij gpio-line-names = "BOOT_SEL", 255bbaf867eSLinus Walleij "[ISP_CCLK1]", 256bbaf867eSLinus Walleij "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */ 257bbaf867eSLinus Walleij "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */ 258bbaf867eSLinus Walleij "NC", "NC", 259bbaf867eSLinus Walleij "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */ 260bbaf867eSLinus Walleij "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */ 261bbaf867eSLinus Walleij }; 262bbaf867eSLinus Walleij 263bbaf867eSLinus Walleij gpio11: gpio@f7027000 { 264bbaf867eSLinus Walleij gpio-line-names = 265bbaf867eSLinus Walleij "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */ 266bbaf867eSLinus Walleij "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */ 267bbaf867eSLinus Walleij "", "NC", "NC", "NC", "", ""; 268bbaf867eSLinus Walleij }; 269bbaf867eSLinus Walleij 270bbaf867eSLinus Walleij gpio12: gpio@f7028000 { 271bbaf867eSLinus Walleij gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]", 272bbaf867eSLinus Walleij "[BT_PCM_DO]", 273bbaf867eSLinus Walleij "NC", "NC", "NC", "NC", 274bbaf867eSLinus Walleij "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */ 275bbaf867eSLinus Walleij }; 276bbaf867eSLinus Walleij 277bbaf867eSLinus Walleij gpio13: gpio@f7029000 { 278bbaf867eSLinus Walleij gpio-line-names = "[UART0_RX]", "[UART0_TX]", 279bbaf867eSLinus Walleij "[BT_UART1_CTS]", "[BT_UART1_RTS]", 280bbaf867eSLinus Walleij "[BT_UART1_RX]", "[BT_UART1_TX]", 281bbaf867eSLinus Walleij "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */ 282bbaf867eSLinus Walleij "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */ 283bbaf867eSLinus Walleij }; 284bbaf867eSLinus Walleij 285bbaf867eSLinus Walleij gpio14: gpio@f702a000 { 286bbaf867eSLinus Walleij gpio-line-names = 287bbaf867eSLinus Walleij "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */ 288bbaf867eSLinus Walleij "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */ 289bbaf867eSLinus Walleij "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */ 290bbaf867eSLinus Walleij "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */ 291bbaf867eSLinus Walleij "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */ 292bbaf867eSLinus Walleij "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */ 293bbaf867eSLinus Walleij "[I2C2_SCL]", "[I2C2_SDA]"; 294bbaf867eSLinus Walleij }; 295bbaf867eSLinus Walleij 296bbaf867eSLinus Walleij gpio15: gpio@f702b000 { 297bbaf867eSLinus Walleij gpio-line-names = "", "", "", "", "", "", "NC", ""; 298bbaf867eSLinus Walleij }; 299bbaf867eSLinus Walleij 300bbaf867eSLinus Walleij /* GPIO blocks 16 thru 19 do not appear to be routed to pins */ 301bbaf867eSLinus Walleij 30276f1dfb6SUlf Hansson dwmmc_0: dwmmc0@f723d000 { 30376f1dfb6SUlf Hansson cap-mmc-highspeed; 304abd7d097Soscardagrach mmc-hs200-1_8v; 30576f1dfb6SUlf Hansson non-removable; 30676f1dfb6SUlf Hansson bus-width = <0x8>; 30776f1dfb6SUlf Hansson vmmc-supply = <&ldo19>; 30876f1dfb6SUlf Hansson }; 30976f1dfb6SUlf Hansson 31076f1dfb6SUlf Hansson dwmmc_1: dwmmc1@f723e000 { 31176f1dfb6SUlf Hansson card-detect-delay = <200>; 31276f1dfb6SUlf Hansson cap-sd-highspeed; 31376f1dfb6SUlf Hansson sd-uhs-sdr12; 31476f1dfb6SUlf Hansson sd-uhs-sdr25; 31576f1dfb6SUlf Hansson sd-uhs-sdr50; 31676f1dfb6SUlf Hansson vqmmc-supply = <&ldo7>; 31776f1dfb6SUlf Hansson vmmc-supply = <&ldo10>; 31876f1dfb6SUlf Hansson bus-width = <0x4>; 31976f1dfb6SUlf Hansson disable-wp; 32076f1dfb6SUlf Hansson cd-gpios = <&gpio1 0 1>; 32176f1dfb6SUlf Hansson }; 32276f1dfb6SUlf Hansson 323841478d4SGuodong Xu dwmmc_2: dwmmc2@f723f000 { 32476f1dfb6SUlf Hansson bus-width = <0x4>; 325841478d4SGuodong Xu non-removable; 326f904390aSoscardagrach cap-power-off-card; 327ea452678SUlf Hansson vmmc-supply = <®_vdd_3v3>; 328ea452678SUlf Hansson mmc-pwrseq = <&wl1835_pwrseq>; 329841478d4SGuodong Xu 330841478d4SGuodong Xu #address-cells = <0x1>; 331841478d4SGuodong Xu #size-cells = <0x0>; 332841478d4SGuodong Xu wlcore: wlcore@2 { 333841478d4SGuodong Xu compatible = "ti,wl1835"; 334841478d4SGuodong Xu reg = <2>; /* sdio func num */ 335841478d4SGuodong Xu /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */ 336841478d4SGuodong Xu interrupt-parent = <&gpio1>; 337841478d4SGuodong Xu interrupts = <3 IRQ_TYPE_EDGE_RISING>; 338841478d4SGuodong Xu }; 339841478d4SGuodong Xu }; 34060dac1b1SZhong Kaihua }; 341ad05f38bSGuodong Xu 342ad05f38bSGuodong Xu leds { 343ad05f38bSGuodong Xu compatible = "gpio-leds"; 3442e3ea3e7SManivannan Sadhasivam 3452e3ea3e7SManivannan Sadhasivam user_led1 { 3462e3ea3e7SManivannan Sadhasivam label = "green:user1"; 347ad05f38bSGuodong Xu gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */ 348ad05f38bSGuodong Xu linux,default-trigger = "heartbeat"; 349ad05f38bSGuodong Xu }; 350ad05f38bSGuodong Xu 3512e3ea3e7SManivannan Sadhasivam user_led2 { 3522e3ea3e7SManivannan Sadhasivam label = "green:user2"; 353ad05f38bSGuodong Xu gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */ 354ad05f38bSGuodong Xu linux,default-trigger = "mmc0"; 355ad05f38bSGuodong Xu }; 356ad05f38bSGuodong Xu 3572e3ea3e7SManivannan Sadhasivam user_led3 { 3582e3ea3e7SManivannan Sadhasivam label = "green:user3"; 359ad05f38bSGuodong Xu gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */ 360ad05f38bSGuodong Xu linux,default-trigger = "mmc1"; 361ad05f38bSGuodong Xu }; 362ad05f38bSGuodong Xu 3632e3ea3e7SManivannan Sadhasivam user_led4 { 3642e3ea3e7SManivannan Sadhasivam label = "green:user4"; 365ad05f38bSGuodong Xu gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */ 366b6fff603SAmit Kucheria panic-indicator; 3672e3ea3e7SManivannan Sadhasivam linux,default-trigger = "none"; 368ad05f38bSGuodong Xu }; 369ad05f38bSGuodong Xu 370ad05f38bSGuodong Xu wlan_active_led { 3712e3ea3e7SManivannan Sadhasivam label = "yellow:wlan"; 372ad05f38bSGuodong Xu gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */ 373ad05f38bSGuodong Xu linux,default-trigger = "phy0tx"; 374ad05f38bSGuodong Xu default-state = "off"; 375ad05f38bSGuodong Xu }; 376ad05f38bSGuodong Xu 377ad05f38bSGuodong Xu bt_active_led { 3782e3ea3e7SManivannan Sadhasivam label = "blue:bt"; 379ad05f38bSGuodong Xu gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */ 3802e3ea3e7SManivannan Sadhasivam linux,default-trigger = "hci0-power"; 381ad05f38bSGuodong Xu default-state = "off"; 382ad05f38bSGuodong Xu }; 383ad05f38bSGuodong Xu }; 384a817137aSChen Feng 385a817137aSChen Feng pmic: pmic@f8000000 { 386a817137aSChen Feng compatible = "hisilicon,hi655x-pmic"; 387a817137aSChen Feng reg = <0x0 0xf8000000 0x0 0x1000>; 388307ded89SDaniel Lezcano #clock-cells = <0>; 389a817137aSChen Feng interrupt-controller; 390a817137aSChen Feng #interrupt-cells = <2>; 391a817137aSChen Feng pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 392a817137aSChen Feng 393a817137aSChen Feng regulators { 394a817137aSChen Feng ldo2: LDO2 { 395a817137aSChen Feng regulator-name = "LDO2_2V8"; 396a817137aSChen Feng regulator-min-microvolt = <2500000>; 397a817137aSChen Feng regulator-max-microvolt = <3200000>; 398a817137aSChen Feng regulator-enable-ramp-delay = <120>; 399a817137aSChen Feng }; 400a817137aSChen Feng 401a817137aSChen Feng ldo7: LDO7 { 402a817137aSChen Feng regulator-name = "LDO7_SDIO"; 403a817137aSChen Feng regulator-min-microvolt = <1800000>; 404a817137aSChen Feng regulator-max-microvolt = <3300000>; 405a817137aSChen Feng regulator-enable-ramp-delay = <120>; 406a817137aSChen Feng }; 407a817137aSChen Feng 408a817137aSChen Feng ldo10: LDO10 { 409a817137aSChen Feng regulator-name = "LDO10_2V85"; 410a817137aSChen Feng regulator-min-microvolt = <1800000>; 411a817137aSChen Feng regulator-max-microvolt = <3000000>; 412a817137aSChen Feng regulator-enable-ramp-delay = <360>; 413a817137aSChen Feng }; 414a817137aSChen Feng 415a817137aSChen Feng ldo13: LDO13 { 416a817137aSChen Feng regulator-name = "LDO13_1V8"; 417a817137aSChen Feng regulator-min-microvolt = <1600000>; 418a817137aSChen Feng regulator-max-microvolt = <1950000>; 419a817137aSChen Feng regulator-enable-ramp-delay = <120>; 420a817137aSChen Feng }; 421a817137aSChen Feng 422a817137aSChen Feng ldo14: LDO14 { 423a817137aSChen Feng regulator-name = "LDO14_2V8"; 424a817137aSChen Feng regulator-min-microvolt = <2500000>; 425a817137aSChen Feng regulator-max-microvolt = <3200000>; 426a817137aSChen Feng regulator-enable-ramp-delay = <120>; 427a817137aSChen Feng }; 428a817137aSChen Feng 429a817137aSChen Feng ldo15: LDO15 { 430a817137aSChen Feng regulator-name = "LDO15_1V8"; 431a817137aSChen Feng regulator-min-microvolt = <1600000>; 432a817137aSChen Feng regulator-max-microvolt = <1950000>; 433a817137aSChen Feng regulator-boot-on; 434a817137aSChen Feng regulator-always-on; 435a817137aSChen Feng regulator-enable-ramp-delay = <120>; 436a817137aSChen Feng }; 437a817137aSChen Feng 438a817137aSChen Feng ldo17: LDO17 { 439a817137aSChen Feng regulator-name = "LDO17_2V5"; 440a817137aSChen Feng regulator-min-microvolt = <2500000>; 441a817137aSChen Feng regulator-max-microvolt = <3200000>; 442a817137aSChen Feng regulator-enable-ramp-delay = <120>; 443a817137aSChen Feng }; 444a817137aSChen Feng 445a817137aSChen Feng ldo19: LDO19 { 446a817137aSChen Feng regulator-name = "LDO19_3V0"; 447a817137aSChen Feng regulator-min-microvolt = <1800000>; 448a817137aSChen Feng regulator-max-microvolt = <3000000>; 449a817137aSChen Feng regulator-enable-ramp-delay = <360>; 450a817137aSChen Feng }; 451a817137aSChen Feng 452a817137aSChen Feng ldo21: LDO21 { 453a817137aSChen Feng regulator-name = "LDO21_1V8"; 454a817137aSChen Feng regulator-min-microvolt = <1650000>; 455a817137aSChen Feng regulator-max-microvolt = <2000000>; 456a817137aSChen Feng regulator-always-on; 457a817137aSChen Feng regulator-enable-ramp-delay = <120>; 458a817137aSChen Feng }; 459a817137aSChen Feng 460a817137aSChen Feng ldo22: LDO22 { 461a817137aSChen Feng regulator-name = "LDO22_1V2"; 462a817137aSChen Feng regulator-min-microvolt = <900000>; 463a817137aSChen Feng regulator-max-microvolt = <1200000>; 464a817137aSChen Feng regulator-boot-on; 465a817137aSChen Feng regulator-always-on; 466a817137aSChen Feng regulator-enable-ramp-delay = <120>; 467a817137aSChen Feng }; 468a817137aSChen Feng }; 469a817137aSChen Feng }; 47014e21cb8SJerome Forissier 47114e21cb8SJerome Forissier firmware { 47214e21cb8SJerome Forissier optee { 47314e21cb8SJerome Forissier compatible = "linaro,optee-tz"; 47414e21cb8SJerome Forissier method = "smc"; 47514e21cb8SJerome Forissier }; 47614e21cb8SJerome Forissier }; 4770cf6a8e2SJohn Stultz 4780cf6a8e2SJohn Stultz sound_card { 4790cf6a8e2SJohn Stultz compatible = "audio-graph-card"; 4800cf6a8e2SJohn Stultz dais = <&i2s0_port0>; 4810cf6a8e2SJohn Stultz }; 48286e8f528SBintian Wang}; 483dd90caacSRob Herring 484dd90caacSRob Herring&uart2 { 485dd90caacSRob Herring label = "LS-UART0"; 486dd90caacSRob Herring}; 487dd90caacSRob Herring&uart3 { 488dd90caacSRob Herring label = "LS-UART1"; 489dd90caacSRob Herring}; 4903814b61bSXinliang Liu 4913814b61bSXinliang Liu&ade { 4923814b61bSXinliang Liu status = "ok"; 4933814b61bSXinliang Liu}; 4943814b61bSXinliang Liu 4953814b61bSXinliang Liu&dsi { 4963814b61bSXinliang Liu status = "ok"; 497b77c23a0SXinliang Liu 498b77c23a0SXinliang Liu ports { 499b77c23a0SXinliang Liu /* 1 for output port */ 500b77c23a0SXinliang Liu port@1 { 501b77c23a0SXinliang Liu reg = <1>; 502b77c23a0SXinliang Liu 503b77c23a0SXinliang Liu dsi_out0: endpoint@0 { 504b77c23a0SXinliang Liu remote-endpoint = <&adv7533_in>; 505b77c23a0SXinliang Liu }; 506b77c23a0SXinliang Liu }; 507b77c23a0SXinliang Liu }; 508b77c23a0SXinliang Liu}; 509b77c23a0SXinliang Liu 510b77c23a0SXinliang Liu&i2c2 { 511b77c23a0SXinliang Liu #address-cells = <1>; 512b77c23a0SXinliang Liu #size-cells = <0>; 513b77c23a0SXinliang Liu status = "ok"; 514b77c23a0SXinliang Liu 515b77c23a0SXinliang Liu adv7533: adv7533@39 { 516b77c23a0SXinliang Liu compatible = "adi,adv7533"; 517b77c23a0SXinliang Liu reg = <0x39>; 518b77c23a0SXinliang Liu interrupt-parent = <&gpio1>; 519b77c23a0SXinliang Liu interrupts = <1 2>; 520b77c23a0SXinliang Liu pd-gpio = <&gpio0 4 0>; 521b77c23a0SXinliang Liu adi,dsi-lanes = <4>; 5220cf6a8e2SJohn Stultz #sound-dai-cells = <0>; 523b77c23a0SXinliang Liu 5240cf6a8e2SJohn Stultz ports { 5250cf6a8e2SJohn Stultz #address-cells = <1>; 5260cf6a8e2SJohn Stultz #size-cells = <0>; 5270cf6a8e2SJohn Stultz port@0 { 528b77c23a0SXinliang Liu adv7533_in: endpoint { 529b77c23a0SXinliang Liu remote-endpoint = <&dsi_out0>; 530b77c23a0SXinliang Liu }; 531b77c23a0SXinliang Liu }; 5320cf6a8e2SJohn Stultz port@2 { 5330cf6a8e2SJohn Stultz reg = <2>; 5340cf6a8e2SJohn Stultz codec_endpoint: endpoint { 5350cf6a8e2SJohn Stultz remote-endpoint = <&i2s0_cpu_endpoint>; 5360cf6a8e2SJohn Stultz }; 5370cf6a8e2SJohn Stultz }; 5380cf6a8e2SJohn Stultz }; 5390cf6a8e2SJohn Stultz }; 5400cf6a8e2SJohn Stultz}; 5410cf6a8e2SJohn Stultz 5420cf6a8e2SJohn Stultz&i2s0 { 5430cf6a8e2SJohn Stultz 5440cf6a8e2SJohn Stultz ports { 5450cf6a8e2SJohn Stultz i2s0_port0: port@0 { 5460cf6a8e2SJohn Stultz i2s0_cpu_endpoint: endpoint { 5470cf6a8e2SJohn Stultz remote-endpoint = <&codec_endpoint>; 5480cf6a8e2SJohn Stultz dai-format = "i2s"; 5490cf6a8e2SJohn Stultz }; 5500cf6a8e2SJohn Stultz }; 551b77c23a0SXinliang Liu }; 5523814b61bSXinliang Liu}; 553