186e8f528SBintian Wang/*
286e8f528SBintian Wang * dts file for Hisilicon HiKey Development Board
386e8f528SBintian Wang *
486e8f528SBintian Wang * Copyright (C) 2015, Hisilicon Ltd.
586e8f528SBintian Wang *
686e8f528SBintian Wang */
786e8f528SBintian Wang
886e8f528SBintian Wang/dts-v1/;
986e8f528SBintian Wang#include "hi6220.dtsi"
10379e9bf5SZhong Kaihua#include "hikey-pinctrl.dtsi"
11a817137aSChen Feng#include <dt-bindings/gpio/gpio.h>
1286e8f528SBintian Wang
1386e8f528SBintian Wang/ {
1486e8f528SBintian Wang	model = "HiKey Development Board";
1586e8f528SBintian Wang	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
1686e8f528SBintian Wang
1786e8f528SBintian Wang	aliases {
18a362ec8fSTyler Baker		serial0 = &uart0; /* On board UART0 */
19a362ec8fSTyler Baker		serial1 = &uart1; /* BT UART */
20a362ec8fSTyler Baker		serial2 = &uart2; /* LS Expansion UART0 */
21a362ec8fSTyler Baker		serial3 = &uart3; /* LS Expansion UART1 */
2286e8f528SBintian Wang	};
2386e8f528SBintian Wang
2486e8f528SBintian Wang	chosen {
25a362ec8fSTyler Baker		stdout-path = "serial3:115200n8";
2686e8f528SBintian Wang	};
2786e8f528SBintian Wang
286da3aba6SLeo Yan	/*
296da3aba6SLeo Yan	 * Reserve below regions from memory node:
306da3aba6SLeo Yan	 *
316da3aba6SLeo Yan	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
32330fd87cSJohn Stultz	 *  0x05f0,1000 - 0x05f0,1fff: Reboot reason
336da3aba6SLeo Yan	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data
346da3aba6SLeo Yan	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section
35813a7315SJohn Stultz	 *  0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
366da3aba6SLeo Yan	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE
376da3aba6SLeo Yan	 */
3886e8f528SBintian Wang	memory@0 {
3986e8f528SBintian Wang		device_type = "memory";
406da3aba6SLeo Yan		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
41330fd87cSJohn Stultz		      <0x00000000 0x05f00000 0x00000000 0x00001000>,
42330fd87cSJohn Stultz		      <0x00000000 0x05f02000 0x00000000 0x00efd000>,
436da3aba6SLeo Yan		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,
44813a7315SJohn Stultz		      <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
45813a7315SJohn Stultz		      <0x00000000 0x22000000 0x00000000 0x1c000000>;
4686e8f528SBintian Wang	};
4760dac1b1SZhong Kaihua
48813a7315SJohn Stultz	reserved-memory {
49813a7315SJohn Stultz		#address-cells = <2>;
50813a7315SJohn Stultz		#size-cells = <2>;
51813a7315SJohn Stultz		ranges;
52813a7315SJohn Stultz
53813a7315SJohn Stultz		ramoops@0x21f00000 {
54813a7315SJohn Stultz			compatible = "ramoops";
55813a7315SJohn Stultz			reg = <0x0 0x21f00000 0x0 0x00100000>;
56813a7315SJohn Stultz			record-size	= <0x00020000>;
57813a7315SJohn Stultz			console-size	= <0x00020000>;
58813a7315SJohn Stultz			ftrace-size	= <0x00020000>;
59813a7315SJohn Stultz		};
60813a7315SJohn Stultz
618f5203abSGuodong Xu		/* global autoconfigured region for contiguous allocations */
628f5203abSGuodong Xu		linux,cma {
638f5203abSGuodong Xu			compatible = "shared-dma-pool";
648f5203abSGuodong Xu			reusable;
658f5203abSGuodong Xu			size = <0x00000000 0x08000000>;
668f5203abSGuodong Xu			linux,cma-default;
678f5203abSGuodong Xu		};
688f5203abSGuodong Xu	};
69813a7315SJohn Stultz
70330fd87cSJohn Stultz	reboot-mode-syscon@5f01000 {
71330fd87cSJohn Stultz		compatible = "syscon", "simple-mfd";
72330fd87cSJohn Stultz		reg = <0x0 0x05f01000 0x0 0x00001000>;
73330fd87cSJohn Stultz
74330fd87cSJohn Stultz		reboot-mode {
75330fd87cSJohn Stultz			compatible = "syscon-reboot-mode";
76330fd87cSJohn Stultz			offset = <0x0>;
77330fd87cSJohn Stultz
78330fd87cSJohn Stultz			mode-normal	= <0x77665501>;
79330fd87cSJohn Stultz			mode-bootloader	= <0x77665500>;
80330fd87cSJohn Stultz			mode-recovery	= <0x77665502>;
81330fd87cSJohn Stultz		};
82330fd87cSJohn Stultz	};
83330fd87cSJohn Stultz
8460dac1b1SZhong Kaihua	soc {
8560dac1b1SZhong Kaihua		spi0: spi@f7106000 {
8660dac1b1SZhong Kaihua			status = "ok";
8760dac1b1SZhong Kaihua		};
880c231751SGuodong Xu
890c231751SGuodong Xu		i2c0: i2c@f7100000 {
900c231751SGuodong Xu			status = "ok";
910c231751SGuodong Xu		};
920c231751SGuodong Xu
930c231751SGuodong Xu		i2c1: i2c@f7101000 {
940c231751SGuodong Xu			status = "ok";
950c231751SGuodong Xu		};
96c2aad932SGuodong Xu
97c2aad932SGuodong Xu		uart1: uart@f7111000 {
981b9c7b2dSJorge Ramirez-Ortiz			assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
991b9c7b2dSJorge Ramirez-Ortiz			assigned-clock-rates = <150000000>;
100c2aad932SGuodong Xu			status = "ok";
101019aa56bSRob Herring
102019aa56bSRob Herring			bluetooth {
103019aa56bSRob Herring				compatible = "ti,wl1835-st";
104019aa56bSRob Herring				enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
105019aa56bSRob Herring			};
106c2aad932SGuodong Xu		};
107c2aad932SGuodong Xu
108c2aad932SGuodong Xu		uart2: uart@f7112000 {
109c2aad932SGuodong Xu			status = "ok";
110c2aad932SGuodong Xu		};
111c2aad932SGuodong Xu
112c2aad932SGuodong Xu		uart3: uart@f7113000 {
113c2aad932SGuodong Xu			status = "ok";
114c2aad932SGuodong Xu		};
115841478d4SGuodong Xu
116bbaf867eSLinus Walleij		/*
117bbaf867eSLinus Walleij		 * Legend: proper name = the GPIO line is used as GPIO
118bbaf867eSLinus Walleij		 *         NC = not connected (not routed from the SoC)
119bbaf867eSLinus Walleij		 *         "[PER]" = pin is muxed for peripheral (not GPIO)
120bbaf867eSLinus Walleij		 *         "" = no idea, schematic doesn't say, could be
121bbaf867eSLinus Walleij		 *              unrouted (not connected to any external pin)
122bbaf867eSLinus Walleij		 *         LSEC = Low Speed External Connector
123bbaf867eSLinus Walleij		 *         HSEC = High Speed External Connector
124bbaf867eSLinus Walleij		 *
125bbaf867eSLinus Walleij		 * Pin assignments taken from LeMaker and CircuitCo Schematics
126bbaf867eSLinus Walleij		 * Rev A1.
127bbaf867eSLinus Walleij		 *
128bbaf867eSLinus Walleij		 * For the lines routed to the external connectors the
129bbaf867eSLinus Walleij		 * lines are named after the 96Boards CE Specification 1.0,
130bbaf867eSLinus Walleij		 * Appendix "Expansion Connector Signal Description".
131bbaf867eSLinus Walleij		 *
132bbaf867eSLinus Walleij		 * When the 96Board naming of a line and the schematic name of
133bbaf867eSLinus Walleij		 * the same line are in conflict, the 96Board specification
134bbaf867eSLinus Walleij		 * takes precedence, which means that the external UART on the
135bbaf867eSLinus Walleij		 * LSEC is named UART0 while the schematic and SoC names this
136bbaf867eSLinus Walleij		 * UART2. This is only for the informational lines i.e. "[FOO]",
137bbaf867eSLinus Walleij		 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
138bbaf867eSLinus Walleij		 * ones actually used for GPIO.
139bbaf867eSLinus Walleij		 */
140bbaf867eSLinus Walleij		gpio0: gpio@f8011000 {
141bbaf867eSLinus Walleij			gpio-line-names = "PWR_HOLD", "DSI_SEL",
142bbaf867eSLinus Walleij			"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
143bbaf867eSLinus Walleij			"PWRON_DET", "5V_HUB_EN";
144bbaf867eSLinus Walleij		};
145bbaf867eSLinus Walleij
146bbaf867eSLinus Walleij		gpio1: gpio@f8012000 {
147bbaf867eSLinus Walleij			gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
148bbaf867eSLinus Walleij			"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
149bbaf867eSLinus Walleij		};
150bbaf867eSLinus Walleij
151bbaf867eSLinus Walleij		gpio2: gpio@f8013000 {
152bbaf867eSLinus Walleij			gpio-line-names =
153bbaf867eSLinus Walleij				"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
154bbaf867eSLinus Walleij				"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
155bbaf867eSLinus Walleij				"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
156bbaf867eSLinus Walleij				"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
157bbaf867eSLinus Walleij				"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
158bbaf867eSLinus Walleij				"USB_ID_DET", "USB_VBUS_DET",
159bbaf867eSLinus Walleij				"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
160bbaf867eSLinus Walleij		};
161bbaf867eSLinus Walleij
162bbaf867eSLinus Walleij		gpio3: gpio@f8014000 {
163bbaf867eSLinus Walleij			gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
164bbaf867eSLinus Walleij			"WLAN_ACTIVE", "NC", "NC";
165bbaf867eSLinus Walleij		};
166bbaf867eSLinus Walleij
167bbaf867eSLinus Walleij		gpio4: gpio@f7020000 {
168bbaf867eSLinus Walleij			gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
169bbaf867eSLinus Walleij			"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
170bbaf867eSLinus Walleij		};
171bbaf867eSLinus Walleij
172bbaf867eSLinus Walleij		gpio5: gpio@f7021000 {
173bbaf867eSLinus Walleij			gpio-line-names = "NC", "NC",
174bbaf867eSLinus Walleij			"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
175bbaf867eSLinus Walleij			"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
176bbaf867eSLinus Walleij			"[AUX_SSI1]", "NC",
177bbaf867eSLinus Walleij			"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
178bbaf867eSLinus Walleij			"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
179bbaf867eSLinus Walleij		};
180bbaf867eSLinus Walleij
181bbaf867eSLinus Walleij		gpio6: gpio@f7022000 {
182bbaf867eSLinus Walleij			gpio-line-names =
183bbaf867eSLinus Walleij			"[SPI0_DIN]", /* Pin 10: SPI0_DI */
184bbaf867eSLinus Walleij			"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
185bbaf867eSLinus Walleij			"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
186bbaf867eSLinus Walleij			"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
187bbaf867eSLinus Walleij			"NC", "NC", "NC",
188bbaf867eSLinus Walleij			"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
189bbaf867eSLinus Walleij		};
190bbaf867eSLinus Walleij
191bbaf867eSLinus Walleij		gpio7: gpio@f7023000 {
192bbaf867eSLinus Walleij			gpio-line-names = "NC", "NC", "NC", "NC",
193bbaf867eSLinus Walleij			"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
194bbaf867eSLinus Walleij			"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
195bbaf867eSLinus Walleij			"NC", "NC";
196bbaf867eSLinus Walleij		};
197bbaf867eSLinus Walleij
198bbaf867eSLinus Walleij		gpio8: gpio@f7024000 {
199bbaf867eSLinus Walleij			gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
200bbaf867eSLinus Walleij			"", "", "", "", "", "";
201bbaf867eSLinus Walleij		};
202bbaf867eSLinus Walleij
203bbaf867eSLinus Walleij		gpio9: gpio@f7025000 {
204bbaf867eSLinus Walleij			gpio-line-names = "",
205bbaf867eSLinus Walleij			"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
206bbaf867eSLinus Walleij			"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
207bbaf867eSLinus Walleij			"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
208bbaf867eSLinus Walleij		};
209bbaf867eSLinus Walleij
210bbaf867eSLinus Walleij		gpio10: gpio@f7026000 {
211bbaf867eSLinus Walleij			gpio-line-names = "BOOT_SEL",
212bbaf867eSLinus Walleij			"[ISP_CCLK1]",
213bbaf867eSLinus Walleij			"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
214bbaf867eSLinus Walleij			"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
215bbaf867eSLinus Walleij			"NC", "NC",
216bbaf867eSLinus Walleij			"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
217bbaf867eSLinus Walleij			"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
218bbaf867eSLinus Walleij		};
219bbaf867eSLinus Walleij
220bbaf867eSLinus Walleij		gpio11: gpio@f7027000 {
221bbaf867eSLinus Walleij			gpio-line-names =
222bbaf867eSLinus Walleij			"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
223bbaf867eSLinus Walleij			"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
224bbaf867eSLinus Walleij			"", "NC", "NC", "NC", "", "";
225bbaf867eSLinus Walleij		};
226bbaf867eSLinus Walleij
227bbaf867eSLinus Walleij		gpio12: gpio@f7028000 {
228bbaf867eSLinus Walleij			gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
229bbaf867eSLinus Walleij			"[BT_PCM_DO]",
230bbaf867eSLinus Walleij			"NC", "NC", "NC", "NC",
231bbaf867eSLinus Walleij			"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
232bbaf867eSLinus Walleij		};
233bbaf867eSLinus Walleij
234bbaf867eSLinus Walleij		gpio13: gpio@f7029000 {
235bbaf867eSLinus Walleij			gpio-line-names = "[UART0_RX]", "[UART0_TX]",
236bbaf867eSLinus Walleij			"[BT_UART1_CTS]", "[BT_UART1_RTS]",
237bbaf867eSLinus Walleij			"[BT_UART1_RX]", "[BT_UART1_TX]",
238bbaf867eSLinus Walleij			"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
239bbaf867eSLinus Walleij			"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
240bbaf867eSLinus Walleij		};
241bbaf867eSLinus Walleij
242bbaf867eSLinus Walleij		gpio14: gpio@f702a000 {
243bbaf867eSLinus Walleij			gpio-line-names =
244bbaf867eSLinus Walleij			"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
245bbaf867eSLinus Walleij			"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
246bbaf867eSLinus Walleij			"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
247bbaf867eSLinus Walleij			"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
248bbaf867eSLinus Walleij			"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
249bbaf867eSLinus Walleij			"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
250bbaf867eSLinus Walleij			"[I2C2_SCL]", "[I2C2_SDA]";
251bbaf867eSLinus Walleij		};
252bbaf867eSLinus Walleij
253bbaf867eSLinus Walleij		gpio15: gpio@f702b000 {
254bbaf867eSLinus Walleij			gpio-line-names = "", "", "", "", "", "", "NC", "";
255bbaf867eSLinus Walleij		};
256bbaf867eSLinus Walleij
257bbaf867eSLinus Walleij		/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
258bbaf867eSLinus Walleij
259841478d4SGuodong Xu		dwmmc_2: dwmmc2@f723f000 {
260841478d4SGuodong Xu			ti,non-removable;
261841478d4SGuodong Xu			non-removable;
262841478d4SGuodong Xu			/* WL_EN */
263841478d4SGuodong Xu			vmmc-supply = <&wlan_en_reg>;
264841478d4SGuodong Xu
265841478d4SGuodong Xu			#address-cells = <0x1>;
266841478d4SGuodong Xu			#size-cells = <0x0>;
267841478d4SGuodong Xu			wlcore: wlcore@2 {
268841478d4SGuodong Xu				compatible = "ti,wl1835";
269841478d4SGuodong Xu				reg = <2>;	/* sdio func num */
270841478d4SGuodong Xu				/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
271841478d4SGuodong Xu				interrupt-parent = <&gpio1>;
272841478d4SGuodong Xu				interrupts = <3 IRQ_TYPE_EDGE_RISING>;
273841478d4SGuodong Xu			};
274841478d4SGuodong Xu		};
275841478d4SGuodong Xu
276841478d4SGuodong Xu		wlan_en_reg: regulator@1 {
277841478d4SGuodong Xu			compatible = "regulator-fixed";
278841478d4SGuodong Xu			regulator-name = "wlan-en-regulator";
279841478d4SGuodong Xu			regulator-min-microvolt = <1800000>;
280841478d4SGuodong Xu			regulator-max-microvolt = <1800000>;
281841478d4SGuodong Xu			/* WLAN_EN GPIO */
282841478d4SGuodong Xu			gpio = <&gpio0 5 0>;
283841478d4SGuodong Xu			/* WLAN card specific delay */
284841478d4SGuodong Xu			startup-delay-us = <70000>;
285841478d4SGuodong Xu			enable-active-high;
286841478d4SGuodong Xu		};
28760dac1b1SZhong Kaihua	};
288ad05f38bSGuodong Xu
289ad05f38bSGuodong Xu	leds {
290ad05f38bSGuodong Xu		compatible = "gpio-leds";
291ad05f38bSGuodong Xu		user_led4 {
292ad05f38bSGuodong Xu			label = "user_led4";
293ad05f38bSGuodong Xu			gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
294ad05f38bSGuodong Xu			linux,default-trigger = "heartbeat";
295ad05f38bSGuodong Xu		};
296ad05f38bSGuodong Xu
297ad05f38bSGuodong Xu		user_led3 {
298ad05f38bSGuodong Xu			label = "user_led3";
299ad05f38bSGuodong Xu			gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
300ad05f38bSGuodong Xu			linux,default-trigger = "mmc0";
301ad05f38bSGuodong Xu		};
302ad05f38bSGuodong Xu
303ad05f38bSGuodong Xu		user_led2 {
304ad05f38bSGuodong Xu			label = "user_led2";
305ad05f38bSGuodong Xu			gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
306ad05f38bSGuodong Xu			linux,default-trigger = "mmc1";
307ad05f38bSGuodong Xu		};
308ad05f38bSGuodong Xu
309ad05f38bSGuodong Xu		user_led1 {
310ad05f38bSGuodong Xu			label = "user_led1";
311ad05f38bSGuodong Xu			gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
312ad05f38bSGuodong Xu			linux,default-trigger = "cpu0";
313ad05f38bSGuodong Xu		};
314ad05f38bSGuodong Xu
315ad05f38bSGuodong Xu		wlan_active_led {
316ad05f38bSGuodong Xu			label = "wifi_active";
317ad05f38bSGuodong Xu			gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
318ad05f38bSGuodong Xu			linux,default-trigger = "phy0tx";
319ad05f38bSGuodong Xu			default-state = "off";
320ad05f38bSGuodong Xu		};
321ad05f38bSGuodong Xu
322ad05f38bSGuodong Xu		bt_active_led {
323ad05f38bSGuodong Xu			label = "bt_active";
324ad05f38bSGuodong Xu			gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
325ad05f38bSGuodong Xu			linux,default-trigger = "hci0rx";
326ad05f38bSGuodong Xu			default-state = "off";
327ad05f38bSGuodong Xu		};
328ad05f38bSGuodong Xu	};
329a817137aSChen Feng
330a817137aSChen Feng	pmic: pmic@f8000000 {
331a817137aSChen Feng		compatible = "hisilicon,hi655x-pmic";
332a817137aSChen Feng		reg = <0x0 0xf8000000 0x0 0x1000>;
333307ded89SDaniel Lezcano		#clock-cells = <0>;
334a817137aSChen Feng		interrupt-controller;
335a817137aSChen Feng		#interrupt-cells = <2>;
336a817137aSChen Feng		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
337a817137aSChen Feng
338a817137aSChen Feng		regulators {
339a817137aSChen Feng			ldo2: LDO2 {
340a817137aSChen Feng				regulator-name = "LDO2_2V8";
341a817137aSChen Feng				regulator-min-microvolt = <2500000>;
342a817137aSChen Feng				regulator-max-microvolt = <3200000>;
343a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
344a817137aSChen Feng			};
345a817137aSChen Feng
346a817137aSChen Feng			ldo7: LDO7 {
347a817137aSChen Feng				regulator-name = "LDO7_SDIO";
348a817137aSChen Feng				regulator-min-microvolt = <1800000>;
349a817137aSChen Feng				regulator-max-microvolt = <3300000>;
350a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
351a817137aSChen Feng			};
352a817137aSChen Feng
353a817137aSChen Feng			ldo10: LDO10 {
354a817137aSChen Feng				regulator-name = "LDO10_2V85";
355a817137aSChen Feng				regulator-min-microvolt = <1800000>;
356a817137aSChen Feng				regulator-max-microvolt = <3000000>;
357a817137aSChen Feng				regulator-enable-ramp-delay = <360>;
358a817137aSChen Feng			};
359a817137aSChen Feng
360a817137aSChen Feng			ldo13: LDO13 {
361a817137aSChen Feng				regulator-name = "LDO13_1V8";
362a817137aSChen Feng				regulator-min-microvolt = <1600000>;
363a817137aSChen Feng				regulator-max-microvolt = <1950000>;
364a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
365a817137aSChen Feng			};
366a817137aSChen Feng
367a817137aSChen Feng			ldo14: LDO14 {
368a817137aSChen Feng				regulator-name = "LDO14_2V8";
369a817137aSChen Feng				regulator-min-microvolt = <2500000>;
370a817137aSChen Feng				regulator-max-microvolt = <3200000>;
371a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
372a817137aSChen Feng			};
373a817137aSChen Feng
374a817137aSChen Feng			ldo15: LDO15 {
375a817137aSChen Feng				regulator-name = "LDO15_1V8";
376a817137aSChen Feng				regulator-min-microvolt = <1600000>;
377a817137aSChen Feng				regulator-max-microvolt = <1950000>;
378a817137aSChen Feng				regulator-boot-on;
379a817137aSChen Feng				regulator-always-on;
380a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
381a817137aSChen Feng			};
382a817137aSChen Feng
383a817137aSChen Feng			ldo17: LDO17 {
384a817137aSChen Feng				regulator-name = "LDO17_2V5";
385a817137aSChen Feng				regulator-min-microvolt = <2500000>;
386a817137aSChen Feng				regulator-max-microvolt = <3200000>;
387a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
388a817137aSChen Feng			};
389a817137aSChen Feng
390a817137aSChen Feng			ldo19: LDO19 {
391a817137aSChen Feng				regulator-name = "LDO19_3V0";
392a817137aSChen Feng				regulator-min-microvolt = <1800000>;
393a817137aSChen Feng				regulator-max-microvolt = <3000000>;
394a817137aSChen Feng				regulator-enable-ramp-delay = <360>;
395a817137aSChen Feng			};
396a817137aSChen Feng
397a817137aSChen Feng			ldo21: LDO21 {
398a817137aSChen Feng				regulator-name = "LDO21_1V8";
399a817137aSChen Feng				regulator-min-microvolt = <1650000>;
400a817137aSChen Feng				regulator-max-microvolt = <2000000>;
401a817137aSChen Feng				regulator-always-on;
402a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
403a817137aSChen Feng			};
404a817137aSChen Feng
405a817137aSChen Feng			ldo22: LDO22 {
406a817137aSChen Feng				regulator-name = "LDO22_1V2";
407a817137aSChen Feng				regulator-min-microvolt = <900000>;
408a817137aSChen Feng				regulator-max-microvolt = <1200000>;
409a817137aSChen Feng				regulator-boot-on;
410a817137aSChen Feng				regulator-always-on;
411a817137aSChen Feng				regulator-enable-ramp-delay = <120>;
412a817137aSChen Feng			};
413a817137aSChen Feng		};
414a817137aSChen Feng	};
41514e21cb8SJerome Forissier
41614e21cb8SJerome Forissier	firmware {
41714e21cb8SJerome Forissier		optee {
41814e21cb8SJerome Forissier			compatible = "linaro,optee-tz";
41914e21cb8SJerome Forissier			method = "smc";
42014e21cb8SJerome Forissier		};
42114e21cb8SJerome Forissier	};
42286e8f528SBintian Wang};
423dd90caacSRob Herring
424dd90caacSRob Herring&uart2 {
425dd90caacSRob Herring	label = "LS-UART0";
426dd90caacSRob Herring};
427dd90caacSRob Herring&uart3 {
428dd90caacSRob Herring	label = "LS-UART1";
429dd90caacSRob Herring};
4303814b61bSXinliang Liu
4313814b61bSXinliang Liu&ade {
4323814b61bSXinliang Liu	status = "ok";
4333814b61bSXinliang Liu};
4343814b61bSXinliang Liu
4353814b61bSXinliang Liu&dsi {
4363814b61bSXinliang Liu	status = "ok";
437b77c23a0SXinliang Liu
438b77c23a0SXinliang Liu	ports {
439b77c23a0SXinliang Liu		/* 1 for output port */
440b77c23a0SXinliang Liu		port@1 {
441b77c23a0SXinliang Liu			reg = <1>;
442b77c23a0SXinliang Liu
443b77c23a0SXinliang Liu			dsi_out0: endpoint@0 {
444b77c23a0SXinliang Liu				remote-endpoint = <&adv7533_in>;
445b77c23a0SXinliang Liu			};
446b77c23a0SXinliang Liu		};
447b77c23a0SXinliang Liu	};
448b77c23a0SXinliang Liu};
449b77c23a0SXinliang Liu
450b77c23a0SXinliang Liu&i2c2 {
451b77c23a0SXinliang Liu	#address-cells = <1>;
452b77c23a0SXinliang Liu	#size-cells = <0>;
453b77c23a0SXinliang Liu	status = "ok";
454b77c23a0SXinliang Liu
455b77c23a0SXinliang Liu	adv7533: adv7533@39 {
456b77c23a0SXinliang Liu		compatible = "adi,adv7533";
457b77c23a0SXinliang Liu		reg = <0x39>;
458b77c23a0SXinliang Liu		interrupt-parent = <&gpio1>;
459b77c23a0SXinliang Liu		interrupts = <1 2>;
460b77c23a0SXinliang Liu		pd-gpio = <&gpio0 4 0>;
461b77c23a0SXinliang Liu		adi,dsi-lanes = <4>;
462b77c23a0SXinliang Liu
463b77c23a0SXinliang Liu		port {
464b77c23a0SXinliang Liu			adv7533_in: endpoint {
465b77c23a0SXinliang Liu				remote-endpoint = <&dsi_out0>;
466b77c23a0SXinliang Liu			};
467b77c23a0SXinliang Liu		};
468b77c23a0SXinliang Liu	};
4693814b61bSXinliang Liu};
470