12f20182eSJiancheng Xue/* 22f20182eSJiancheng Xue * DTS File for HiSilicon Poplar Development Board 32f20182eSJiancheng Xue * 42f20182eSJiancheng Xue * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. 52f20182eSJiancheng Xue * 62f20182eSJiancheng Xue * Released under the GPLv2 only. 72f20182eSJiancheng Xue * SPDX-License-Identifier: GPL-2.0 82f20182eSJiancheng Xue */ 92f20182eSJiancheng Xue 102f20182eSJiancheng Xue/dts-v1/; 112f20182eSJiancheng Xue 122f20182eSJiancheng Xue#include <dt-bindings/gpio/gpio.h> 132f20182eSJiancheng Xue#include "hi3798cv200.dtsi" 14bb61c536SShawn Guo#include "poplar-pinctrl.dtsi" 152f20182eSJiancheng Xue 162f20182eSJiancheng Xue/ { 172f20182eSJiancheng Xue model = "HiSilicon Poplar Development Board"; 182f20182eSJiancheng Xue compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200"; 192f20182eSJiancheng Xue 202f20182eSJiancheng Xue aliases { 212f20182eSJiancheng Xue serial0 = &uart0; 222f20182eSJiancheng Xue serial2 = &uart2; 232f20182eSJiancheng Xue }; 242f20182eSJiancheng Xue 252f20182eSJiancheng Xue chosen { 262f20182eSJiancheng Xue stdout-path = "serial0:115200n8"; 272f20182eSJiancheng Xue }; 282f20182eSJiancheng Xue 292f20182eSJiancheng Xue memory@0 { 302f20182eSJiancheng Xue device_type = "memory"; 312f20182eSJiancheng Xue reg = <0x0 0x0 0x0 0x80000000>; 322f20182eSJiancheng Xue }; 332f20182eSJiancheng Xue 342f20182eSJiancheng Xue leds { 352f20182eSJiancheng Xue compatible = "gpio-leds"; 362f20182eSJiancheng Xue 372f20182eSJiancheng Xue user-led0 { 384c7c3110SManivannan Sadhasivam label = "green:user1"; 392f20182eSJiancheng Xue gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; 402f20182eSJiancheng Xue linux,default-trigger = "heartbeat"; 412f20182eSJiancheng Xue default-state = "off"; 422f20182eSJiancheng Xue }; 432f20182eSJiancheng Xue 442f20182eSJiancheng Xue user-led1 { 454c7c3110SManivannan Sadhasivam label = "green:user2"; 462f20182eSJiancheng Xue gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 472f20182eSJiancheng Xue linux,default-trigger = "mmc0"; 482f20182eSJiancheng Xue default-state = "off"; 492f20182eSJiancheng Xue }; 502f20182eSJiancheng Xue 512f20182eSJiancheng Xue user-led2 { 524c7c3110SManivannan Sadhasivam label = "green:user3"; 532f20182eSJiancheng Xue gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; 544c7c3110SManivannan Sadhasivam linux,default-trigger = "mmc1"; 552f20182eSJiancheng Xue default-state = "off"; 562f20182eSJiancheng Xue }; 572f20182eSJiancheng Xue 582f20182eSJiancheng Xue user-led3 { 594c7c3110SManivannan Sadhasivam label = "green:user4"; 602f20182eSJiancheng Xue gpios = <&gpio10 6 GPIO_ACTIVE_LOW>; 614c7c3110SManivannan Sadhasivam linux,default-trigger = "none"; 624c7c3110SManivannan Sadhasivam panic-indicator; 632f20182eSJiancheng Xue default-state = "off"; 642f20182eSJiancheng Xue }; 652f20182eSJiancheng Xue }; 6632fa0176SShawn Guo 6732fa0176SShawn Guo reg_pcie: regulator-pcie { 6832fa0176SShawn Guo compatible = "regulator-fixed"; 6932fa0176SShawn Guo regulator-name = "3V3_PCIE0"; 7032fa0176SShawn Guo regulator-min-microvolt = <3300000>; 7132fa0176SShawn Guo regulator-max-microvolt = <3300000>; 7232fa0176SShawn Guo gpio = <&gpio6 7 0>; 7332fa0176SShawn Guo enable-active-high; 7432fa0176SShawn Guo }; 752f20182eSJiancheng Xue}; 762f20182eSJiancheng Xue 77e83474c6SShawn Guo&ehci { 78e83474c6SShawn Guo status = "okay"; 79e83474c6SShawn Guo}; 80e83474c6SShawn Guo 81bb61c536SShawn Guo&emmc { 82bb61c536SShawn Guo pinctrl-names = "default"; 83bb61c536SShawn Guo pinctrl-0 = <&emmc_pins_1 &emmc_pins_2 84bb61c536SShawn Guo &emmc_pins_3 &emmc_pins_4>; 85bb61c536SShawn Guo fifo-depth = <256>; 86bb61c536SShawn Guo clock-frequency = <200000000>; 87bb61c536SShawn Guo cap-mmc-highspeed; 88bb61c536SShawn Guo mmc-ddr-1_8v; 89bb61c536SShawn Guo mmc-hs200-1_8v; 90bb61c536SShawn Guo non-removable; 91bb61c536SShawn Guo bus-width = <8>; 92bb61c536SShawn Guo status = "okay"; 93bb61c536SShawn Guo}; 94bb61c536SShawn Guo 952f20182eSJiancheng Xue&gmac1 { 962f20182eSJiancheng Xue status = "okay"; 972f20182eSJiancheng Xue #address-cells = <1>; 982f20182eSJiancheng Xue #size-cells = <0>; 992f20182eSJiancheng Xue phy-handle = <ð_phy1>; 1002f20182eSJiancheng Xue phy-mode = "rgmii"; 1012f20182eSJiancheng Xue hisilicon,phy-reset-delays-us = <10000 10000 30000>; 1022f20182eSJiancheng Xue 1032f20182eSJiancheng Xue eth_phy1: phy@3 { 1042f20182eSJiancheng Xue reg = <3>; 1052f20182eSJiancheng Xue }; 1062f20182eSJiancheng Xue}; 1072f20182eSJiancheng Xue 1082f20182eSJiancheng Xue&gpio1 { 1092f20182eSJiancheng Xue status = "okay"; 110a1fb73d7SLinus Walleij gpio-line-names = "GPIO-E", "", 1112f20182eSJiancheng Xue "", "", 112a1fb73d7SLinus Walleij "", "GPIO-F", 113a1fb73d7SLinus Walleij "", "GPIO-J"; 1142f20182eSJiancheng Xue}; 1152f20182eSJiancheng Xue 1162f20182eSJiancheng Xue&gpio2 { 1172f20182eSJiancheng Xue status = "okay"; 118a1fb73d7SLinus Walleij gpio-line-names = "GPIO-H", "GPIO-I", 119a1fb73d7SLinus Walleij "GPIO-L", "GPIO-G", 120a1fb73d7SLinus Walleij "GPIO-K", "", 1212f20182eSJiancheng Xue "", ""; 1222f20182eSJiancheng Xue}; 1232f20182eSJiancheng Xue 1242f20182eSJiancheng Xue&gpio3 { 1252f20182eSJiancheng Xue status = "okay"; 1262f20182eSJiancheng Xue gpio-line-names = "", "", 1272f20182eSJiancheng Xue "", "", 128a1fb73d7SLinus Walleij "GPIO-C", "", 129a1fb73d7SLinus Walleij "", "GPIO-B"; 1302f20182eSJiancheng Xue}; 1312f20182eSJiancheng Xue 1322f20182eSJiancheng Xue&gpio4 { 1332f20182eSJiancheng Xue status = "okay"; 1342f20182eSJiancheng Xue gpio-line-names = "", "", 1352f20182eSJiancheng Xue "", "", 136a1fb73d7SLinus Walleij "", "GPIO-D", 1372f20182eSJiancheng Xue "", ""; 1382f20182eSJiancheng Xue}; 1392f20182eSJiancheng Xue 1402f20182eSJiancheng Xue&gpio5 { 1412f20182eSJiancheng Xue status = "okay"; 1422f20182eSJiancheng Xue gpio-line-names = "", "USER-LED-1", 1432f20182eSJiancheng Xue "USER-LED-2", "", 144a1fb73d7SLinus Walleij "", "GPIO-A", 1452f20182eSJiancheng Xue "", ""; 1462f20182eSJiancheng Xue}; 1472f20182eSJiancheng Xue 1482f20182eSJiancheng Xue&gpio6 { 1492f20182eSJiancheng Xue status = "okay"; 1502f20182eSJiancheng Xue gpio-line-names = "", "", 1512f20182eSJiancheng Xue "", "USER-LED-0", 1522f20182eSJiancheng Xue "", "", 1532f20182eSJiancheng Xue "", ""; 1542f20182eSJiancheng Xue}; 1552f20182eSJiancheng Xue 1562f20182eSJiancheng Xue&gpio10 { 1572f20182eSJiancheng Xue status = "okay"; 1582f20182eSJiancheng Xue gpio-line-names = "", "", 1592f20182eSJiancheng Xue "", "", 1602f20182eSJiancheng Xue "", "", 1612f20182eSJiancheng Xue "USER-LED-3", ""; 1622f20182eSJiancheng Xue}; 1632f20182eSJiancheng Xue 1642f20182eSJiancheng Xue&i2c0 { 1652f20182eSJiancheng Xue status = "okay"; 1662f20182eSJiancheng Xue label = "LS-I2C0"; 1672f20182eSJiancheng Xue}; 1682f20182eSJiancheng Xue 1692f20182eSJiancheng Xue&i2c2 { 1702f20182eSJiancheng Xue status = "okay"; 1712f20182eSJiancheng Xue label = "LS-I2C1"; 1722f20182eSJiancheng Xue}; 1732f20182eSJiancheng Xue 1742f20182eSJiancheng Xue&ir { 1752f20182eSJiancheng Xue status = "okay"; 1762f20182eSJiancheng Xue}; 1772f20182eSJiancheng Xue 178e83474c6SShawn Guo&ohci { 179e83474c6SShawn Guo status = "okay"; 180e83474c6SShawn Guo}; 181e83474c6SShawn Guo 18232fa0176SShawn Guo&pcie { 18332fa0176SShawn Guo reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; 18432fa0176SShawn Guo vpcie-supply = <®_pcie>; 18532fa0176SShawn Guo status = "okay"; 18632fa0176SShawn Guo}; 18732fa0176SShawn Guo 1884dcf0f9aSShawn Guo&sd0 { 1894dcf0f9aSShawn Guo bus-width = <4>; 1904dcf0f9aSShawn Guo cap-sd-highspeed; 1914dcf0f9aSShawn Guo status = "okay"; 1924dcf0f9aSShawn Guo}; 1934dcf0f9aSShawn Guo 1942f20182eSJiancheng Xue&spi0 { 1952f20182eSJiancheng Xue status = "okay"; 1962f20182eSJiancheng Xue label = "LS-SPI0"; 1972f20182eSJiancheng Xue}; 1982f20182eSJiancheng Xue 1992f20182eSJiancheng Xue&uart0 { 2002f20182eSJiancheng Xue status = "okay"; 2012f20182eSJiancheng Xue}; 2022f20182eSJiancheng Xue 2032f20182eSJiancheng Xue&uart2 { 2042f20182eSJiancheng Xue status = "okay"; 2052f20182eSJiancheng Xue label = "LS-UART0"; 2062f20182eSJiancheng Xue}; 2072f20182eSJiancheng Xue/* No optional LS-UART1 on Low Speed Expansion Connector. */ 208