1e8f7a387SPhilippe Schenker// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
22eba2438SPhilippe Schenker/*
32eba2438SPhilippe Schenker * Copyright 2019 Toradex
42eba2438SPhilippe Schenker */
52eba2438SPhilippe Schenker
62eba2438SPhilippe Schenker/ {
72eba2438SPhilippe Schenker	chosen {
82eba2438SPhilippe Schenker		stdout-path = &lpuart3;
92eba2438SPhilippe Schenker	};
102eba2438SPhilippe Schenker
11cc900d0fSPhilippe Schenker	colibri_gpio_keys: gpio-keys {
12cc900d0fSPhilippe Schenker		compatible = "gpio-keys";
13cc900d0fSPhilippe Schenker		pinctrl-names = "default";
14cc900d0fSPhilippe Schenker		pinctrl-0 = <&pinctrl_gpiokeys>;
15cc900d0fSPhilippe Schenker		status = "disabled";
16cc900d0fSPhilippe Schenker
17cc900d0fSPhilippe Schenker		key-wakeup {
18cc900d0fSPhilippe Schenker			debounce-interval = <10>;
19cc900d0fSPhilippe Schenker			gpios = <&lsio_gpio3 10 GPIO_ACTIVE_HIGH>;
20cc900d0fSPhilippe Schenker			label = "Wake-Up";
21cc900d0fSPhilippe Schenker			linux,code = <KEY_WAKEUP>;
22cc900d0fSPhilippe Schenker			wakeup-source;
23cc900d0fSPhilippe Schenker		};
24cc900d0fSPhilippe Schenker	};
25cc900d0fSPhilippe Schenker
262eba2438SPhilippe Schenker	reg_module_3v3: regulator-module-3v3 {
272eba2438SPhilippe Schenker		compatible = "regulator-fixed";
282eba2438SPhilippe Schenker		regulator-name = "+V3.3";
292eba2438SPhilippe Schenker		regulator-min-microvolt = <3300000>;
302eba2438SPhilippe Schenker		regulator-max-microvolt = <3300000>;
312eba2438SPhilippe Schenker	};
322eba2438SPhilippe Schenker};
332eba2438SPhilippe Schenker
34*f018dfb3SPhilippe Schenker/* TODO Analogue Inputs */
35*f018dfb3SPhilippe Schenker
36*f018dfb3SPhilippe Schenker/* TODO Cooling maps for DX */
37*f018dfb3SPhilippe Schenker
38e2c7fa72SPhilippe Schenker&cpu_alert0 {
39e2c7fa72SPhilippe Schenker	hysteresis = <2000>;
40e2c7fa72SPhilippe Schenker	temperature = <90000>;
41e2c7fa72SPhilippe Schenker	type = "passive";
42e2c7fa72SPhilippe Schenker};
43e2c7fa72SPhilippe Schenker
44e2c7fa72SPhilippe Schenker&cpu_crit0 {
45e2c7fa72SPhilippe Schenker	hysteresis = <2000>;
46e2c7fa72SPhilippe Schenker	temperature = <105000>;
47e2c7fa72SPhilippe Schenker	type = "critical";
48e2c7fa72SPhilippe Schenker};
49e2c7fa72SPhilippe Schenker
50*f018dfb3SPhilippe Schenker/* TODO flexcan1 - 3 */
51*f018dfb3SPhilippe Schenker
52*f018dfb3SPhilippe Schenker/* TODO GPU */
53*f018dfb3SPhilippe Schenker
542eba2438SPhilippe Schenker/* On-module I2C */
552eba2438SPhilippe Schenker&i2c0 {
562eba2438SPhilippe Schenker	#address-cells = <1>;
572eba2438SPhilippe Schenker	#size-cells = <0>;
582eba2438SPhilippe Schenker	clock-frequency = <100000>;
592eba2438SPhilippe Schenker	pinctrl-names = "default";
602eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
612eba2438SPhilippe Schenker	status = "okay";
622eba2438SPhilippe Schenker
632eba2438SPhilippe Schenker	/* Touch controller */
642eba2438SPhilippe Schenker	touchscreen@2c {
652eba2438SPhilippe Schenker		compatible = "adi,ad7879-1";
662eba2438SPhilippe Schenker		pinctrl-names = "default";
672eba2438SPhilippe Schenker		pinctrl-0 = <&pinctrl_ad7879_int>;
682eba2438SPhilippe Schenker		reg = <0x2c>;
692eba2438SPhilippe Schenker		interrupt-parent = <&lsio_gpio3>;
702eba2438SPhilippe Schenker		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
712eba2438SPhilippe Schenker		touchscreen-max-pressure = <4096>;
722eba2438SPhilippe Schenker		adi,resistance-plate-x = <120>;
732eba2438SPhilippe Schenker		adi,first-conversion-delay = /bits/ 8 <3>;
742eba2438SPhilippe Schenker		adi,acquisition-time = /bits/ 8 <1>;
752eba2438SPhilippe Schenker		adi,median-filter-size = /bits/ 8 <2>;
762eba2438SPhilippe Schenker		adi,averaging = /bits/ 8 <1>;
772eba2438SPhilippe Schenker		adi,conversion-interval = /bits/ 8 <255>;
78851884b2SPhilippe Schenker		status = "disabled";
792eba2438SPhilippe Schenker	};
802eba2438SPhilippe Schenker};
812eba2438SPhilippe Schenker
82*f018dfb3SPhilippe Schenker/* TODO i2c lvds0 accessible on FFC (X2) */
83*f018dfb3SPhilippe Schenker
84*f018dfb3SPhilippe Schenker/* TODO i2c lvds1 accessible on FFC (X3) */
85*f018dfb3SPhilippe Schenker
862eba2438SPhilippe Schenker/* Colibri I2C */
872eba2438SPhilippe Schenker&i2c1 {
882eba2438SPhilippe Schenker	#address-cells = <1>;
892eba2438SPhilippe Schenker	#size-cells = <0>;
902eba2438SPhilippe Schenker	clock-frequency = <100000>;
912eba2438SPhilippe Schenker	pinctrl-names = "default";
922eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c1>;
932eba2438SPhilippe Schenker};
942eba2438SPhilippe Schenker
95ee9936d6SPhilippe Schenker&jpegdec {
96ee9936d6SPhilippe Schenker	status = "okay";
97ee9936d6SPhilippe Schenker};
98ee9936d6SPhilippe Schenker
99ee9936d6SPhilippe Schenker&jpegenc {
100ee9936d6SPhilippe Schenker	status = "okay";
101ee9936d6SPhilippe Schenker};
102ee9936d6SPhilippe Schenker
103*f018dfb3SPhilippe Schenker/* TODO Parallel RRB */
104*f018dfb3SPhilippe Schenker
1052eba2438SPhilippe Schenker/* Colibri UART_B */
1062eba2438SPhilippe Schenker&lpuart0 {
1072eba2438SPhilippe Schenker	pinctrl-names = "default";
1082eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart0>;
1092eba2438SPhilippe Schenker};
1102eba2438SPhilippe Schenker
1112eba2438SPhilippe Schenker/* Colibri UART_C */
1122eba2438SPhilippe Schenker&lpuart2 {
1132eba2438SPhilippe Schenker	pinctrl-names = "default";
1142eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart2>;
1152eba2438SPhilippe Schenker};
1162eba2438SPhilippe Schenker
1172eba2438SPhilippe Schenker/* Colibri UART_A */
1182eba2438SPhilippe Schenker&lpuart3 {
1192eba2438SPhilippe Schenker	pinctrl-names = "default";
1202eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
1212eba2438SPhilippe Schenker};
1222eba2438SPhilippe Schenker
1232eba2438SPhilippe Schenker/* Colibri FastEthernet */
1242eba2438SPhilippe Schenker&fec1 {
1252eba2438SPhilippe Schenker	pinctrl-names = "default", "sleep";
1262eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_fec1>;
1272eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_fec1_sleep>;
1282eba2438SPhilippe Schenker	phy-mode = "rmii";
1292eba2438SPhilippe Schenker	phy-handle = <&ethphy0>;
1302eba2438SPhilippe Schenker	fsl,magic-packet;
1312eba2438SPhilippe Schenker
1322eba2438SPhilippe Schenker	mdio {
1332eba2438SPhilippe Schenker		#address-cells = <1>;
1342eba2438SPhilippe Schenker		#size-cells = <0>;
1352eba2438SPhilippe Schenker
1362eba2438SPhilippe Schenker		ethphy0: ethernet-phy@2 {
1372eba2438SPhilippe Schenker			compatible = "ethernet-phy-ieee802.3-c22";
1382eba2438SPhilippe Schenker			max-speed = <100>;
1392eba2438SPhilippe Schenker			reg = <2>;
1402eba2438SPhilippe Schenker		};
1412eba2438SPhilippe Schenker	};
1422eba2438SPhilippe Schenker};
1432eba2438SPhilippe Schenker
144a537c961SPhilippe Schenker/* Colibri SPI */
145a537c961SPhilippe Schenker&lpspi2 {
146a537c961SPhilippe Schenker	pinctrl-names = "default";
147a537c961SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpspi2>;
148a537c961SPhilippe Schenker	cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
149a537c961SPhilippe Schenker};
150a537c961SPhilippe Schenker
15155164802SPhilippe Schenker&lsio_gpio0 {
15255164802SPhilippe Schenker	gpio-line-names = "",
15355164802SPhilippe Schenker			  "SODIMM_70",
15455164802SPhilippe Schenker			  "SODIMM_60",
15555164802SPhilippe Schenker			  "SODIMM_58",
15655164802SPhilippe Schenker			  "SODIMM_78",
15755164802SPhilippe Schenker			  "SODIMM_72",
15855164802SPhilippe Schenker			  "SODIMM_80",
15955164802SPhilippe Schenker			  "SODIMM_46",
16055164802SPhilippe Schenker			  "SODIMM_62",
16155164802SPhilippe Schenker			  "SODIMM_48",
16255164802SPhilippe Schenker			  "SODIMM_74",
16355164802SPhilippe Schenker			  "SODIMM_50",
16455164802SPhilippe Schenker			  "SODIMM_52",
16555164802SPhilippe Schenker			  "SODIMM_54",
16655164802SPhilippe Schenker			  "SODIMM_66",
16755164802SPhilippe Schenker			  "SODIMM_64",
16855164802SPhilippe Schenker			  "SODIMM_68",
16955164802SPhilippe Schenker			  "",
17055164802SPhilippe Schenker			  "",
17155164802SPhilippe Schenker			  "SODIMM_82",
17255164802SPhilippe Schenker			  "SODIMM_56",
17355164802SPhilippe Schenker			  "SODIMM_28",
17455164802SPhilippe Schenker			  "SODIMM_30",
17555164802SPhilippe Schenker			  "",
17655164802SPhilippe Schenker			  "SODIMM_61",
17755164802SPhilippe Schenker			  "SODIMM_103",
17855164802SPhilippe Schenker			  "",
17955164802SPhilippe Schenker			  "",
18055164802SPhilippe Schenker			  "",
18155164802SPhilippe Schenker			  "SODIMM_25",
18255164802SPhilippe Schenker			  "SODIMM_27",
18355164802SPhilippe Schenker			  "SODIMM_100";
18455164802SPhilippe Schenker};
18555164802SPhilippe Schenker
18655164802SPhilippe Schenker&lsio_gpio1 {
18755164802SPhilippe Schenker	gpio-line-names = "SODIMM_86",
18855164802SPhilippe Schenker			  "SODIMM_92",
18955164802SPhilippe Schenker			  "SODIMM_90",
19055164802SPhilippe Schenker			  "SODIMM_88",
19155164802SPhilippe Schenker			  "",
19255164802SPhilippe Schenker			  "",
19355164802SPhilippe Schenker			  "",
19455164802SPhilippe Schenker			  "SODIMM_59",
19555164802SPhilippe Schenker			  "",
19655164802SPhilippe Schenker			  "SODIMM_6",
19755164802SPhilippe Schenker			  "SODIMM_8",
19855164802SPhilippe Schenker			  "",
19955164802SPhilippe Schenker			  "",
20055164802SPhilippe Schenker			  "SODIMM_2",
20155164802SPhilippe Schenker			  "SODIMM_4",
20255164802SPhilippe Schenker			  "SODIMM_34",
20355164802SPhilippe Schenker			  "SODIMM_32",
20455164802SPhilippe Schenker			  "SODIMM_63",
20555164802SPhilippe Schenker			  "SODIMM_55",
20655164802SPhilippe Schenker			  "SODIMM_33",
20755164802SPhilippe Schenker			  "SODIMM_35",
20855164802SPhilippe Schenker			  "SODIMM_36",
20955164802SPhilippe Schenker			  "SODIMM_38",
21055164802SPhilippe Schenker			  "SODIMM_21",
21155164802SPhilippe Schenker			  "SODIMM_19",
21255164802SPhilippe Schenker			  "SODIMM_140",
21355164802SPhilippe Schenker			  "SODIMM_142",
21455164802SPhilippe Schenker			  "SODIMM_196",
21555164802SPhilippe Schenker			  "SODIMM_194",
21655164802SPhilippe Schenker			  "SODIMM_186",
21755164802SPhilippe Schenker			  "SODIMM_188",
21855164802SPhilippe Schenker			  "SODIMM_138";
21955164802SPhilippe Schenker};
22055164802SPhilippe Schenker
22155164802SPhilippe Schenker&lsio_gpio2 {
22255164802SPhilippe Schenker	gpio-line-names = "SODIMM_23",
22355164802SPhilippe Schenker			  "",
22455164802SPhilippe Schenker			  "",
22555164802SPhilippe Schenker			  "SODIMM_144";
22655164802SPhilippe Schenker};
22755164802SPhilippe Schenker
22855164802SPhilippe Schenker&lsio_gpio3 {
22955164802SPhilippe Schenker	gpio-line-names = "SODIMM_96",
23055164802SPhilippe Schenker			  "SODIMM_75",
23155164802SPhilippe Schenker			  "SODIMM_37",
23255164802SPhilippe Schenker			  "SODIMM_29",
23355164802SPhilippe Schenker			  "",
23455164802SPhilippe Schenker			  "",
23555164802SPhilippe Schenker			  "",
23655164802SPhilippe Schenker			  "",
23755164802SPhilippe Schenker			  "",
23855164802SPhilippe Schenker			  "SODIMM_43",
23955164802SPhilippe Schenker			  "SODIMM_45",
24055164802SPhilippe Schenker			  "SODIMM_69",
24155164802SPhilippe Schenker			  "SODIMM_71",
24255164802SPhilippe Schenker			  "SODIMM_73",
24355164802SPhilippe Schenker			  "SODIMM_77",
24455164802SPhilippe Schenker			  "SODIMM_89",
24555164802SPhilippe Schenker			  "SODIMM_93",
24655164802SPhilippe Schenker			  "SODIMM_95",
24755164802SPhilippe Schenker			  "SODIMM_99",
24855164802SPhilippe Schenker			  "SODIMM_105",
24955164802SPhilippe Schenker			  "SODIMM_107",
25055164802SPhilippe Schenker			  "SODIMM_98",
25155164802SPhilippe Schenker			  "SODIMM_102",
25255164802SPhilippe Schenker			  "SODIMM_104",
25355164802SPhilippe Schenker			  "SODIMM_106";
25455164802SPhilippe Schenker};
25555164802SPhilippe Schenker
25655164802SPhilippe Schenker&lsio_gpio4 {
25755164802SPhilippe Schenker	gpio-line-names = "",
25855164802SPhilippe Schenker			  "",
25955164802SPhilippe Schenker			  "",
26055164802SPhilippe Schenker			  "SODIMM_129",
26155164802SPhilippe Schenker			  "SODIMM_133",
26255164802SPhilippe Schenker			  "SODIMM_127",
26355164802SPhilippe Schenker			  "SODIMM_131",
26455164802SPhilippe Schenker			  "",
26555164802SPhilippe Schenker			  "",
26655164802SPhilippe Schenker			  "",
26755164802SPhilippe Schenker			  "",
26855164802SPhilippe Schenker			  "",
26955164802SPhilippe Schenker			  "",
27055164802SPhilippe Schenker			  "",
27155164802SPhilippe Schenker			  "",
27255164802SPhilippe Schenker			  "",
27355164802SPhilippe Schenker			  "",
27455164802SPhilippe Schenker			  "",
27555164802SPhilippe Schenker			  "",
27655164802SPhilippe Schenker			  "SODIMM_44",
27755164802SPhilippe Schenker			  "",
27855164802SPhilippe Schenker			  "SODIMM_76",
27955164802SPhilippe Schenker			  "SODIMM_31",
28055164802SPhilippe Schenker			  "SODIMM_47",
28155164802SPhilippe Schenker			  "SODIMM_190",
28255164802SPhilippe Schenker			  "SODIMM_192",
28355164802SPhilippe Schenker			  "SODIMM_49",
28455164802SPhilippe Schenker			  "SODIMM_51",
28555164802SPhilippe Schenker			  "SODIMM_53";
28655164802SPhilippe Schenker};
28755164802SPhilippe Schenker
28855164802SPhilippe Schenker&lsio_gpio5 {
28955164802SPhilippe Schenker	gpio-line-names = "",
29055164802SPhilippe Schenker			  "SODIMM_57",
29155164802SPhilippe Schenker			  "SODIMM_65",
29255164802SPhilippe Schenker			  "SODIMM_85",
29355164802SPhilippe Schenker			  "",
29455164802SPhilippe Schenker			  "",
29555164802SPhilippe Schenker			  "",
29655164802SPhilippe Schenker			  "",
29755164802SPhilippe Schenker			  "SODIMM_135",
29855164802SPhilippe Schenker			  "SODIMM_137",
29955164802SPhilippe Schenker			  "UNUSABLE_SODIMM_180",
30055164802SPhilippe Schenker			  "UNUSABLE_SODIMM_184";
30155164802SPhilippe Schenker};
30255164802SPhilippe Schenker
303e74b958cSPhilippe Schenker/* Colibri PWM_B */
304e74b958cSPhilippe Schenker&lsio_pwm0 {
305e74b958cSPhilippe Schenker	#pwm-cells = <3>;
306e74b958cSPhilippe Schenker	pinctrl-0 = <&pinctrl_pwm_b>;
307e74b958cSPhilippe Schenker	pinctrl-names = "default";
308e74b958cSPhilippe Schenker};
309e74b958cSPhilippe Schenker
310e74b958cSPhilippe Schenker/* Colibri PWM_C */
311e74b958cSPhilippe Schenker&lsio_pwm1 {
312e74b958cSPhilippe Schenker	#pwm-cells = <3>;
313e74b958cSPhilippe Schenker	pinctrl-0 = <&pinctrl_pwm_c>;
314e74b958cSPhilippe Schenker	pinctrl-names = "default";
315e74b958cSPhilippe Schenker};
316e74b958cSPhilippe Schenker
317e74b958cSPhilippe Schenker/* Colibri PWM_D */
318e74b958cSPhilippe Schenker&lsio_pwm2 {
319e74b958cSPhilippe Schenker	#pwm-cells = <3>;
320e74b958cSPhilippe Schenker	pinctrl-0 = <&pinctrl_pwm_d>;
321e74b958cSPhilippe Schenker	pinctrl-names = "default";
322e74b958cSPhilippe Schenker};
323e74b958cSPhilippe Schenker
324*f018dfb3SPhilippe Schenker/* TODO MIPI CSI */
325*f018dfb3SPhilippe Schenker
326*f018dfb3SPhilippe Schenker/* TODO MIPI DSI with DSI-to-HDMI bridge lt8912 */
327*f018dfb3SPhilippe Schenker
328*f018dfb3SPhilippe Schenker/* TODO on-module PCIe for Wi-Fi */
329*f018dfb3SPhilippe Schenker
330*f018dfb3SPhilippe Schenker/* TODO On-module i2s / Audio */
331*f018dfb3SPhilippe Schenker
3322eba2438SPhilippe Schenker/* On-module eMMC */
3332eba2438SPhilippe Schenker&usdhc1 {
3342eba2438SPhilippe Schenker	bus-width = <8>;
3352eba2438SPhilippe Schenker	non-removable;
3362eba2438SPhilippe Schenker	no-sd;
3372eba2438SPhilippe Schenker	no-sdio;
3382eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz";
3392eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc1>;
3402eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
3412eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
3422eba2438SPhilippe Schenker	status = "okay";
3432eba2438SPhilippe Schenker};
3442eba2438SPhilippe Schenker
3452eba2438SPhilippe Schenker/* Colibri SD/MMC Card */
3462eba2438SPhilippe Schenker&usdhc2 {
3472eba2438SPhilippe Schenker	bus-width = <4>;
3482eba2438SPhilippe Schenker	cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
3492eba2438SPhilippe Schenker	vmmc-supply = <&reg_module_3v3>;
3502eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
3512eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
3522eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
3532eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
3542eba2438SPhilippe Schenker	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
3552eba2438SPhilippe Schenker	disable-wp;
35609fad38eSPhilippe Schenker	no-1-8-v;
3572eba2438SPhilippe Schenker};
3582eba2438SPhilippe Schenker
359*f018dfb3SPhilippe Schenker/* TODO USB Client/Host */
360*f018dfb3SPhilippe Schenker
361*f018dfb3SPhilippe Schenker/* TODO USB Host */
362*f018dfb3SPhilippe Schenker
363*f018dfb3SPhilippe Schenker/* TODO VPU Encoder/Decoder */
364*f018dfb3SPhilippe Schenker
3652eba2438SPhilippe Schenker&iomuxc {
3662eba2438SPhilippe Schenker	pinctrl-names = "default";
3674d2adf73SPhilippe Schenker	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
3687171ec29SPhilippe Schenker		    <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
3692eba2438SPhilippe Schenker
3702eba2438SPhilippe Schenker	/* On-module touch pen-down interrupt */
3712eba2438SPhilippe Schenker	pinctrl_ad7879_int: ad7879intgrp {
3727efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05	0x21>;
3732eba2438SPhilippe Schenker	};
3742eba2438SPhilippe Schenker
3752eba2438SPhilippe Schenker	/* Colibri Analogue Inputs */
3762eba2438SPhilippe Schenker	pinctrl_adc0: adc0grp {
3777efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ADC_IN0_ADMA_ADC_IN0			0x60>,		/* SODIMM   8 */
3787efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN1_ADMA_ADC_IN1			0x60>,		/* SODIMM   6 */
3797efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN4_ADMA_ADC_IN4			0x60>,		/* SODIMM   4 */
3807efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN5_ADMA_ADC_IN5			0x60>;		/* SODIMM   2 */
3812eba2438SPhilippe Schenker	};
3822eba2438SPhilippe Schenker
3837ece3cbcSPhilippe Schenker	/* Atmel MXT touchsceen + Capacitive Touch Adapter */
3847ece3cbcSPhilippe Schenker	/* NOTE: This pingroup conflicts with pingroups
3857ece3cbcSPhilippe Schenker	 * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them
3867ece3cbcSPhilippe Schenker	 * simultaneously.
3877ece3cbcSPhilippe Schenker	 */
3887ece3cbcSPhilippe Schenker	pinctrl_atmel_adap: atmeladaptergrp {
3897ece3cbcSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_RX_LSIO_GPIO0_IO22			0x21>,		/* SODIMM  30 */
3907ece3cbcSPhilippe Schenker			   <IMX8QXP_UART1_TX_LSIO_GPIO0_IO21			0x4000021>;	/* SODIMM  28 */
3917ece3cbcSPhilippe Schenker	};
3927ece3cbcSPhilippe Schenker
3937ece3cbcSPhilippe Schenker	/* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
3947ece3cbcSPhilippe Schenker	pinctrl_atmel_conn: atmelconnectorgrp {
3957ece3cbcSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20		0x4000021>,	/* SODIMM 107 */
3967ece3cbcSPhilippe Schenker			   <IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24		0x21>;		/* SODIMM 106 */
3977ece3cbcSPhilippe Schenker	};
3987ece3cbcSPhilippe Schenker
3992eba2438SPhilippe Schenker	pinctrl_can_int: canintgrp {
4007efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13			0x40>;		/* SODIMM  73 */
4012eba2438SPhilippe Schenker	};
4022eba2438SPhilippe Schenker
4032eba2438SPhilippe Schenker	pinctrl_csi_ctl: csictlgrp {
4047efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14		0x20>,		/* SODIMM  77 */
4057efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15		0x20>;		/* SODIMM  89 */
4062eba2438SPhilippe Schenker	};
4072eba2438SPhilippe Schenker
4085e634a90SPhilippe Schenker	pinctrl_csi_mclk: csimclkgrp {
4095e634a90SPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK				0xC0000041>;	/* SODIMM  75 / X3-12 */
4105e634a90SPhilippe Schenker	};
4115e634a90SPhilippe Schenker
4122eba2438SPhilippe Schenker	pinctrl_ext_io0: extio0grp {
4137efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08		0x06000040>;	/* SODIMM 135 */
4142eba2438SPhilippe Schenker	};
4152eba2438SPhilippe Schenker
4162eba2438SPhilippe Schenker	/* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
4172eba2438SPhilippe Schenker	pinctrl_fec1: fec1grp {
4187efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020>,
4197efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020>,
4207efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x61>,
4217efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT	0x06000061>,
4227efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x61>,
4237efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x61>,
4247efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x61>,
4257efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x61>,
4267efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x61>,
4277efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER	0x61>;
4282eba2438SPhilippe Schenker	};
4292eba2438SPhilippe Schenker
4302eba2438SPhilippe Schenker	pinctrl_fec1_sleep: fec1slpgrp {
4317efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11			0x06000041>,
4327efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10			0x06000041>,
4337efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30		0x41>,
4347efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29		0x41>,
4357efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31		0x41>,
4367efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00		0x41>,
4377efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04		0x41>,
4387efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05		0x41>,
4397efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06		0x41>,
4407efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07		0x41>;
4412eba2438SPhilippe Schenker	};
4422eba2438SPhilippe Schenker
4432eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_B RTS/CTS */
4442eba2438SPhilippe Schenker	pinctrl_flexcan1: flexcan0grp {
4457efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX		0x21>,		/* SODIMM  32 */
4467efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX		0x21>;		/* SODIMM  34 */
4472eba2438SPhilippe Schenker	};
4482eba2438SPhilippe Schenker
4492eba2438SPhilippe Schenker	/* Colibri optional CAN on PS2 */
4502eba2438SPhilippe Schenker	pinctrl_flexcan2: flexcan1grp {
4517efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX		0x21>,		/* SODIMM  55 */
4527efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX		0x21>;		/* SODIMM  63 */
4532eba2438SPhilippe Schenker	};
4542eba2438SPhilippe Schenker
4552eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_A TXD/RXD */
4562eba2438SPhilippe Schenker	pinctrl_flexcan3: flexcan2grp {
4577efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX		0x21>,		/* SODIMM  35 */
4587efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX		0x21>;		/* SODIMM  33 */
4592eba2438SPhilippe Schenker	};
4602eba2438SPhilippe Schenker
4612eba2438SPhilippe Schenker	/* Colibri LCD Back-Light GPIO */
4622eba2438SPhilippe Schenker	pinctrl_gpio_bl_on: gpioblongrp {
4637efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12		0x60>;		/* SODIMM  71 */
4642eba2438SPhilippe Schenker	};
4652eba2438SPhilippe Schenker
4669c279d21SPhilippe Schenker	/* HDMI Hot Plug Detect on FFC (X2) */
4679c279d21SPhilippe Schenker	pinctrl_gpio_hpd: gpiohpdgrp {
4689c279d21SPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31		0x20>;		/* SODIMM 138 */
4699c279d21SPhilippe Schenker	};
4709c279d21SPhilippe Schenker
4712eba2438SPhilippe Schenker	pinctrl_gpiokeys: gpiokeysgrp {
4727efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10		0x06700041>;	/* SODIMM  45 */
4732eba2438SPhilippe Schenker	};
4742eba2438SPhilippe Schenker
4752eba2438SPhilippe Schenker	pinctrl_hog0: hog0grp {
4767171ec29SPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D07_CI_PI_D09				0x61>,		/* SODIMM  65 */
4777efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11		0x20>,		/* SODIMM  69 */
4787efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26			0x20>,		/* SODIMM  79 */
4797efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D02_CI_PI_D04				0x61>,		/* SODIMM  79 */
4807efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03		0x06000020>,	/* SODIMM  85 */
4817efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D06_CI_PI_D08				0x61>,		/* SODIMM  85 */
4827efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17			0x20>,		/* SODIMM  95 */
4837efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27			0x20>,		/* SODIMM  97 */
4847efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D03_CI_PI_D05				0x61>,		/* SODIMM  97 */
4857efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18		0x20>,		/* SODIMM  99 */
4867efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28			0x20>,		/* SODIMM 101 */
4877efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D00_CI_PI_D02				0x61>,		/* SODIMM 101 */
4887efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25			0x20>,		/* SODIMM 103 */
4897efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D01_CI_PI_D03				0x61>,		/* SODIMM 103 */
4907efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19		0x20>,		/* SODIMM 105 */
4917efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05			0x20>,		/* SODIMM 127 */
4927efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06			0x20>,		/* SODIMM 131 */
4937efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04			0x20>,		/* SODIMM 133 */
4947efa409eSPhilippe Schenker			   <IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00			0x20>,		/* SODIMM  96 */
4957efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21		0x20>,		/* SODIMM  98 */
4967efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31			0x20>,		/* SODIMM 100 */
4977efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22			0x20>,		/* SODIMM 102 */
4987ece3cbcSPhilippe Schenker			   <IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23		0x20>;		/* SODIMM 104 */
4992eba2438SPhilippe Schenker	};
5002eba2438SPhilippe Schenker
5012eba2438SPhilippe Schenker	pinctrl_hog1: hog1grp {
5027efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>,		/* SODIMM  75 */
5037efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
5042eba2438SPhilippe Schenker	};
5052eba2438SPhilippe Schenker
5064d2adf73SPhilippe Schenker	pinctrl_hog2: hog2grp {
5074d2adf73SPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>;		/* SODIMM  75 */
5084d2adf73SPhilippe Schenker	};
5094d2adf73SPhilippe Schenker
5102eba2438SPhilippe Schenker	/*
5112eba2438SPhilippe Schenker	 * This pin is used in the SCFW as a UART. Using it from
5122eba2438SPhilippe Schenker	 * Linux would require rewritting the SCFW board file.
5132eba2438SPhilippe Schenker	 */
5142eba2438SPhilippe Schenker	pinctrl_hog_scfw: hogscfwgrp {
5157efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03		0x20>;		/* SODIMM 144 */
5162eba2438SPhilippe Schenker	};
5172eba2438SPhilippe Schenker
5182eba2438SPhilippe Schenker	/* On Module I2C */
5192eba2438SPhilippe Schenker	pinctrl_i2c0: i2c0grp {
5207efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL		0x06000021>,
5217efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA		0x06000021>;
5222eba2438SPhilippe Schenker	};
5232eba2438SPhilippe Schenker
5242eba2438SPhilippe Schenker	/* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
5252eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp {
5267efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL	0xc6000020>,	/* SODIMM 140 */
5277efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA	0xc6000020>;	/* SODIMM 142 */
5282eba2438SPhilippe Schenker	};
5292eba2438SPhilippe Schenker
5302eba2438SPhilippe Schenker	/* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
5312eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp {
5327efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL	0xc6000020>,	/* SODIMM 186 */
5337efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA	0xc6000020>;	/* SODIMM 188 */
5342eba2438SPhilippe Schenker	};
5352eba2438SPhilippe Schenker
5362eba2438SPhilippe Schenker	/* Colibri I2C */
5372eba2438SPhilippe Schenker	pinctrl_i2c1: i2c1grp {
5387efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL		0x06000021>,	/* SODIMM 196 */
5397efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA		0x06000021>;	/* SODIMM 194 */
5402eba2438SPhilippe Schenker	};
5412eba2438SPhilippe Schenker
5422eba2438SPhilippe Schenker	/* Colibri Parallel RGB LCD Interface */
5432eba2438SPhilippe Schenker	pinctrl_lcdif: lcdifgrp {
5447efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK			0x60>,		/* SODIMM  56 */
5457efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC			0x60>,		/* SODIMM  68 */
5467efa409eSPhilippe Schenker			   <IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC			0x60>,		/* SODIMM  82 */
547bd74f83dSPhilippe Schenker			   <IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN			0x40>,		/* SODIMM  44 */
548bd74f83dSPhilippe Schenker			   <IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19		0x40>,		/* SODIMM  44 */
5497efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00			0x60>,		/* SODIMM  76 */
5507efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21			0x60>,		/* SODIMM  76 */
5517efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01			0x60>,		/* SODIMM  70 */
5527efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02			0x60>,		/* SODIMM  60 */
5537efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03			0x60>,		/* SODIMM  58 */
5547efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04			0x60>,		/* SODIMM  78 */
5557efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05			0x60>,		/* SODIMM  72 */
5567efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06		0x60>,		/* SODIMM  80 */
5577efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07		0x60>,		/* SODIMM  46 */
5587efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08		0x60>,		/* SODIMM  62 */
5597efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09		0x60>,		/* SODIMM  48 */
5607efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10			0x60>,		/* SODIMM  74 */
5617efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11			0x60>,		/* SODIMM  50 */
5627efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12		0x60>,		/* SODIMM  52 */
5637efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13			0x60>,		/* SODIMM  54 */
5647efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14			0x60>,		/* SODIMM  66 */
5657efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15			0x60>,		/* SODIMM  64 */
5667efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16			0x60>,		/* SODIMM  57 */
5677efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01		0x60>,		/* SODIMM  57 */
5687efa409eSPhilippe Schenker			   <IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17			0x60>;		/* SODIMM  61 */
5692eba2438SPhilippe Schenker	};
5702eba2438SPhilippe Schenker
5712eba2438SPhilippe Schenker	/* Colibri SPI */
5722eba2438SPhilippe Schenker	pinctrl_lpspi2: lpspi2grp {
5737efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00			0x21>,		/* SODIMM  86 */
5747efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO			0x06000040>,	/* SODIMM  92 */
5757efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI			0x06000040>,	/* SODIMM  90 */
5767efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK			0x06000040>;	/* SODIMM  88 */
5772eba2438SPhilippe Schenker	};
5782eba2438SPhilippe Schenker
5797171ec29SPhilippe Schenker	pinctrl_lpspi2_cs2: lpspi2cs2grp {
5807171ec29SPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02		0x21>;		/* SODIMM  65 */
5817171ec29SPhilippe Schenker	};
5827171ec29SPhilippe Schenker
5832eba2438SPhilippe Schenker	/* Colibri UART_B */
5842eba2438SPhilippe Schenker	pinctrl_lpuart0: lpuart0grp {
5857efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART0_RX_ADMA_UART0_RX			0x06000020>,	/* SODIMM  36 */
5867efa409eSPhilippe Schenker			   <IMX8QXP_UART0_TX_ADMA_UART0_TX			0x06000020>,	/* SODIMM  38 */
5877efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B		0x06000020>,	/* SODIMM  34 */
5887efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B		0x06000020>;	/* SODIMM  32 */
5892eba2438SPhilippe Schenker	};
5902eba2438SPhilippe Schenker
5912eba2438SPhilippe Schenker	/* Colibri UART_C */
5922eba2438SPhilippe Schenker	pinctrl_lpuart2: lpuart2grp {
5937efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART2_RX_ADMA_UART2_RX			0x06000020>,	/* SODIMM  19 */
5947efa409eSPhilippe Schenker			   <IMX8QXP_UART2_TX_ADMA_UART2_TX			0x06000020>;	/* SODIMM  21 */
5952eba2438SPhilippe Schenker	};
5962eba2438SPhilippe Schenker
5972eba2438SPhilippe Schenker	/* Colibri UART_A */
5982eba2438SPhilippe Schenker	pinctrl_lpuart3: lpuart3grp {
5997efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX			0x06000020>,	/* SODIMM  33 */
6007efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX			0x06000020>;	/* SODIMM  35 */
6012eba2438SPhilippe Schenker	};
6022eba2438SPhilippe Schenker
6032eba2438SPhilippe Schenker	/* Colibri UART_A Control */
6042eba2438SPhilippe Schenker	pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
6057efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00		0x20>,		/* SODIMM  23 */
6067efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29			0x20>,		/* SODIMM  25 */
6077efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30			0x20>,		/* SODIMM  27 */
6087efa409eSPhilippe Schenker			   <IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03			0x20>,		/* SODIMM  29 */
6097efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22			0x20>,		/* SODIMM  31 */
6107efa409eSPhilippe Schenker			   <IMX8QXP_CSI_EN_LSIO_GPIO3_IO02			0x20>;		/* SODIMM  37 */
6112eba2438SPhilippe Schenker	};
6122eba2438SPhilippe Schenker
6132eba2438SPhilippe Schenker	/* On module wifi module */
6142eba2438SPhilippe Schenker	pinctrl_pcieb: pciebgrp {
6157efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01		0x04000061>,	/* SODIMM 178 */
6167efa409eSPhilippe Schenker			   <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02		0x04000061>,	/* SODIMM  94 */
6177efa409eSPhilippe Schenker			   <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00		0x60>;		/* SODIMM  81 */
6182eba2438SPhilippe Schenker	};
6192eba2438SPhilippe Schenker
6202eba2438SPhilippe Schenker	/* Colibri PWM_A */
6212eba2438SPhilippe Schenker	pinctrl_pwm_a: pwmagrp {
6222eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D05 */
6237efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D05_CI_PI_D07				0x61>,		/* SODIMM  59 */
6247efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT			0x60>;		/* SODIMM  59 */
6252eba2438SPhilippe Schenker	};
6262eba2438SPhilippe Schenker
6272eba2438SPhilippe Schenker	/* Colibri PWM_B */
6282eba2438SPhilippe Schenker	pinctrl_pwm_b: pwmbgrp {
6297efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_TX_LSIO_PWM0_OUT			0x60>;		/* SODIMM  28 */
6302eba2438SPhilippe Schenker	};
6312eba2438SPhilippe Schenker
6322eba2438SPhilippe Schenker	/* Colibri PWM_C */
6332eba2438SPhilippe Schenker	pinctrl_pwm_c: pwmcgrp {
6347efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_RX_LSIO_PWM1_OUT			0x60>;		/* SODIMM  30 */
6352eba2438SPhilippe Schenker	};
6362eba2438SPhilippe Schenker
6372eba2438SPhilippe Schenker	/* Colibri PWM_D */
6382eba2438SPhilippe Schenker	pinctrl_pwm_d: pwmdgrp {
6392eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D04 */
6407efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D04_CI_PI_D06				0x61>,		/* SODIMM  67 */
6417efa409eSPhilippe Schenker			   <IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT			0x60>;		/* SODIMM  67 */
6422eba2438SPhilippe Schenker	};
6432eba2438SPhilippe Schenker
6442eba2438SPhilippe Schenker	/* On-module I2S */
6452eba2438SPhilippe Schenker	pinctrl_sai0: sai0grp {
6467efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD			0x06000040>,
6477efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD			0x06000040>,
6487efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC			0x06000040>,
6497efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS			0x06000040>;
6502eba2438SPhilippe Schenker	};
6512eba2438SPhilippe Schenker
6522eba2438SPhilippe Schenker	/* Colibri Audio Analogue Microphone GND */
6532eba2438SPhilippe Schenker	pinctrl_sgtl5000: sgtl5000grp {
6547efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06		0x41>;
6552eba2438SPhilippe Schenker	};
6562eba2438SPhilippe Schenker
6572eba2438SPhilippe Schenker	/* On-module SGTL5000 clock */
6582eba2438SPhilippe Schenker	pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp {
6597efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0			0x21>;
6602eba2438SPhilippe Schenker	};
6612eba2438SPhilippe Schenker
6622eba2438SPhilippe Schenker	/* On-module USB interrupt */
6632eba2438SPhilippe Schenker	pinctrl_usb3503a: usb3503agrp {
6647efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04		0x61>;
6652eba2438SPhilippe Schenker	};
6662eba2438SPhilippe Schenker
6672eba2438SPhilippe Schenker	/* Colibri USB Client Cable Detect */
6682eba2438SPhilippe Schenker	pinctrl_usbc_det: usbcdetgrp {
6697efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09	0x06000040>;	/* SODIMM 137 */
6702eba2438SPhilippe Schenker	};
6712eba2438SPhilippe Schenker
6722eba2438SPhilippe Schenker	/* USB Host Power Enable */
6732eba2438SPhilippe Schenker	pinctrl_usbh1_reg: usbh1reggrp {
6747efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03			0x06000040>;	/* SODIMM 129 */
6752eba2438SPhilippe Schenker	};
6762eba2438SPhilippe Schenker
6772eba2438SPhilippe Schenker	/* On-module eMMC */
6782eba2438SPhilippe Schenker	pinctrl_usdhc1: usdhc1grp {
6797efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
6807efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
6817efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
6827efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
6837efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
6847efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
6857efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
6867efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
6877efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
6887efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
6897efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
6907efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
6912eba2438SPhilippe Schenker	};
6922eba2438SPhilippe Schenker
6932eba2438SPhilippe Schenker	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
6947efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
6957efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
6967efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
6977efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
6987efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
6997efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
7007efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
7017efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
7027efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
7037efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
7047efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
7057efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
7062eba2438SPhilippe Schenker	};
7072eba2438SPhilippe Schenker
7082eba2438SPhilippe Schenker	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
7097efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
7107efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
7117efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
7127efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
7137efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
7147efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
7157efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
7167efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
7177efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
7187efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
7197efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
7207efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
7212eba2438SPhilippe Schenker	};
7222eba2438SPhilippe Schenker
7232eba2438SPhilippe Schenker	/* Colibri SD/MMC Card Detect */
7242eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
7257efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x06000021>;	/* SODIMM  43 */
7262eba2438SPhilippe Schenker	};
7272eba2438SPhilippe Schenker
7282eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
7297efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x60>;		/* SODIMM  43 */
7302eba2438SPhilippe Schenker	};
7312eba2438SPhilippe Schenker
7322eba2438SPhilippe Schenker	/* Colibri SD/MMC Card */
7332eba2438SPhilippe Schenker	pinctrl_usdhc2: usdhc2grp {
7347efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
7357efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
7367efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
7377efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
7387efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
7397efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
7407efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
7412eba2438SPhilippe Schenker	};
7422eba2438SPhilippe Schenker
7432eba2438SPhilippe Schenker	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
7447efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
7457efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
7467efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
7477efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
7487efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
7497efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
7507efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
7512eba2438SPhilippe Schenker	};
7522eba2438SPhilippe Schenker
7532eba2438SPhilippe Schenker	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
7547efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
7557efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
7567efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
7577efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
7587efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
7597efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
7607efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
7612eba2438SPhilippe Schenker	};
7622eba2438SPhilippe Schenker
7632eba2438SPhilippe Schenker	pinctrl_usdhc2_sleep: usdhc2slpgrp {
7647efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23			0x60>,		/* SODIMM  47 */
7657efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24			0x60>,		/* SODIMM 190 */
7667efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25		0x60>,		/* SODIMM 192 */
7677efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26		0x60>,		/* SODIMM  49 */
7687efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27		0x60>,		/* SODIMM  51 */
7697efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28		0x60>,		/* SODIMM  53 */
7707efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
7712eba2438SPhilippe Schenker	};
7722eba2438SPhilippe Schenker
7732eba2438SPhilippe Schenker	pinctrl_wifi: wifigrp {
7747efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20>;
7752eba2438SPhilippe Schenker	};
7762eba2438SPhilippe Schenker};
777