1e8f7a387SPhilippe Schenker// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 22eba2438SPhilippe Schenker/* 32eba2438SPhilippe Schenker * Copyright 2019 Toradex 42eba2438SPhilippe Schenker */ 52eba2438SPhilippe Schenker 62eba2438SPhilippe Schenker/ { 72eba2438SPhilippe Schenker chosen { 82eba2438SPhilippe Schenker stdout-path = &lpuart3; 92eba2438SPhilippe Schenker }; 102eba2438SPhilippe Schenker 112eba2438SPhilippe Schenker reg_module_3v3: regulator-module-3v3 { 122eba2438SPhilippe Schenker compatible = "regulator-fixed"; 132eba2438SPhilippe Schenker regulator-name = "+V3.3"; 142eba2438SPhilippe Schenker regulator-min-microvolt = <3300000>; 152eba2438SPhilippe Schenker regulator-max-microvolt = <3300000>; 162eba2438SPhilippe Schenker }; 172eba2438SPhilippe Schenker}; 182eba2438SPhilippe Schenker 192eba2438SPhilippe Schenker/* On-module I2C */ 202eba2438SPhilippe Schenker&i2c0 { 212eba2438SPhilippe Schenker #address-cells = <1>; 222eba2438SPhilippe Schenker #size-cells = <0>; 232eba2438SPhilippe Schenker clock-frequency = <100000>; 242eba2438SPhilippe Schenker pinctrl-names = "default"; 252eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>; 262eba2438SPhilippe Schenker status = "okay"; 272eba2438SPhilippe Schenker 282eba2438SPhilippe Schenker /* Touch controller */ 292eba2438SPhilippe Schenker touchscreen@2c { 302eba2438SPhilippe Schenker compatible = "adi,ad7879-1"; 312eba2438SPhilippe Schenker pinctrl-names = "default"; 322eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_ad7879_int>; 332eba2438SPhilippe Schenker reg = <0x2c>; 342eba2438SPhilippe Schenker interrupt-parent = <&lsio_gpio3>; 352eba2438SPhilippe Schenker interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 362eba2438SPhilippe Schenker touchscreen-max-pressure = <4096>; 372eba2438SPhilippe Schenker adi,resistance-plate-x = <120>; 382eba2438SPhilippe Schenker adi,first-conversion-delay = /bits/ 8 <3>; 392eba2438SPhilippe Schenker adi,acquisition-time = /bits/ 8 <1>; 402eba2438SPhilippe Schenker adi,median-filter-size = /bits/ 8 <2>; 412eba2438SPhilippe Schenker adi,averaging = /bits/ 8 <1>; 422eba2438SPhilippe Schenker adi,conversion-interval = /bits/ 8 <255>; 432eba2438SPhilippe Schenker }; 442eba2438SPhilippe Schenker}; 452eba2438SPhilippe Schenker 462eba2438SPhilippe Schenker/* Colibri I2C */ 472eba2438SPhilippe Schenker&i2c1 { 482eba2438SPhilippe Schenker #address-cells = <1>; 492eba2438SPhilippe Schenker #size-cells = <0>; 502eba2438SPhilippe Schenker clock-frequency = <100000>; 512eba2438SPhilippe Schenker pinctrl-names = "default"; 522eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_i2c1>; 532eba2438SPhilippe Schenker}; 542eba2438SPhilippe Schenker 552eba2438SPhilippe Schenker/* Colibri UART_B */ 562eba2438SPhilippe Schenker&lpuart0 { 572eba2438SPhilippe Schenker pinctrl-names = "default"; 582eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_lpuart0>; 592eba2438SPhilippe Schenker}; 602eba2438SPhilippe Schenker 612eba2438SPhilippe Schenker/* Colibri UART_C */ 622eba2438SPhilippe Schenker&lpuart2 { 632eba2438SPhilippe Schenker pinctrl-names = "default"; 642eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_lpuart2>; 652eba2438SPhilippe Schenker}; 662eba2438SPhilippe Schenker 672eba2438SPhilippe Schenker/* Colibri UART_A */ 682eba2438SPhilippe Schenker&lpuart3 { 692eba2438SPhilippe Schenker pinctrl-names = "default"; 702eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; 712eba2438SPhilippe Schenker}; 722eba2438SPhilippe Schenker 732eba2438SPhilippe Schenker/* Colibri FastEthernet */ 742eba2438SPhilippe Schenker&fec1 { 752eba2438SPhilippe Schenker pinctrl-names = "default", "sleep"; 762eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_fec1>; 772eba2438SPhilippe Schenker pinctrl-1 = <&pinctrl_fec1_sleep>; 782eba2438SPhilippe Schenker phy-mode = "rmii"; 792eba2438SPhilippe Schenker phy-handle = <ðphy0>; 802eba2438SPhilippe Schenker fsl,magic-packet; 812eba2438SPhilippe Schenker 822eba2438SPhilippe Schenker mdio { 832eba2438SPhilippe Schenker #address-cells = <1>; 842eba2438SPhilippe Schenker #size-cells = <0>; 852eba2438SPhilippe Schenker 862eba2438SPhilippe Schenker ethphy0: ethernet-phy@2 { 872eba2438SPhilippe Schenker compatible = "ethernet-phy-ieee802.3-c22"; 882eba2438SPhilippe Schenker max-speed = <100>; 892eba2438SPhilippe Schenker reg = <2>; 902eba2438SPhilippe Schenker }; 912eba2438SPhilippe Schenker }; 922eba2438SPhilippe Schenker}; 932eba2438SPhilippe Schenker 942eba2438SPhilippe Schenker/* On-module eMMC */ 952eba2438SPhilippe Schenker&usdhc1 { 962eba2438SPhilippe Schenker bus-width = <8>; 972eba2438SPhilippe Schenker non-removable; 982eba2438SPhilippe Schenker no-sd; 992eba2438SPhilippe Schenker no-sdio; 1002eba2438SPhilippe Schenker pinctrl-names = "default", "state_100mhz", "state_200mhz"; 1012eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_usdhc1>; 1022eba2438SPhilippe Schenker pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 1032eba2438SPhilippe Schenker pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 1042eba2438SPhilippe Schenker status = "okay"; 1052eba2438SPhilippe Schenker}; 1062eba2438SPhilippe Schenker 1072eba2438SPhilippe Schenker/* Colibri SD/MMC Card */ 1082eba2438SPhilippe Schenker&usdhc2 { 1092eba2438SPhilippe Schenker bus-width = <4>; 1102eba2438SPhilippe Schenker cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; 1112eba2438SPhilippe Schenker vmmc-supply = <®_module_3v3>; 1122eba2438SPhilippe Schenker pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 1132eba2438SPhilippe Schenker pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 1142eba2438SPhilippe Schenker pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 1152eba2438SPhilippe Schenker pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 1162eba2438SPhilippe Schenker pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; 1172eba2438SPhilippe Schenker disable-wp; 1182eba2438SPhilippe Schenker}; 1192eba2438SPhilippe Schenker 1202eba2438SPhilippe Schenker&iomuxc { 1212eba2438SPhilippe Schenker pinctrl-names = "default"; 1224d2adf73SPhilippe Schenker pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, 1234d2adf73SPhilippe Schenker <&pinctrl_hog2>; 1242eba2438SPhilippe Schenker 1252eba2438SPhilippe Schenker /* On-module touch pen-down interrupt */ 1262eba2438SPhilippe Schenker pinctrl_ad7879_int: ad7879intgrp { 1277efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21>; 1282eba2438SPhilippe Schenker }; 1292eba2438SPhilippe Schenker 1302eba2438SPhilippe Schenker /* Colibri Analogue Inputs */ 1312eba2438SPhilippe Schenker pinctrl_adc0: adc0grp { 1327efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60>, /* SODIMM 8 */ 1337efa409eSPhilippe Schenker <IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60>, /* SODIMM 6 */ 1347efa409eSPhilippe Schenker <IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60>, /* SODIMM 4 */ 1357efa409eSPhilippe Schenker <IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60>; /* SODIMM 2 */ 1362eba2438SPhilippe Schenker }; 1372eba2438SPhilippe Schenker 1387ece3cbcSPhilippe Schenker /* Atmel MXT touchsceen + Capacitive Touch Adapter */ 1397ece3cbcSPhilippe Schenker /* NOTE: This pingroup conflicts with pingroups 1407ece3cbcSPhilippe Schenker * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them 1417ece3cbcSPhilippe Schenker * simultaneously. 1427ece3cbcSPhilippe Schenker */ 1437ece3cbcSPhilippe Schenker pinctrl_atmel_adap: atmeladaptergrp { 1447ece3cbcSPhilippe Schenker fsl,pins = <IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 0x21>, /* SODIMM 30 */ 1457ece3cbcSPhilippe Schenker <IMX8QXP_UART1_TX_LSIO_GPIO0_IO21 0x4000021>; /* SODIMM 28 */ 1467ece3cbcSPhilippe Schenker }; 1477ece3cbcSPhilippe Schenker 1487ece3cbcSPhilippe Schenker /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */ 1497ece3cbcSPhilippe Schenker pinctrl_atmel_conn: atmelconnectorgrp { 1507ece3cbcSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x4000021>, /* SODIMM 107 */ 1517ece3cbcSPhilippe Schenker <IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x21>; /* SODIMM 106 */ 1527ece3cbcSPhilippe Schenker }; 1537ece3cbcSPhilippe Schenker 1542eba2438SPhilippe Schenker pinctrl_can_int: canintgrp { 1557efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40>; /* SODIMM 73 */ 1562eba2438SPhilippe Schenker }; 1572eba2438SPhilippe Schenker 1582eba2438SPhilippe Schenker pinctrl_csi_ctl: csictlgrp { 1597efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20>, /* SODIMM 77 */ 1607efa409eSPhilippe Schenker <IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20>; /* SODIMM 89 */ 1612eba2438SPhilippe Schenker }; 1622eba2438SPhilippe Schenker 1635e634a90SPhilippe Schenker pinctrl_csi_mclk: csimclkgrp { 1645e634a90SPhilippe Schenker fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041>; /* SODIMM 75 / X3-12 */ 1655e634a90SPhilippe Schenker }; 1665e634a90SPhilippe Schenker 1672eba2438SPhilippe Schenker pinctrl_ext_io0: extio0grp { 1687efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040>; /* SODIMM 135 */ 1692eba2438SPhilippe Schenker }; 1702eba2438SPhilippe Schenker 1712eba2438SPhilippe Schenker /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */ 1722eba2438SPhilippe Schenker pinctrl_fec1: fec1grp { 1737efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020>, 1747efa409eSPhilippe Schenker <IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020>, 1757efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61>, 1767efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061>, 1777efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61>, 1787efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61>, 1797efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61>, 1807efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61>, 1817efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61>, 1827efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61>; 1832eba2438SPhilippe Schenker }; 1842eba2438SPhilippe Schenker 1852eba2438SPhilippe Schenker pinctrl_fec1_sleep: fec1slpgrp { 1867efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041>, 1877efa409eSPhilippe Schenker <IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041>, 1887efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41>, 1897efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41>, 1907efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41>, 1917efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41>, 1927efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41>, 1937efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41>, 1947efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41>, 1957efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41>; 1962eba2438SPhilippe Schenker }; 1972eba2438SPhilippe Schenker 1982eba2438SPhilippe Schenker /* Colibri optional CAN on UART_B RTS/CTS */ 1992eba2438SPhilippe Schenker pinctrl_flexcan1: flexcan0grp { 2007efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21>, /* SODIMM 32 */ 2017efa409eSPhilippe Schenker <IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21>; /* SODIMM 34 */ 2022eba2438SPhilippe Schenker }; 2032eba2438SPhilippe Schenker 2042eba2438SPhilippe Schenker /* Colibri optional CAN on PS2 */ 2052eba2438SPhilippe Schenker pinctrl_flexcan2: flexcan1grp { 2067efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21>, /* SODIMM 55 */ 2077efa409eSPhilippe Schenker <IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21>; /* SODIMM 63 */ 2082eba2438SPhilippe Schenker }; 2092eba2438SPhilippe Schenker 2102eba2438SPhilippe Schenker /* Colibri optional CAN on UART_A TXD/RXD */ 2112eba2438SPhilippe Schenker pinctrl_flexcan3: flexcan2grp { 2127efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21>, /* SODIMM 35 */ 2137efa409eSPhilippe Schenker <IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21>; /* SODIMM 33 */ 2142eba2438SPhilippe Schenker }; 2152eba2438SPhilippe Schenker 2162eba2438SPhilippe Schenker /* Colibri LCD Back-Light GPIO */ 2172eba2438SPhilippe Schenker pinctrl_gpio_bl_on: gpioblongrp { 2187efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60>; /* SODIMM 71 */ 2192eba2438SPhilippe Schenker }; 2202eba2438SPhilippe Schenker 2212eba2438SPhilippe Schenker pinctrl_gpiokeys: gpiokeysgrp { 2227efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041>; /* SODIMM 45 */ 2232eba2438SPhilippe Schenker }; 2242eba2438SPhilippe Schenker 2252eba2438SPhilippe Schenker pinctrl_hog0: hog0grp { 2267efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020>, /* SODIMM 65 */ 2277efa409eSPhilippe Schenker <IMX8QXP_CSI_D07_CI_PI_D09 0x61>, /* SODIMM 65 */ 2287efa409eSPhilippe Schenker <IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20>, /* SODIMM 69 */ 2297efa409eSPhilippe Schenker <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20>, /* SODIMM 79 */ 2307efa409eSPhilippe Schenker <IMX8QXP_CSI_D02_CI_PI_D04 0x61>, /* SODIMM 79 */ 2317efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020>, /* SODIMM 85 */ 2327efa409eSPhilippe Schenker <IMX8QXP_CSI_D06_CI_PI_D08 0x61>, /* SODIMM 85 */ 2337efa409eSPhilippe Schenker <IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20>, /* SODIMM 95 */ 2347efa409eSPhilippe Schenker <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20>, /* SODIMM 97 */ 2357efa409eSPhilippe Schenker <IMX8QXP_CSI_D03_CI_PI_D05 0x61>, /* SODIMM 97 */ 2367efa409eSPhilippe Schenker <IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20>, /* SODIMM 99 */ 2377efa409eSPhilippe Schenker <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20>, /* SODIMM 101 */ 2387efa409eSPhilippe Schenker <IMX8QXP_CSI_D00_CI_PI_D02 0x61>, /* SODIMM 101 */ 2397efa409eSPhilippe Schenker <IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20>, /* SODIMM 103 */ 2407efa409eSPhilippe Schenker <IMX8QXP_CSI_D01_CI_PI_D03 0x61>, /* SODIMM 103 */ 2417efa409eSPhilippe Schenker <IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20>, /* SODIMM 105 */ 2427efa409eSPhilippe Schenker <IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20>, /* SODIMM 127 */ 2437efa409eSPhilippe Schenker <IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20>, /* SODIMM 131 */ 2447efa409eSPhilippe Schenker <IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20>, /* SODIMM 133 */ 2457efa409eSPhilippe Schenker <IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20>, /* SODIMM 96 */ 2467efa409eSPhilippe Schenker <IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20>, /* SODIMM 98 */ 2477efa409eSPhilippe Schenker <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20>, /* SODIMM 100 */ 2487efa409eSPhilippe Schenker <IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20>, /* SODIMM 102 */ 2497ece3cbcSPhilippe Schenker <IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20>; /* SODIMM 104 */ 2502eba2438SPhilippe Schenker }; 2512eba2438SPhilippe Schenker 2522eba2438SPhilippe Schenker pinctrl_hog1: hog1grp { 2537efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>, /* SODIMM 75 */ 2547efa409eSPhilippe Schenker <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */ 2552eba2438SPhilippe Schenker }; 2562eba2438SPhilippe Schenker 2574d2adf73SPhilippe Schenker pinctrl_hog2: hog2grp { 2584d2adf73SPhilippe Schenker fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>; /* SODIMM 75 */ 2594d2adf73SPhilippe Schenker }; 2604d2adf73SPhilippe Schenker 2612eba2438SPhilippe Schenker /* 2622eba2438SPhilippe Schenker * This pin is used in the SCFW as a UART. Using it from 2632eba2438SPhilippe Schenker * Linux would require rewritting the SCFW board file. 2642eba2438SPhilippe Schenker */ 2652eba2438SPhilippe Schenker pinctrl_hog_scfw: hogscfwgrp { 2667efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20>; /* SODIMM 144 */ 2672eba2438SPhilippe Schenker }; 2682eba2438SPhilippe Schenker 2692eba2438SPhilippe Schenker /* On Module I2C */ 2702eba2438SPhilippe Schenker pinctrl_i2c0: i2c0grp { 2717efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021>, 2727efa409eSPhilippe Schenker <IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021>; 2732eba2438SPhilippe Schenker }; 2742eba2438SPhilippe Schenker 2752eba2438SPhilippe Schenker /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */ 2762eba2438SPhilippe Schenker pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp { 2777efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020>, /* SODIMM 140 */ 2787efa409eSPhilippe Schenker <IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020>; /* SODIMM 142 */ 2792eba2438SPhilippe Schenker }; 2802eba2438SPhilippe Schenker 2812eba2438SPhilippe Schenker /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */ 2822eba2438SPhilippe Schenker pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp { 2837efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020>, /* SODIMM 186 */ 2847efa409eSPhilippe Schenker <IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020>; /* SODIMM 188 */ 2852eba2438SPhilippe Schenker }; 2862eba2438SPhilippe Schenker 2872eba2438SPhilippe Schenker /* Colibri I2C */ 2882eba2438SPhilippe Schenker pinctrl_i2c1: i2c1grp { 2897efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021>, /* SODIMM 196 */ 2907efa409eSPhilippe Schenker <IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021>; /* SODIMM 194 */ 2912eba2438SPhilippe Schenker }; 2922eba2438SPhilippe Schenker 2932eba2438SPhilippe Schenker /* Colibri Parallel RGB LCD Interface */ 2942eba2438SPhilippe Schenker pinctrl_lcdif: lcdifgrp { 2957efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60>, /* SODIMM 56 */ 2967efa409eSPhilippe Schenker <IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60>, /* SODIMM 68 */ 2977efa409eSPhilippe Schenker <IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60>, /* SODIMM 82 */ 298*bd74f83dSPhilippe Schenker <IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x40>, /* SODIMM 44 */ 299*bd74f83dSPhilippe Schenker <IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x40>, /* SODIMM 44 */ 3007efa409eSPhilippe Schenker <IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60>, /* SODIMM 76 */ 3017efa409eSPhilippe Schenker <IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60>, /* SODIMM 76 */ 3027efa409eSPhilippe Schenker <IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60>, /* SODIMM 70 */ 3037efa409eSPhilippe Schenker <IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60>, /* SODIMM 60 */ 3047efa409eSPhilippe Schenker <IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60>, /* SODIMM 58 */ 3057efa409eSPhilippe Schenker <IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60>, /* SODIMM 78 */ 3067efa409eSPhilippe Schenker <IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60>, /* SODIMM 72 */ 3077efa409eSPhilippe Schenker <IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60>, /* SODIMM 80 */ 3087efa409eSPhilippe Schenker <IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60>, /* SODIMM 46 */ 3097efa409eSPhilippe Schenker <IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60>, /* SODIMM 62 */ 3107efa409eSPhilippe Schenker <IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60>, /* SODIMM 48 */ 3117efa409eSPhilippe Schenker <IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60>, /* SODIMM 74 */ 3127efa409eSPhilippe Schenker <IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60>, /* SODIMM 50 */ 3137efa409eSPhilippe Schenker <IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60>, /* SODIMM 52 */ 3147efa409eSPhilippe Schenker <IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60>, /* SODIMM 54 */ 3157efa409eSPhilippe Schenker <IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60>, /* SODIMM 66 */ 3167efa409eSPhilippe Schenker <IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60>, /* SODIMM 64 */ 3177efa409eSPhilippe Schenker <IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60>, /* SODIMM 57 */ 3187efa409eSPhilippe Schenker <IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60>, /* SODIMM 57 */ 3197efa409eSPhilippe Schenker <IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60>; /* SODIMM 61 */ 3202eba2438SPhilippe Schenker }; 3212eba2438SPhilippe Schenker 3222eba2438SPhilippe Schenker /* Colibri SPI */ 3232eba2438SPhilippe Schenker pinctrl_lpspi2: lpspi2grp { 3247efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21>, /* SODIMM 86 */ 3257efa409eSPhilippe Schenker <IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040>, /* SODIMM 92 */ 3267efa409eSPhilippe Schenker <IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040>, /* SODIMM 90 */ 3277efa409eSPhilippe Schenker <IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040>; /* SODIMM 88 */ 3282eba2438SPhilippe Schenker }; 3292eba2438SPhilippe Schenker 3302eba2438SPhilippe Schenker /* Colibri UART_B */ 3312eba2438SPhilippe Schenker pinctrl_lpuart0: lpuart0grp { 3327efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020>, /* SODIMM 36 */ 3337efa409eSPhilippe Schenker <IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020>, /* SODIMM 38 */ 3347efa409eSPhilippe Schenker <IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020>, /* SODIMM 34 */ 3357efa409eSPhilippe Schenker <IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020>; /* SODIMM 32 */ 3362eba2438SPhilippe Schenker }; 3372eba2438SPhilippe Schenker 3382eba2438SPhilippe Schenker /* Colibri UART_C */ 3392eba2438SPhilippe Schenker pinctrl_lpuart2: lpuart2grp { 3407efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020>, /* SODIMM 19 */ 3417efa409eSPhilippe Schenker <IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020>; /* SODIMM 21 */ 3422eba2438SPhilippe Schenker }; 3432eba2438SPhilippe Schenker 3442eba2438SPhilippe Schenker /* Colibri UART_A */ 3452eba2438SPhilippe Schenker pinctrl_lpuart3: lpuart3grp { 3467efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020>, /* SODIMM 33 */ 3477efa409eSPhilippe Schenker <IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020>; /* SODIMM 35 */ 3482eba2438SPhilippe Schenker }; 3492eba2438SPhilippe Schenker 3502eba2438SPhilippe Schenker /* Colibri UART_A Control */ 3512eba2438SPhilippe Schenker pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { 3527efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20>, /* SODIMM 23 */ 3537efa409eSPhilippe Schenker <IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20>, /* SODIMM 25 */ 3547efa409eSPhilippe Schenker <IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20>, /* SODIMM 27 */ 3557efa409eSPhilippe Schenker <IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20>, /* SODIMM 29 */ 3567efa409eSPhilippe Schenker <IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20>, /* SODIMM 31 */ 3577efa409eSPhilippe Schenker <IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20>; /* SODIMM 37 */ 3582eba2438SPhilippe Schenker }; 3592eba2438SPhilippe Schenker 3602eba2438SPhilippe Schenker /* On module wifi module */ 3612eba2438SPhilippe Schenker pinctrl_pcieb: pciebgrp { 3627efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061>, /* SODIMM 178 */ 3637efa409eSPhilippe Schenker <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061>, /* SODIMM 94 */ 3647efa409eSPhilippe Schenker <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60>; /* SODIMM 81 */ 3652eba2438SPhilippe Schenker }; 3662eba2438SPhilippe Schenker 3672eba2438SPhilippe Schenker /* Colibri PWM_A */ 3682eba2438SPhilippe Schenker pinctrl_pwm_a: pwmagrp { 3692eba2438SPhilippe Schenker /* both pins are connected together, reserve the unused CSI_D05 */ 3707efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_CSI_D05_CI_PI_D07 0x61>, /* SODIMM 59 */ 3717efa409eSPhilippe Schenker <IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60>; /* SODIMM 59 */ 3722eba2438SPhilippe Schenker }; 3732eba2438SPhilippe Schenker 3742eba2438SPhilippe Schenker /* Colibri PWM_B */ 3752eba2438SPhilippe Schenker pinctrl_pwm_b: pwmbgrp { 3767efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60>; /* SODIMM 28 */ 3772eba2438SPhilippe Schenker }; 3782eba2438SPhilippe Schenker 3792eba2438SPhilippe Schenker /* Colibri PWM_C */ 3802eba2438SPhilippe Schenker pinctrl_pwm_c: pwmcgrp { 3817efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60>; /* SODIMM 30 */ 3822eba2438SPhilippe Schenker }; 3832eba2438SPhilippe Schenker 3842eba2438SPhilippe Schenker /* Colibri PWM_D */ 3852eba2438SPhilippe Schenker pinctrl_pwm_d: pwmdgrp { 3862eba2438SPhilippe Schenker /* both pins are connected together, reserve the unused CSI_D04 */ 3877efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_CSI_D04_CI_PI_D06 0x61>, /* SODIMM 67 */ 3887efa409eSPhilippe Schenker <IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60>; /* SODIMM 67 */ 3892eba2438SPhilippe Schenker }; 3902eba2438SPhilippe Schenker 3912eba2438SPhilippe Schenker /* On-module I2S */ 3922eba2438SPhilippe Schenker pinctrl_sai0: sai0grp { 3937efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040>, 3947efa409eSPhilippe Schenker <IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040>, 3957efa409eSPhilippe Schenker <IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040>, 3967efa409eSPhilippe Schenker <IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040>; 3972eba2438SPhilippe Schenker }; 3982eba2438SPhilippe Schenker 3992eba2438SPhilippe Schenker /* Colibri Audio Analogue Microphone GND */ 4002eba2438SPhilippe Schenker pinctrl_sgtl5000: sgtl5000grp { 4017efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41>; 4022eba2438SPhilippe Schenker }; 4032eba2438SPhilippe Schenker 4042eba2438SPhilippe Schenker /* On-module SGTL5000 clock */ 4052eba2438SPhilippe Schenker pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp { 4067efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21>; 4072eba2438SPhilippe Schenker }; 4082eba2438SPhilippe Schenker 4092eba2438SPhilippe Schenker /* On-module USB interrupt */ 4102eba2438SPhilippe Schenker pinctrl_usb3503a: usb3503agrp { 4117efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61>; 4122eba2438SPhilippe Schenker }; 4132eba2438SPhilippe Schenker 4142eba2438SPhilippe Schenker /* Colibri USB Client Cable Detect */ 4152eba2438SPhilippe Schenker pinctrl_usbc_det: usbcdetgrp { 4167efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040>; /* SODIMM 137 */ 4172eba2438SPhilippe Schenker }; 4182eba2438SPhilippe Schenker 4192eba2438SPhilippe Schenker /* USB Host Power Enable */ 4202eba2438SPhilippe Schenker pinctrl_usbh1_reg: usbh1reggrp { 4217efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040>; /* SODIMM 129 */ 4222eba2438SPhilippe Schenker }; 4232eba2438SPhilippe Schenker 4242eba2438SPhilippe Schenker /* On-module eMMC */ 4252eba2438SPhilippe Schenker pinctrl_usdhc1: usdhc1grp { 4267efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>, 4277efa409eSPhilippe Schenker <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21>, 4287efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21>, 4297efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21>, 4307efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21>, 4317efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21>, 4327efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21>, 4337efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21>, 4347efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21>, 4357efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21>, 4367efa409eSPhilippe Schenker <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41>, 4377efa409eSPhilippe Schenker <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21>; 4382eba2438SPhilippe Schenker }; 4392eba2438SPhilippe Schenker 4402eba2438SPhilippe Schenker pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 4417efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>, 4427efa409eSPhilippe Schenker <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21>, 4437efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21>, 4447efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21>, 4457efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21>, 4467efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21>, 4477efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21>, 4487efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21>, 4497efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21>, 4507efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21>, 4517efa409eSPhilippe Schenker <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41>, 4527efa409eSPhilippe Schenker <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21>; 4532eba2438SPhilippe Schenker }; 4542eba2438SPhilippe Schenker 4552eba2438SPhilippe Schenker pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 4567efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>, 4577efa409eSPhilippe Schenker <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21>, 4587efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21>, 4597efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21>, 4607efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21>, 4617efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21>, 4627efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21>, 4637efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21>, 4647efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21>, 4657efa409eSPhilippe Schenker <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21>, 4667efa409eSPhilippe Schenker <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41>, 4677efa409eSPhilippe Schenker <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21>; 4682eba2438SPhilippe Schenker }; 4692eba2438SPhilippe Schenker 4702eba2438SPhilippe Schenker /* Colibri SD/MMC Card Detect */ 4712eba2438SPhilippe Schenker pinctrl_usdhc2_gpio: usdhc2gpiogrp { 4727efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021>; /* SODIMM 43 */ 4732eba2438SPhilippe Schenker }; 4742eba2438SPhilippe Schenker 4752eba2438SPhilippe Schenker pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp { 4767efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60>; /* SODIMM 43 */ 4772eba2438SPhilippe Schenker }; 4782eba2438SPhilippe Schenker 4792eba2438SPhilippe Schenker /* Colibri SD/MMC Card */ 4802eba2438SPhilippe Schenker pinctrl_usdhc2: usdhc2grp { 4817efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, /* SODIMM 47 */ 4827efa409eSPhilippe Schenker <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21>, /* SODIMM 190 */ 4837efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21>, /* SODIMM 192 */ 4847efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21>, /* SODIMM 49 */ 4857efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21>, /* SODIMM 51 */ 4867efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21>, /* SODIMM 53 */ 4877efa409eSPhilippe Schenker <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>; 4882eba2438SPhilippe Schenker }; 4892eba2438SPhilippe Schenker 4902eba2438SPhilippe Schenker pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 4917efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, /* SODIMM 47 */ 4927efa409eSPhilippe Schenker <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21>, /* SODIMM 190 */ 4937efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21>, /* SODIMM 192 */ 4947efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21>, /* SODIMM 49 */ 4957efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21>, /* SODIMM 51 */ 4967efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21>, /* SODIMM 53 */ 4977efa409eSPhilippe Schenker <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>; 4982eba2438SPhilippe Schenker }; 4992eba2438SPhilippe Schenker 5002eba2438SPhilippe Schenker pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 5017efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, /* SODIMM 47 */ 5027efa409eSPhilippe Schenker <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21>, /* SODIMM 190 */ 5037efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21>, /* SODIMM 192 */ 5047efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21>, /* SODIMM 49 */ 5057efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21>, /* SODIMM 51 */ 5067efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21>, /* SODIMM 53 */ 5077efa409eSPhilippe Schenker <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>; 5082eba2438SPhilippe Schenker }; 5092eba2438SPhilippe Schenker 5102eba2438SPhilippe Schenker pinctrl_usdhc2_sleep: usdhc2slpgrp { 5117efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60>, /* SODIMM 47 */ 5127efa409eSPhilippe Schenker <IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60>, /* SODIMM 190 */ 5137efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60>, /* SODIMM 192 */ 5147efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60>, /* SODIMM 49 */ 5157efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60>, /* SODIMM 51 */ 5167efa409eSPhilippe Schenker <IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60>, /* SODIMM 53 */ 5177efa409eSPhilippe Schenker <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>; 5182eba2438SPhilippe Schenker }; 5192eba2438SPhilippe Schenker 5202eba2438SPhilippe Schenker pinctrl_wifi: wifigrp { 5217efa409eSPhilippe Schenker fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20>; 5222eba2438SPhilippe Schenker }; 5232eba2438SPhilippe Schenker}; 524