1e8f7a387SPhilippe Schenker// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
22eba2438SPhilippe Schenker/*
32eba2438SPhilippe Schenker * Copyright 2019 Toradex
42eba2438SPhilippe Schenker */
52eba2438SPhilippe Schenker
62eba2438SPhilippe Schenker/ {
72eba2438SPhilippe Schenker	chosen {
82eba2438SPhilippe Schenker		stdout-path = &lpuart3;
92eba2438SPhilippe Schenker	};
102eba2438SPhilippe Schenker
112eba2438SPhilippe Schenker	reg_module_3v3: regulator-module-3v3 {
122eba2438SPhilippe Schenker		compatible = "regulator-fixed";
132eba2438SPhilippe Schenker		regulator-name = "+V3.3";
142eba2438SPhilippe Schenker		regulator-min-microvolt = <3300000>;
152eba2438SPhilippe Schenker		regulator-max-microvolt = <3300000>;
162eba2438SPhilippe Schenker	};
172eba2438SPhilippe Schenker};
182eba2438SPhilippe Schenker
192eba2438SPhilippe Schenker/* On-module I2C */
202eba2438SPhilippe Schenker&i2c0 {
212eba2438SPhilippe Schenker	#address-cells = <1>;
222eba2438SPhilippe Schenker	#size-cells = <0>;
232eba2438SPhilippe Schenker	clock-frequency = <100000>;
242eba2438SPhilippe Schenker	pinctrl-names = "default";
252eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
262eba2438SPhilippe Schenker	status = "okay";
272eba2438SPhilippe Schenker
282eba2438SPhilippe Schenker	/* Touch controller */
292eba2438SPhilippe Schenker	touchscreen@2c {
302eba2438SPhilippe Schenker		compatible = "adi,ad7879-1";
312eba2438SPhilippe Schenker		pinctrl-names = "default";
322eba2438SPhilippe Schenker		pinctrl-0 = <&pinctrl_ad7879_int>;
332eba2438SPhilippe Schenker		reg = <0x2c>;
342eba2438SPhilippe Schenker		interrupt-parent = <&lsio_gpio3>;
352eba2438SPhilippe Schenker		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
362eba2438SPhilippe Schenker		touchscreen-max-pressure = <4096>;
372eba2438SPhilippe Schenker		adi,resistance-plate-x = <120>;
382eba2438SPhilippe Schenker		adi,first-conversion-delay = /bits/ 8 <3>;
392eba2438SPhilippe Schenker		adi,acquisition-time = /bits/ 8 <1>;
402eba2438SPhilippe Schenker		adi,median-filter-size = /bits/ 8 <2>;
412eba2438SPhilippe Schenker		adi,averaging = /bits/ 8 <1>;
422eba2438SPhilippe Schenker		adi,conversion-interval = /bits/ 8 <255>;
432eba2438SPhilippe Schenker	};
442eba2438SPhilippe Schenker};
452eba2438SPhilippe Schenker
462eba2438SPhilippe Schenker/* Colibri I2C */
472eba2438SPhilippe Schenker&i2c1 {
482eba2438SPhilippe Schenker	#address-cells = <1>;
492eba2438SPhilippe Schenker	#size-cells = <0>;
502eba2438SPhilippe Schenker	clock-frequency = <100000>;
512eba2438SPhilippe Schenker	pinctrl-names = "default";
522eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c1>;
532eba2438SPhilippe Schenker};
542eba2438SPhilippe Schenker
552eba2438SPhilippe Schenker/* Colibri UART_B */
562eba2438SPhilippe Schenker&lpuart0 {
572eba2438SPhilippe Schenker	pinctrl-names = "default";
582eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart0>;
592eba2438SPhilippe Schenker};
602eba2438SPhilippe Schenker
612eba2438SPhilippe Schenker/* Colibri UART_C */
622eba2438SPhilippe Schenker&lpuart2 {
632eba2438SPhilippe Schenker	pinctrl-names = "default";
642eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart2>;
652eba2438SPhilippe Schenker};
662eba2438SPhilippe Schenker
672eba2438SPhilippe Schenker/* Colibri UART_A */
682eba2438SPhilippe Schenker&lpuart3 {
692eba2438SPhilippe Schenker	pinctrl-names = "default";
702eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
712eba2438SPhilippe Schenker};
722eba2438SPhilippe Schenker
732eba2438SPhilippe Schenker/* Colibri FastEthernet */
742eba2438SPhilippe Schenker&fec1 {
752eba2438SPhilippe Schenker	pinctrl-names = "default", "sleep";
762eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_fec1>;
772eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_fec1_sleep>;
782eba2438SPhilippe Schenker	phy-mode = "rmii";
792eba2438SPhilippe Schenker	phy-handle = <&ethphy0>;
802eba2438SPhilippe Schenker	fsl,magic-packet;
812eba2438SPhilippe Schenker
822eba2438SPhilippe Schenker	mdio {
832eba2438SPhilippe Schenker		#address-cells = <1>;
842eba2438SPhilippe Schenker		#size-cells = <0>;
852eba2438SPhilippe Schenker
862eba2438SPhilippe Schenker		ethphy0: ethernet-phy@2 {
872eba2438SPhilippe Schenker			compatible = "ethernet-phy-ieee802.3-c22";
882eba2438SPhilippe Schenker			max-speed = <100>;
892eba2438SPhilippe Schenker			reg = <2>;
902eba2438SPhilippe Schenker		};
912eba2438SPhilippe Schenker	};
922eba2438SPhilippe Schenker};
932eba2438SPhilippe Schenker
942eba2438SPhilippe Schenker/* On-module eMMC */
952eba2438SPhilippe Schenker&usdhc1 {
962eba2438SPhilippe Schenker	bus-width = <8>;
972eba2438SPhilippe Schenker	non-removable;
982eba2438SPhilippe Schenker	no-sd;
992eba2438SPhilippe Schenker	no-sdio;
1002eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1012eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc1>;
1022eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1032eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1042eba2438SPhilippe Schenker	status = "okay";
1052eba2438SPhilippe Schenker};
1062eba2438SPhilippe Schenker
1072eba2438SPhilippe Schenker/* Colibri SD/MMC Card */
1082eba2438SPhilippe Schenker&usdhc2 {
1092eba2438SPhilippe Schenker	bus-width = <4>;
1102eba2438SPhilippe Schenker	cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
1112eba2438SPhilippe Schenker	vmmc-supply = <&reg_module_3v3>;
1122eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
1132eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
1142eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
1152eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
1162eba2438SPhilippe Schenker	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
1172eba2438SPhilippe Schenker	disable-wp;
1182eba2438SPhilippe Schenker};
1192eba2438SPhilippe Schenker
1202eba2438SPhilippe Schenker&iomuxc {
1212eba2438SPhilippe Schenker	pinctrl-names = "default";
1222eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>;
1232eba2438SPhilippe Schenker
1242eba2438SPhilippe Schenker	/* On-module touch pen-down interrupt */
1252eba2438SPhilippe Schenker	pinctrl_ad7879_int: ad7879intgrp {
126*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05	0x21>;
1272eba2438SPhilippe Schenker	};
1282eba2438SPhilippe Schenker
1292eba2438SPhilippe Schenker	/* Colibri Analogue Inputs */
1302eba2438SPhilippe Schenker	pinctrl_adc0: adc0grp {
131*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ADC_IN0_ADMA_ADC_IN0			0x60>,		/* SODIMM   8 */
132*7efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN1_ADMA_ADC_IN1			0x60>,		/* SODIMM   6 */
133*7efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN4_ADMA_ADC_IN4			0x60>,		/* SODIMM   4 */
134*7efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN5_ADMA_ADC_IN5			0x60>;		/* SODIMM   2 */
1352eba2438SPhilippe Schenker	};
1362eba2438SPhilippe Schenker
1372eba2438SPhilippe Schenker	pinctrl_can_int: canintgrp {
138*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13			0x40>;		/* SODIMM  73 */
1392eba2438SPhilippe Schenker	};
1402eba2438SPhilippe Schenker
1412eba2438SPhilippe Schenker	pinctrl_csi_ctl: csictlgrp {
142*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14		0x20>,		/* SODIMM  77 */
143*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15		0x20>;		/* SODIMM  89 */
1442eba2438SPhilippe Schenker	};
1452eba2438SPhilippe Schenker
1462eba2438SPhilippe Schenker	pinctrl_ext_io0: extio0grp {
147*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08		0x06000040>;	/* SODIMM 135 */
1482eba2438SPhilippe Schenker	};
1492eba2438SPhilippe Schenker
1502eba2438SPhilippe Schenker	/* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
1512eba2438SPhilippe Schenker	pinctrl_fec1: fec1grp {
152*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020>,
153*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020>,
154*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x61>,
155*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT	0x06000061>,
156*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x61>,
157*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x61>,
158*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x61>,
159*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x61>,
160*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x61>,
161*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER	0x61>;
1622eba2438SPhilippe Schenker	};
1632eba2438SPhilippe Schenker
1642eba2438SPhilippe Schenker	pinctrl_fec1_sleep: fec1slpgrp {
165*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11			0x06000041>,
166*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10			0x06000041>,
167*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30		0x41>,
168*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29		0x41>,
169*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31		0x41>,
170*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00		0x41>,
171*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04		0x41>,
172*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05		0x41>,
173*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06		0x41>,
174*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07		0x41>;
1752eba2438SPhilippe Schenker	};
1762eba2438SPhilippe Schenker
1772eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_B RTS/CTS */
1782eba2438SPhilippe Schenker	pinctrl_flexcan1: flexcan0grp {
179*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX		0x21>,		/* SODIMM  32 */
180*7efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX		0x21>;		/* SODIMM  34 */
1812eba2438SPhilippe Schenker	};
1822eba2438SPhilippe Schenker
1832eba2438SPhilippe Schenker	/* Colibri optional CAN on PS2 */
1842eba2438SPhilippe Schenker	pinctrl_flexcan2: flexcan1grp {
185*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX		0x21>,		/* SODIMM  55 */
186*7efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX		0x21>;		/* SODIMM  63 */
1872eba2438SPhilippe Schenker	};
1882eba2438SPhilippe Schenker
1892eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_A TXD/RXD */
1902eba2438SPhilippe Schenker	pinctrl_flexcan3: flexcan2grp {
191*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX		0x21>,		/* SODIMM  35 */
192*7efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX		0x21>;		/* SODIMM  33 */
1932eba2438SPhilippe Schenker	};
1942eba2438SPhilippe Schenker
1952eba2438SPhilippe Schenker	/* Colibri LCD Back-Light GPIO */
1962eba2438SPhilippe Schenker	pinctrl_gpio_bl_on: gpioblongrp {
197*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12		0x60>;		/* SODIMM  71 */
1982eba2438SPhilippe Schenker	};
1992eba2438SPhilippe Schenker
2002eba2438SPhilippe Schenker	pinctrl_gpiokeys: gpiokeysgrp {
201*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10		0x06700041>;	/* SODIMM  45 */
2022eba2438SPhilippe Schenker	};
2032eba2438SPhilippe Schenker
2042eba2438SPhilippe Schenker	pinctrl_hog0: hog0grp {
205*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02		0x06000020>,	/* SODIMM  65 */
206*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D07_CI_PI_D09				0x61>,		/* SODIMM  65 */
207*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11		0x20>,		/* SODIMM  69 */
208*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26			0x20>,		/* SODIMM  79 */
209*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D02_CI_PI_D04				0x61>,		/* SODIMM  79 */
210*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03		0x06000020>,	/* SODIMM  85 */
211*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D06_CI_PI_D08				0x61>,		/* SODIMM  85 */
212*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17			0x20>,		/* SODIMM  95 */
213*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27			0x20>,		/* SODIMM  97 */
214*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D03_CI_PI_D05				0x61>,		/* SODIMM  97 */
215*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18		0x20>,		/* SODIMM  99 */
216*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28			0x20>,		/* SODIMM 101 */
217*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D00_CI_PI_D02				0x61>,		/* SODIMM 101 */
218*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25			0x20>,		/* SODIMM 103 */
219*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D01_CI_PI_D03				0x61>,		/* SODIMM 103 */
220*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19		0x20>,		/* SODIMM 105 */
221*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20		0x20>,		/* SODIMM 107 */
222*7efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05			0x20>,		/* SODIMM 127 */
223*7efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06			0x20>,		/* SODIMM 131 */
224*7efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04			0x20>,		/* SODIMM 133 */
225*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00			0x20>,		/* SODIMM  96 */
226*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21		0x20>,		/* SODIMM  98 */
227*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31			0x20>,		/* SODIMM 100 */
228*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22			0x20>,		/* SODIMM 102 */
229*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23		0x20>,		/* SODIMM 104 */
230*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24		0x20>;		/* SODIMM 106 */
2312eba2438SPhilippe Schenker	};
2322eba2438SPhilippe Schenker
2332eba2438SPhilippe Schenker	pinctrl_hog1: hog1grp {
234*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>,		/* SODIMM  75 */
235*7efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
2362eba2438SPhilippe Schenker	};
2372eba2438SPhilippe Schenker
2382eba2438SPhilippe Schenker	/*
2392eba2438SPhilippe Schenker	 * This pin is used in the SCFW as a UART. Using it from
2402eba2438SPhilippe Schenker	 * Linux would require rewritting the SCFW board file.
2412eba2438SPhilippe Schenker	 */
2422eba2438SPhilippe Schenker	pinctrl_hog_scfw: hogscfwgrp {
243*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03		0x20>;		/* SODIMM 144 */
2442eba2438SPhilippe Schenker	};
2452eba2438SPhilippe Schenker
2462eba2438SPhilippe Schenker	/* On Module I2C */
2472eba2438SPhilippe Schenker	pinctrl_i2c0: i2c0grp {
248*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL		0x06000021>,
249*7efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA		0x06000021>;
2502eba2438SPhilippe Schenker	};
2512eba2438SPhilippe Schenker
2522eba2438SPhilippe Schenker	/* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
2532eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp {
254*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL	0xc6000020>,	/* SODIMM 140 */
255*7efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA	0xc6000020>;	/* SODIMM 142 */
2562eba2438SPhilippe Schenker	};
2572eba2438SPhilippe Schenker
2582eba2438SPhilippe Schenker	/* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
2592eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp {
260*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL	0xc6000020>,	/* SODIMM 186 */
261*7efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA	0xc6000020>;	/* SODIMM 188 */
2622eba2438SPhilippe Schenker	};
2632eba2438SPhilippe Schenker
2642eba2438SPhilippe Schenker	/* Colibri I2C */
2652eba2438SPhilippe Schenker	pinctrl_i2c1: i2c1grp {
266*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL		0x06000021>,	/* SODIMM 196 */
267*7efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA		0x06000021>;	/* SODIMM 194 */
2682eba2438SPhilippe Schenker	};
2692eba2438SPhilippe Schenker
2702eba2438SPhilippe Schenker	/* Colibri Parallel RGB LCD Interface */
2712eba2438SPhilippe Schenker	pinctrl_lcdif: lcdifgrp {
272*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK			0x60>,		/* SODIMM  56 */
273*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC			0x60>,		/* SODIMM  68 */
274*7efa409eSPhilippe Schenker			   <IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC			0x60>,		/* SODIMM  82 */
275*7efa409eSPhilippe Schenker			   <IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN			0x60>,		/* SODIMM  44 */
276*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19		0x60>,		/* SODIMM  44 */
277*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00			0x60>,		/* SODIMM  76 */
278*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21			0x60>,		/* SODIMM  76 */
279*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01			0x60>,		/* SODIMM  70 */
280*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02			0x60>,		/* SODIMM  60 */
281*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03			0x60>,		/* SODIMM  58 */
282*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04			0x60>,		/* SODIMM  78 */
283*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05			0x60>,		/* SODIMM  72 */
284*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06		0x60>,		/* SODIMM  80 */
285*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07		0x60>,		/* SODIMM  46 */
286*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08		0x60>,		/* SODIMM  62 */
287*7efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09		0x60>,		/* SODIMM  48 */
288*7efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10			0x60>,		/* SODIMM  74 */
289*7efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11			0x60>,		/* SODIMM  50 */
290*7efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12		0x60>,		/* SODIMM  52 */
291*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13			0x60>,		/* SODIMM  54 */
292*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14			0x60>,		/* SODIMM  66 */
293*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15			0x60>,		/* SODIMM  64 */
294*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16			0x60>,		/* SODIMM  57 */
295*7efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01		0x60>,		/* SODIMM  57 */
296*7efa409eSPhilippe Schenker			   <IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17			0x60>;		/* SODIMM  61 */
2972eba2438SPhilippe Schenker	};
2982eba2438SPhilippe Schenker
2992eba2438SPhilippe Schenker	/* Colibri SPI */
3002eba2438SPhilippe Schenker	pinctrl_lpspi2: lpspi2grp {
301*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00			0x21>,		/* SODIMM  86 */
302*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO			0x06000040>,	/* SODIMM  92 */
303*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI			0x06000040>,	/* SODIMM  90 */
304*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK			0x06000040>;	/* SODIMM  88 */
3052eba2438SPhilippe Schenker	};
3062eba2438SPhilippe Schenker
3072eba2438SPhilippe Schenker	/* Colibri UART_B */
3082eba2438SPhilippe Schenker	pinctrl_lpuart0: lpuart0grp {
309*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART0_RX_ADMA_UART0_RX			0x06000020>,	/* SODIMM  36 */
310*7efa409eSPhilippe Schenker			   <IMX8QXP_UART0_TX_ADMA_UART0_TX			0x06000020>,	/* SODIMM  38 */
311*7efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B		0x06000020>,	/* SODIMM  34 */
312*7efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B		0x06000020>;	/* SODIMM  32 */
3132eba2438SPhilippe Schenker	};
3142eba2438SPhilippe Schenker
3152eba2438SPhilippe Schenker	/* Colibri UART_C */
3162eba2438SPhilippe Schenker	pinctrl_lpuart2: lpuart2grp {
317*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART2_RX_ADMA_UART2_RX			0x06000020>,	/* SODIMM  19 */
318*7efa409eSPhilippe Schenker			   <IMX8QXP_UART2_TX_ADMA_UART2_TX			0x06000020>;	/* SODIMM  21 */
3192eba2438SPhilippe Schenker	};
3202eba2438SPhilippe Schenker
3212eba2438SPhilippe Schenker	/* Colibri UART_A */
3222eba2438SPhilippe Schenker	pinctrl_lpuart3: lpuart3grp {
323*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX			0x06000020>,	/* SODIMM  33 */
324*7efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX			0x06000020>;	/* SODIMM  35 */
3252eba2438SPhilippe Schenker	};
3262eba2438SPhilippe Schenker
3272eba2438SPhilippe Schenker	/* Colibri UART_A Control */
3282eba2438SPhilippe Schenker	pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
329*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00		0x20>,		/* SODIMM  23 */
330*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29			0x20>,		/* SODIMM  25 */
331*7efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30			0x20>,		/* SODIMM  27 */
332*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03			0x20>,		/* SODIMM  29 */
333*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22			0x20>,		/* SODIMM  31 */
334*7efa409eSPhilippe Schenker			   <IMX8QXP_CSI_EN_LSIO_GPIO3_IO02			0x20>;		/* SODIMM  37 */
3352eba2438SPhilippe Schenker	};
3362eba2438SPhilippe Schenker
3372eba2438SPhilippe Schenker	/* On module wifi module */
3382eba2438SPhilippe Schenker	pinctrl_pcieb: pciebgrp {
339*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01		0x04000061>,	/* SODIMM 178 */
340*7efa409eSPhilippe Schenker			   <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02		0x04000061>,	/* SODIMM  94 */
341*7efa409eSPhilippe Schenker			   <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00		0x60>;		/* SODIMM  81 */
3422eba2438SPhilippe Schenker	};
3432eba2438SPhilippe Schenker
3442eba2438SPhilippe Schenker	/* Colibri PWM_A */
3452eba2438SPhilippe Schenker	pinctrl_pwm_a: pwmagrp {
3462eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D05 */
347*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D05_CI_PI_D07				0x61>,		/* SODIMM  59 */
348*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT			0x60>;		/* SODIMM  59 */
3492eba2438SPhilippe Schenker	};
3502eba2438SPhilippe Schenker
3512eba2438SPhilippe Schenker	/* Colibri PWM_B */
3522eba2438SPhilippe Schenker	pinctrl_pwm_b: pwmbgrp {
353*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_TX_LSIO_PWM0_OUT			0x60>;		/* SODIMM  28 */
3542eba2438SPhilippe Schenker	};
3552eba2438SPhilippe Schenker
3562eba2438SPhilippe Schenker	/* Colibri PWM_C */
3572eba2438SPhilippe Schenker	pinctrl_pwm_c: pwmcgrp {
358*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_RX_LSIO_PWM1_OUT			0x60>;		/* SODIMM  30 */
3592eba2438SPhilippe Schenker	};
3602eba2438SPhilippe Schenker
3612eba2438SPhilippe Schenker	/* Colibri PWM_D */
3622eba2438SPhilippe Schenker	pinctrl_pwm_d: pwmdgrp {
3632eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D04 */
364*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D04_CI_PI_D06				0x61>,		/* SODIMM  67 */
365*7efa409eSPhilippe Schenker			   <IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT			0x60>;		/* SODIMM  67 */
3662eba2438SPhilippe Schenker	};
3672eba2438SPhilippe Schenker
3682eba2438SPhilippe Schenker	/* On-module I2S */
3692eba2438SPhilippe Schenker	pinctrl_sai0: sai0grp {
370*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD			0x06000040>,
371*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD			0x06000040>,
372*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC			0x06000040>,
373*7efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS			0x06000040>;
3742eba2438SPhilippe Schenker	};
3752eba2438SPhilippe Schenker
3762eba2438SPhilippe Schenker	/* Colibri Audio Analogue Microphone GND */
3772eba2438SPhilippe Schenker	pinctrl_sgtl5000: sgtl5000grp {
378*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06		0x41>;
3792eba2438SPhilippe Schenker	};
3802eba2438SPhilippe Schenker
3812eba2438SPhilippe Schenker	/* On-module SGTL5000 clock */
3822eba2438SPhilippe Schenker	pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp {
383*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0			0x21>;
3842eba2438SPhilippe Schenker	};
3852eba2438SPhilippe Schenker
3862eba2438SPhilippe Schenker	/* On-module USB interrupt */
3872eba2438SPhilippe Schenker	pinctrl_usb3503a: usb3503agrp {
388*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04		0x61>;
3892eba2438SPhilippe Schenker	};
3902eba2438SPhilippe Schenker
3912eba2438SPhilippe Schenker	/* Colibri USB Client Cable Detect */
3922eba2438SPhilippe Schenker	pinctrl_usbc_det: usbcdetgrp {
393*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09	0x06000040>;	/* SODIMM 137 */
3942eba2438SPhilippe Schenker	};
3952eba2438SPhilippe Schenker
3962eba2438SPhilippe Schenker	/* USB Host Power Enable */
3972eba2438SPhilippe Schenker	pinctrl_usbh1_reg: usbh1reggrp {
398*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03			0x06000040>;	/* SODIMM 129 */
3992eba2438SPhilippe Schenker	};
4002eba2438SPhilippe Schenker
4012eba2438SPhilippe Schenker	/* On-module eMMC */
4022eba2438SPhilippe Schenker	pinctrl_usdhc1: usdhc1grp {
403*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
404*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
405*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
406*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
407*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
408*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
409*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
410*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
411*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
412*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
413*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
414*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
4152eba2438SPhilippe Schenker	};
4162eba2438SPhilippe Schenker
4172eba2438SPhilippe Schenker	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
418*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
419*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
420*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
421*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
422*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
423*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
424*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
425*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
426*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
427*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
428*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
429*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
4302eba2438SPhilippe Schenker	};
4312eba2438SPhilippe Schenker
4322eba2438SPhilippe Schenker	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
433*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
434*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
435*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
436*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
437*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
438*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
439*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
440*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
441*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
442*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
443*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
444*7efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
4452eba2438SPhilippe Schenker	};
4462eba2438SPhilippe Schenker
4472eba2438SPhilippe Schenker	/* Colibri SD/MMC Card Detect */
4482eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
449*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x06000021>;	/* SODIMM  43 */
4502eba2438SPhilippe Schenker	};
4512eba2438SPhilippe Schenker
4522eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
453*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x60>;		/* SODIMM  43 */
4542eba2438SPhilippe Schenker	};
4552eba2438SPhilippe Schenker
4562eba2438SPhilippe Schenker	/* Colibri SD/MMC Card */
4572eba2438SPhilippe Schenker	pinctrl_usdhc2: usdhc2grp {
458*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
459*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
460*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
461*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
462*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
463*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
464*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
4652eba2438SPhilippe Schenker	};
4662eba2438SPhilippe Schenker
4672eba2438SPhilippe Schenker	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
468*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
469*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
470*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
471*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
472*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
473*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
474*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
4752eba2438SPhilippe Schenker	};
4762eba2438SPhilippe Schenker
4772eba2438SPhilippe Schenker	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
478*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
479*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
480*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
481*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
482*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
483*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
484*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
4852eba2438SPhilippe Schenker	};
4862eba2438SPhilippe Schenker
4872eba2438SPhilippe Schenker	pinctrl_usdhc2_sleep: usdhc2slpgrp {
488*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23			0x60>,		/* SODIMM  47 */
489*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24			0x60>,		/* SODIMM 190 */
490*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25		0x60>,		/* SODIMM 192 */
491*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26		0x60>,		/* SODIMM  49 */
492*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27		0x60>,		/* SODIMM  51 */
493*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28		0x60>,		/* SODIMM  53 */
494*7efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
4952eba2438SPhilippe Schenker	};
4962eba2438SPhilippe Schenker
4972eba2438SPhilippe Schenker	pinctrl_wifi: wifigrp {
498*7efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20>;
4992eba2438SPhilippe Schenker	};
5002eba2438SPhilippe Schenker};
501