1e8f7a387SPhilippe Schenker// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
22eba2438SPhilippe Schenker/*
32eba2438SPhilippe Schenker * Copyright 2019 Toradex
42eba2438SPhilippe Schenker */
52eba2438SPhilippe Schenker
62eba2438SPhilippe Schenker/ {
72eba2438SPhilippe Schenker	chosen {
82eba2438SPhilippe Schenker		stdout-path = &lpuart3;
92eba2438SPhilippe Schenker	};
102eba2438SPhilippe Schenker
112eba2438SPhilippe Schenker	reg_module_3v3: regulator-module-3v3 {
122eba2438SPhilippe Schenker		compatible = "regulator-fixed";
132eba2438SPhilippe Schenker		regulator-name = "+V3.3";
142eba2438SPhilippe Schenker		regulator-min-microvolt = <3300000>;
152eba2438SPhilippe Schenker		regulator-max-microvolt = <3300000>;
162eba2438SPhilippe Schenker	};
172eba2438SPhilippe Schenker};
182eba2438SPhilippe Schenker
192eba2438SPhilippe Schenker/* On-module I2C */
202eba2438SPhilippe Schenker&i2c0 {
212eba2438SPhilippe Schenker	#address-cells = <1>;
222eba2438SPhilippe Schenker	#size-cells = <0>;
232eba2438SPhilippe Schenker	clock-frequency = <100000>;
242eba2438SPhilippe Schenker	pinctrl-names = "default";
252eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
262eba2438SPhilippe Schenker	status = "okay";
272eba2438SPhilippe Schenker
282eba2438SPhilippe Schenker	/* Touch controller */
292eba2438SPhilippe Schenker	touchscreen@2c {
302eba2438SPhilippe Schenker		compatible = "adi,ad7879-1";
312eba2438SPhilippe Schenker		pinctrl-names = "default";
322eba2438SPhilippe Schenker		pinctrl-0 = <&pinctrl_ad7879_int>;
332eba2438SPhilippe Schenker		reg = <0x2c>;
342eba2438SPhilippe Schenker		interrupt-parent = <&lsio_gpio3>;
352eba2438SPhilippe Schenker		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
362eba2438SPhilippe Schenker		touchscreen-max-pressure = <4096>;
372eba2438SPhilippe Schenker		adi,resistance-plate-x = <120>;
382eba2438SPhilippe Schenker		adi,first-conversion-delay = /bits/ 8 <3>;
392eba2438SPhilippe Schenker		adi,acquisition-time = /bits/ 8 <1>;
402eba2438SPhilippe Schenker		adi,median-filter-size = /bits/ 8 <2>;
412eba2438SPhilippe Schenker		adi,averaging = /bits/ 8 <1>;
422eba2438SPhilippe Schenker		adi,conversion-interval = /bits/ 8 <255>;
432eba2438SPhilippe Schenker	};
442eba2438SPhilippe Schenker};
452eba2438SPhilippe Schenker
462eba2438SPhilippe Schenker/* Colibri I2C */
472eba2438SPhilippe Schenker&i2c1 {
482eba2438SPhilippe Schenker	#address-cells = <1>;
492eba2438SPhilippe Schenker	#size-cells = <0>;
502eba2438SPhilippe Schenker	clock-frequency = <100000>;
512eba2438SPhilippe Schenker	pinctrl-names = "default";
522eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c1>;
532eba2438SPhilippe Schenker};
542eba2438SPhilippe Schenker
552eba2438SPhilippe Schenker/* Colibri UART_B */
562eba2438SPhilippe Schenker&lpuart0 {
572eba2438SPhilippe Schenker	pinctrl-names = "default";
582eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart0>;
592eba2438SPhilippe Schenker};
602eba2438SPhilippe Schenker
612eba2438SPhilippe Schenker/* Colibri UART_C */
622eba2438SPhilippe Schenker&lpuart2 {
632eba2438SPhilippe Schenker	pinctrl-names = "default";
642eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart2>;
652eba2438SPhilippe Schenker};
662eba2438SPhilippe Schenker
672eba2438SPhilippe Schenker/* Colibri UART_A */
682eba2438SPhilippe Schenker&lpuart3 {
692eba2438SPhilippe Schenker	pinctrl-names = "default";
702eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
712eba2438SPhilippe Schenker};
722eba2438SPhilippe Schenker
732eba2438SPhilippe Schenker/* Colibri FastEthernet */
742eba2438SPhilippe Schenker&fec1 {
752eba2438SPhilippe Schenker	pinctrl-names = "default", "sleep";
762eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_fec1>;
772eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_fec1_sleep>;
782eba2438SPhilippe Schenker	phy-mode = "rmii";
792eba2438SPhilippe Schenker	phy-handle = <&ethphy0>;
802eba2438SPhilippe Schenker	fsl,magic-packet;
812eba2438SPhilippe Schenker
822eba2438SPhilippe Schenker	mdio {
832eba2438SPhilippe Schenker		#address-cells = <1>;
842eba2438SPhilippe Schenker		#size-cells = <0>;
852eba2438SPhilippe Schenker
862eba2438SPhilippe Schenker		ethphy0: ethernet-phy@2 {
872eba2438SPhilippe Schenker			compatible = "ethernet-phy-ieee802.3-c22";
882eba2438SPhilippe Schenker			max-speed = <100>;
892eba2438SPhilippe Schenker			reg = <2>;
902eba2438SPhilippe Schenker		};
912eba2438SPhilippe Schenker	};
922eba2438SPhilippe Schenker};
932eba2438SPhilippe Schenker
94a537c961SPhilippe Schenker/* Colibri SPI */
95a537c961SPhilippe Schenker&lpspi2 {
96a537c961SPhilippe Schenker	pinctrl-names = "default";
97a537c961SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpspi2>;
98a537c961SPhilippe Schenker	cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
99a537c961SPhilippe Schenker};
100a537c961SPhilippe Schenker
101*55164802SPhilippe Schenker&lsio_gpio0 {
102*55164802SPhilippe Schenker	gpio-line-names = "",
103*55164802SPhilippe Schenker			  "SODIMM_70",
104*55164802SPhilippe Schenker			  "SODIMM_60",
105*55164802SPhilippe Schenker			  "SODIMM_58",
106*55164802SPhilippe Schenker			  "SODIMM_78",
107*55164802SPhilippe Schenker			  "SODIMM_72",
108*55164802SPhilippe Schenker			  "SODIMM_80",
109*55164802SPhilippe Schenker			  "SODIMM_46",
110*55164802SPhilippe Schenker			  "SODIMM_62",
111*55164802SPhilippe Schenker			  "SODIMM_48",
112*55164802SPhilippe Schenker			  "SODIMM_74",
113*55164802SPhilippe Schenker			  "SODIMM_50",
114*55164802SPhilippe Schenker			  "SODIMM_52",
115*55164802SPhilippe Schenker			  "SODIMM_54",
116*55164802SPhilippe Schenker			  "SODIMM_66",
117*55164802SPhilippe Schenker			  "SODIMM_64",
118*55164802SPhilippe Schenker			  "SODIMM_68",
119*55164802SPhilippe Schenker			  "",
120*55164802SPhilippe Schenker			  "",
121*55164802SPhilippe Schenker			  "SODIMM_82",
122*55164802SPhilippe Schenker			  "SODIMM_56",
123*55164802SPhilippe Schenker			  "SODIMM_28",
124*55164802SPhilippe Schenker			  "SODIMM_30",
125*55164802SPhilippe Schenker			  "",
126*55164802SPhilippe Schenker			  "SODIMM_61",
127*55164802SPhilippe Schenker			  "SODIMM_103",
128*55164802SPhilippe Schenker			  "",
129*55164802SPhilippe Schenker			  "",
130*55164802SPhilippe Schenker			  "",
131*55164802SPhilippe Schenker			  "SODIMM_25",
132*55164802SPhilippe Schenker			  "SODIMM_27",
133*55164802SPhilippe Schenker			  "SODIMM_100";
134*55164802SPhilippe Schenker};
135*55164802SPhilippe Schenker
136*55164802SPhilippe Schenker&lsio_gpio1 {
137*55164802SPhilippe Schenker	gpio-line-names = "SODIMM_86",
138*55164802SPhilippe Schenker			  "SODIMM_92",
139*55164802SPhilippe Schenker			  "SODIMM_90",
140*55164802SPhilippe Schenker			  "SODIMM_88",
141*55164802SPhilippe Schenker			  "",
142*55164802SPhilippe Schenker			  "",
143*55164802SPhilippe Schenker			  "",
144*55164802SPhilippe Schenker			  "SODIMM_59",
145*55164802SPhilippe Schenker			  "",
146*55164802SPhilippe Schenker			  "SODIMM_6",
147*55164802SPhilippe Schenker			  "SODIMM_8",
148*55164802SPhilippe Schenker			  "",
149*55164802SPhilippe Schenker			  "",
150*55164802SPhilippe Schenker			  "SODIMM_2",
151*55164802SPhilippe Schenker			  "SODIMM_4",
152*55164802SPhilippe Schenker			  "SODIMM_34",
153*55164802SPhilippe Schenker			  "SODIMM_32",
154*55164802SPhilippe Schenker			  "SODIMM_63",
155*55164802SPhilippe Schenker			  "SODIMM_55",
156*55164802SPhilippe Schenker			  "SODIMM_33",
157*55164802SPhilippe Schenker			  "SODIMM_35",
158*55164802SPhilippe Schenker			  "SODIMM_36",
159*55164802SPhilippe Schenker			  "SODIMM_38",
160*55164802SPhilippe Schenker			  "SODIMM_21",
161*55164802SPhilippe Schenker			  "SODIMM_19",
162*55164802SPhilippe Schenker			  "SODIMM_140",
163*55164802SPhilippe Schenker			  "SODIMM_142",
164*55164802SPhilippe Schenker			  "SODIMM_196",
165*55164802SPhilippe Schenker			  "SODIMM_194",
166*55164802SPhilippe Schenker			  "SODIMM_186",
167*55164802SPhilippe Schenker			  "SODIMM_188",
168*55164802SPhilippe Schenker			  "SODIMM_138";
169*55164802SPhilippe Schenker};
170*55164802SPhilippe Schenker
171*55164802SPhilippe Schenker&lsio_gpio2 {
172*55164802SPhilippe Schenker	gpio-line-names = "SODIMM_23",
173*55164802SPhilippe Schenker			  "",
174*55164802SPhilippe Schenker			  "",
175*55164802SPhilippe Schenker			  "SODIMM_144";
176*55164802SPhilippe Schenker};
177*55164802SPhilippe Schenker
178*55164802SPhilippe Schenker&lsio_gpio3 {
179*55164802SPhilippe Schenker	gpio-line-names = "SODIMM_96",
180*55164802SPhilippe Schenker			  "SODIMM_75",
181*55164802SPhilippe Schenker			  "SODIMM_37",
182*55164802SPhilippe Schenker			  "SODIMM_29",
183*55164802SPhilippe Schenker			  "",
184*55164802SPhilippe Schenker			  "",
185*55164802SPhilippe Schenker			  "",
186*55164802SPhilippe Schenker			  "",
187*55164802SPhilippe Schenker			  "",
188*55164802SPhilippe Schenker			  "SODIMM_43",
189*55164802SPhilippe Schenker			  "SODIMM_45",
190*55164802SPhilippe Schenker			  "SODIMM_69",
191*55164802SPhilippe Schenker			  "SODIMM_71",
192*55164802SPhilippe Schenker			  "SODIMM_73",
193*55164802SPhilippe Schenker			  "SODIMM_77",
194*55164802SPhilippe Schenker			  "SODIMM_89",
195*55164802SPhilippe Schenker			  "SODIMM_93",
196*55164802SPhilippe Schenker			  "SODIMM_95",
197*55164802SPhilippe Schenker			  "SODIMM_99",
198*55164802SPhilippe Schenker			  "SODIMM_105",
199*55164802SPhilippe Schenker			  "SODIMM_107",
200*55164802SPhilippe Schenker			  "SODIMM_98",
201*55164802SPhilippe Schenker			  "SODIMM_102",
202*55164802SPhilippe Schenker			  "SODIMM_104",
203*55164802SPhilippe Schenker			  "SODIMM_106";
204*55164802SPhilippe Schenker};
205*55164802SPhilippe Schenker
206*55164802SPhilippe Schenker&lsio_gpio4 {
207*55164802SPhilippe Schenker	gpio-line-names = "",
208*55164802SPhilippe Schenker			  "",
209*55164802SPhilippe Schenker			  "",
210*55164802SPhilippe Schenker			  "SODIMM_129",
211*55164802SPhilippe Schenker			  "SODIMM_133",
212*55164802SPhilippe Schenker			  "SODIMM_127",
213*55164802SPhilippe Schenker			  "SODIMM_131",
214*55164802SPhilippe Schenker			  "",
215*55164802SPhilippe Schenker			  "",
216*55164802SPhilippe Schenker			  "",
217*55164802SPhilippe Schenker			  "",
218*55164802SPhilippe Schenker			  "",
219*55164802SPhilippe Schenker			  "",
220*55164802SPhilippe Schenker			  "",
221*55164802SPhilippe Schenker			  "",
222*55164802SPhilippe Schenker			  "",
223*55164802SPhilippe Schenker			  "",
224*55164802SPhilippe Schenker			  "",
225*55164802SPhilippe Schenker			  "",
226*55164802SPhilippe Schenker			  "SODIMM_44",
227*55164802SPhilippe Schenker			  "",
228*55164802SPhilippe Schenker			  "SODIMM_76",
229*55164802SPhilippe Schenker			  "SODIMM_31",
230*55164802SPhilippe Schenker			  "SODIMM_47",
231*55164802SPhilippe Schenker			  "SODIMM_190",
232*55164802SPhilippe Schenker			  "SODIMM_192",
233*55164802SPhilippe Schenker			  "SODIMM_49",
234*55164802SPhilippe Schenker			  "SODIMM_51",
235*55164802SPhilippe Schenker			  "SODIMM_53";
236*55164802SPhilippe Schenker};
237*55164802SPhilippe Schenker
238*55164802SPhilippe Schenker&lsio_gpio5 {
239*55164802SPhilippe Schenker	gpio-line-names = "",
240*55164802SPhilippe Schenker			  "SODIMM_57",
241*55164802SPhilippe Schenker			  "SODIMM_65",
242*55164802SPhilippe Schenker			  "SODIMM_85",
243*55164802SPhilippe Schenker			  "",
244*55164802SPhilippe Schenker			  "",
245*55164802SPhilippe Schenker			  "",
246*55164802SPhilippe Schenker			  "",
247*55164802SPhilippe Schenker			  "SODIMM_135",
248*55164802SPhilippe Schenker			  "SODIMM_137",
249*55164802SPhilippe Schenker			  "UNUSABLE_SODIMM_180",
250*55164802SPhilippe Schenker			  "UNUSABLE_SODIMM_184";
251*55164802SPhilippe Schenker};
252*55164802SPhilippe Schenker
2532eba2438SPhilippe Schenker/* On-module eMMC */
2542eba2438SPhilippe Schenker&usdhc1 {
2552eba2438SPhilippe Schenker	bus-width = <8>;
2562eba2438SPhilippe Schenker	non-removable;
2572eba2438SPhilippe Schenker	no-sd;
2582eba2438SPhilippe Schenker	no-sdio;
2592eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz";
2602eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc1>;
2612eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
2622eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
2632eba2438SPhilippe Schenker	status = "okay";
2642eba2438SPhilippe Schenker};
2652eba2438SPhilippe Schenker
2662eba2438SPhilippe Schenker/* Colibri SD/MMC Card */
2672eba2438SPhilippe Schenker&usdhc2 {
2682eba2438SPhilippe Schenker	bus-width = <4>;
2692eba2438SPhilippe Schenker	cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
2702eba2438SPhilippe Schenker	vmmc-supply = <&reg_module_3v3>;
2712eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
2722eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
2732eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
2742eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
2752eba2438SPhilippe Schenker	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
2762eba2438SPhilippe Schenker	disable-wp;
2772eba2438SPhilippe Schenker};
2782eba2438SPhilippe Schenker
2792eba2438SPhilippe Schenker&iomuxc {
2802eba2438SPhilippe Schenker	pinctrl-names = "default";
2814d2adf73SPhilippe Schenker	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
2827171ec29SPhilippe Schenker		    <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
2832eba2438SPhilippe Schenker
2842eba2438SPhilippe Schenker	/* On-module touch pen-down interrupt */
2852eba2438SPhilippe Schenker	pinctrl_ad7879_int: ad7879intgrp {
2867efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05	0x21>;
2872eba2438SPhilippe Schenker	};
2882eba2438SPhilippe Schenker
2892eba2438SPhilippe Schenker	/* Colibri Analogue Inputs */
2902eba2438SPhilippe Schenker	pinctrl_adc0: adc0grp {
2917efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ADC_IN0_ADMA_ADC_IN0			0x60>,		/* SODIMM   8 */
2927efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN1_ADMA_ADC_IN1			0x60>,		/* SODIMM   6 */
2937efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN4_ADMA_ADC_IN4			0x60>,		/* SODIMM   4 */
2947efa409eSPhilippe Schenker			   <IMX8QXP_ADC_IN5_ADMA_ADC_IN5			0x60>;		/* SODIMM   2 */
2952eba2438SPhilippe Schenker	};
2962eba2438SPhilippe Schenker
2977ece3cbcSPhilippe Schenker	/* Atmel MXT touchsceen + Capacitive Touch Adapter */
2987ece3cbcSPhilippe Schenker	/* NOTE: This pingroup conflicts with pingroups
2997ece3cbcSPhilippe Schenker	 * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them
3007ece3cbcSPhilippe Schenker	 * simultaneously.
3017ece3cbcSPhilippe Schenker	 */
3027ece3cbcSPhilippe Schenker	pinctrl_atmel_adap: atmeladaptergrp {
3037ece3cbcSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_RX_LSIO_GPIO0_IO22			0x21>,		/* SODIMM  30 */
3047ece3cbcSPhilippe Schenker			   <IMX8QXP_UART1_TX_LSIO_GPIO0_IO21			0x4000021>;	/* SODIMM  28 */
3057ece3cbcSPhilippe Schenker	};
3067ece3cbcSPhilippe Schenker
3077ece3cbcSPhilippe Schenker	/* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
3087ece3cbcSPhilippe Schenker	pinctrl_atmel_conn: atmelconnectorgrp {
3097ece3cbcSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20		0x4000021>,	/* SODIMM 107 */
3107ece3cbcSPhilippe Schenker			   <IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24		0x21>;		/* SODIMM 106 */
3117ece3cbcSPhilippe Schenker	};
3127ece3cbcSPhilippe Schenker
3132eba2438SPhilippe Schenker	pinctrl_can_int: canintgrp {
3147efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13			0x40>;		/* SODIMM  73 */
3152eba2438SPhilippe Schenker	};
3162eba2438SPhilippe Schenker
3172eba2438SPhilippe Schenker	pinctrl_csi_ctl: csictlgrp {
3187efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14		0x20>,		/* SODIMM  77 */
3197efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15		0x20>;		/* SODIMM  89 */
3202eba2438SPhilippe Schenker	};
3212eba2438SPhilippe Schenker
3225e634a90SPhilippe Schenker	pinctrl_csi_mclk: csimclkgrp {
3235e634a90SPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK				0xC0000041>;	/* SODIMM  75 / X3-12 */
3245e634a90SPhilippe Schenker	};
3255e634a90SPhilippe Schenker
3262eba2438SPhilippe Schenker	pinctrl_ext_io0: extio0grp {
3277efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08		0x06000040>;	/* SODIMM 135 */
3282eba2438SPhilippe Schenker	};
3292eba2438SPhilippe Schenker
3302eba2438SPhilippe Schenker	/* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
3312eba2438SPhilippe Schenker	pinctrl_fec1: fec1grp {
3327efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020>,
3337efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020>,
3347efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x61>,
3357efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT	0x06000061>,
3367efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x61>,
3377efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x61>,
3387efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x61>,
3397efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x61>,
3407efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x61>,
3417efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER	0x61>;
3422eba2438SPhilippe Schenker	};
3432eba2438SPhilippe Schenker
3442eba2438SPhilippe Schenker	pinctrl_fec1_sleep: fec1slpgrp {
3457efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11			0x06000041>,
3467efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10			0x06000041>,
3477efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30		0x41>,
3487efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29		0x41>,
3497efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31		0x41>,
3507efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00		0x41>,
3517efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04		0x41>,
3527efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05		0x41>,
3537efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06		0x41>,
3547efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07		0x41>;
3552eba2438SPhilippe Schenker	};
3562eba2438SPhilippe Schenker
3572eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_B RTS/CTS */
3582eba2438SPhilippe Schenker	pinctrl_flexcan1: flexcan0grp {
3597efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX		0x21>,		/* SODIMM  32 */
3607efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX		0x21>;		/* SODIMM  34 */
3612eba2438SPhilippe Schenker	};
3622eba2438SPhilippe Schenker
3632eba2438SPhilippe Schenker	/* Colibri optional CAN on PS2 */
3642eba2438SPhilippe Schenker	pinctrl_flexcan2: flexcan1grp {
3657efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX		0x21>,		/* SODIMM  55 */
3667efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX		0x21>;		/* SODIMM  63 */
3672eba2438SPhilippe Schenker	};
3682eba2438SPhilippe Schenker
3692eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_A TXD/RXD */
3702eba2438SPhilippe Schenker	pinctrl_flexcan3: flexcan2grp {
3717efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX		0x21>,		/* SODIMM  35 */
3727efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX		0x21>;		/* SODIMM  33 */
3732eba2438SPhilippe Schenker	};
3742eba2438SPhilippe Schenker
3752eba2438SPhilippe Schenker	/* Colibri LCD Back-Light GPIO */
3762eba2438SPhilippe Schenker	pinctrl_gpio_bl_on: gpioblongrp {
3777efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12		0x60>;		/* SODIMM  71 */
3782eba2438SPhilippe Schenker	};
3792eba2438SPhilippe Schenker
3809c279d21SPhilippe Schenker	/* HDMI Hot Plug Detect on FFC (X2) */
3819c279d21SPhilippe Schenker	pinctrl_gpio_hpd: gpiohpdgrp {
3829c279d21SPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31		0x20>;		/* SODIMM 138 */
3839c279d21SPhilippe Schenker	};
3849c279d21SPhilippe Schenker
3852eba2438SPhilippe Schenker	pinctrl_gpiokeys: gpiokeysgrp {
3867efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10		0x06700041>;	/* SODIMM  45 */
3872eba2438SPhilippe Schenker	};
3882eba2438SPhilippe Schenker
3892eba2438SPhilippe Schenker	pinctrl_hog0: hog0grp {
3907171ec29SPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D07_CI_PI_D09				0x61>,		/* SODIMM  65 */
3917efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11		0x20>,		/* SODIMM  69 */
3927efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26			0x20>,		/* SODIMM  79 */
3937efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D02_CI_PI_D04				0x61>,		/* SODIMM  79 */
3947efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03		0x06000020>,	/* SODIMM  85 */
3957efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D06_CI_PI_D08				0x61>,		/* SODIMM  85 */
3967efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17			0x20>,		/* SODIMM  95 */
3977efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27			0x20>,		/* SODIMM  97 */
3987efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D03_CI_PI_D05				0x61>,		/* SODIMM  97 */
3997efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18		0x20>,		/* SODIMM  99 */
4007efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28			0x20>,		/* SODIMM 101 */
4017efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D00_CI_PI_D02				0x61>,		/* SODIMM 101 */
4027efa409eSPhilippe Schenker			   <IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25			0x20>,		/* SODIMM 103 */
4037efa409eSPhilippe Schenker			   <IMX8QXP_CSI_D01_CI_PI_D03				0x61>,		/* SODIMM 103 */
4047efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19		0x20>,		/* SODIMM 105 */
4057efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05			0x20>,		/* SODIMM 127 */
4067efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06			0x20>,		/* SODIMM 131 */
4077efa409eSPhilippe Schenker			   <IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04			0x20>,		/* SODIMM 133 */
4087efa409eSPhilippe Schenker			   <IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00			0x20>,		/* SODIMM  96 */
4097efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21		0x20>,		/* SODIMM  98 */
4107efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31			0x20>,		/* SODIMM 100 */
4117efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22			0x20>,		/* SODIMM 102 */
4127ece3cbcSPhilippe Schenker			   <IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23		0x20>;		/* SODIMM 104 */
4132eba2438SPhilippe Schenker	};
4142eba2438SPhilippe Schenker
4152eba2438SPhilippe Schenker	pinctrl_hog1: hog1grp {
4167efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>,		/* SODIMM  75 */
4177efa409eSPhilippe Schenker			   <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
4182eba2438SPhilippe Schenker	};
4192eba2438SPhilippe Schenker
4204d2adf73SPhilippe Schenker	pinctrl_hog2: hog2grp {
4214d2adf73SPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>;		/* SODIMM  75 */
4224d2adf73SPhilippe Schenker	};
4234d2adf73SPhilippe Schenker
4242eba2438SPhilippe Schenker	/*
4252eba2438SPhilippe Schenker	 * This pin is used in the SCFW as a UART. Using it from
4262eba2438SPhilippe Schenker	 * Linux would require rewritting the SCFW board file.
4272eba2438SPhilippe Schenker	 */
4282eba2438SPhilippe Schenker	pinctrl_hog_scfw: hogscfwgrp {
4297efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03		0x20>;		/* SODIMM 144 */
4302eba2438SPhilippe Schenker	};
4312eba2438SPhilippe Schenker
4322eba2438SPhilippe Schenker	/* On Module I2C */
4332eba2438SPhilippe Schenker	pinctrl_i2c0: i2c0grp {
4347efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL		0x06000021>,
4357efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA		0x06000021>;
4362eba2438SPhilippe Schenker	};
4372eba2438SPhilippe Schenker
4382eba2438SPhilippe Schenker	/* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
4392eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp {
4407efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL	0xc6000020>,	/* SODIMM 140 */
4417efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA	0xc6000020>;	/* SODIMM 142 */
4422eba2438SPhilippe Schenker	};
4432eba2438SPhilippe Schenker
4442eba2438SPhilippe Schenker	/* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
4452eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp {
4467efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL	0xc6000020>,	/* SODIMM 186 */
4477efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA	0xc6000020>;	/* SODIMM 188 */
4482eba2438SPhilippe Schenker	};
4492eba2438SPhilippe Schenker
4502eba2438SPhilippe Schenker	/* Colibri I2C */
4512eba2438SPhilippe Schenker	pinctrl_i2c1: i2c1grp {
4527efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL		0x06000021>,	/* SODIMM 196 */
4537efa409eSPhilippe Schenker			   <IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA		0x06000021>;	/* SODIMM 194 */
4542eba2438SPhilippe Schenker	};
4552eba2438SPhilippe Schenker
4562eba2438SPhilippe Schenker	/* Colibri Parallel RGB LCD Interface */
4572eba2438SPhilippe Schenker	pinctrl_lcdif: lcdifgrp {
4587efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK			0x60>,		/* SODIMM  56 */
4597efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC			0x60>,		/* SODIMM  68 */
4607efa409eSPhilippe Schenker			   <IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC			0x60>,		/* SODIMM  82 */
461bd74f83dSPhilippe Schenker			   <IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN			0x40>,		/* SODIMM  44 */
462bd74f83dSPhilippe Schenker			   <IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19		0x40>,		/* SODIMM  44 */
4637efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00			0x60>,		/* SODIMM  76 */
4647efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21			0x60>,		/* SODIMM  76 */
4657efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01			0x60>,		/* SODIMM  70 */
4667efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02			0x60>,		/* SODIMM  60 */
4677efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03			0x60>,		/* SODIMM  58 */
4687efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04			0x60>,		/* SODIMM  78 */
4697efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05			0x60>,		/* SODIMM  72 */
4707efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06		0x60>,		/* SODIMM  80 */
4717efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07		0x60>,		/* SODIMM  46 */
4727efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08		0x60>,		/* SODIMM  62 */
4737efa409eSPhilippe Schenker			   <IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09		0x60>,		/* SODIMM  48 */
4747efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10			0x60>,		/* SODIMM  74 */
4757efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11			0x60>,		/* SODIMM  50 */
4767efa409eSPhilippe Schenker			   <IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12		0x60>,		/* SODIMM  52 */
4777efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13			0x60>,		/* SODIMM  54 */
4787efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14			0x60>,		/* SODIMM  66 */
4797efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15			0x60>,		/* SODIMM  64 */
4807efa409eSPhilippe Schenker			   <IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16			0x60>,		/* SODIMM  57 */
4817efa409eSPhilippe Schenker			   <IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01		0x60>,		/* SODIMM  57 */
4827efa409eSPhilippe Schenker			   <IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17			0x60>;		/* SODIMM  61 */
4832eba2438SPhilippe Schenker	};
4842eba2438SPhilippe Schenker
4852eba2438SPhilippe Schenker	/* Colibri SPI */
4862eba2438SPhilippe Schenker	pinctrl_lpspi2: lpspi2grp {
4877efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00			0x21>,		/* SODIMM  86 */
4887efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO			0x06000040>,	/* SODIMM  92 */
4897efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI			0x06000040>,	/* SODIMM  90 */
4907efa409eSPhilippe Schenker			   <IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK			0x06000040>;	/* SODIMM  88 */
4912eba2438SPhilippe Schenker	};
4922eba2438SPhilippe Schenker
4937171ec29SPhilippe Schenker	pinctrl_lpspi2_cs2: lpspi2cs2grp {
4947171ec29SPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02		0x21>;		/* SODIMM  65 */
4957171ec29SPhilippe Schenker	};
4967171ec29SPhilippe Schenker
4972eba2438SPhilippe Schenker	/* Colibri UART_B */
4982eba2438SPhilippe Schenker	pinctrl_lpuart0: lpuart0grp {
4997efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART0_RX_ADMA_UART0_RX			0x06000020>,	/* SODIMM  36 */
5007efa409eSPhilippe Schenker			   <IMX8QXP_UART0_TX_ADMA_UART0_TX			0x06000020>,	/* SODIMM  38 */
5017efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B		0x06000020>,	/* SODIMM  34 */
5027efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B		0x06000020>;	/* SODIMM  32 */
5032eba2438SPhilippe Schenker	};
5042eba2438SPhilippe Schenker
5052eba2438SPhilippe Schenker	/* Colibri UART_C */
5062eba2438SPhilippe Schenker	pinctrl_lpuart2: lpuart2grp {
5077efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART2_RX_ADMA_UART2_RX			0x06000020>,	/* SODIMM  19 */
5087efa409eSPhilippe Schenker			   <IMX8QXP_UART2_TX_ADMA_UART2_TX			0x06000020>;	/* SODIMM  21 */
5092eba2438SPhilippe Schenker	};
5102eba2438SPhilippe Schenker
5112eba2438SPhilippe Schenker	/* Colibri UART_A */
5122eba2438SPhilippe Schenker	pinctrl_lpuart3: lpuart3grp {
5137efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX			0x06000020>,	/* SODIMM  33 */
5147efa409eSPhilippe Schenker			   <IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX			0x06000020>;	/* SODIMM  35 */
5152eba2438SPhilippe Schenker	};
5162eba2438SPhilippe Schenker
5172eba2438SPhilippe Schenker	/* Colibri UART_A Control */
5182eba2438SPhilippe Schenker	pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
5197efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00		0x20>,		/* SODIMM  23 */
5207efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29			0x20>,		/* SODIMM  25 */
5217efa409eSPhilippe Schenker			   <IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30			0x20>,		/* SODIMM  27 */
5227efa409eSPhilippe Schenker			   <IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03			0x20>,		/* SODIMM  29 */
5237efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22			0x20>,		/* SODIMM  31 */
5247efa409eSPhilippe Schenker			   <IMX8QXP_CSI_EN_LSIO_GPIO3_IO02			0x20>;		/* SODIMM  37 */
5252eba2438SPhilippe Schenker	};
5262eba2438SPhilippe Schenker
5272eba2438SPhilippe Schenker	/* On module wifi module */
5282eba2438SPhilippe Schenker	pinctrl_pcieb: pciebgrp {
5297efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01		0x04000061>,	/* SODIMM 178 */
5307efa409eSPhilippe Schenker			   <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02		0x04000061>,	/* SODIMM  94 */
5317efa409eSPhilippe Schenker			   <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00		0x60>;		/* SODIMM  81 */
5322eba2438SPhilippe Schenker	};
5332eba2438SPhilippe Schenker
5342eba2438SPhilippe Schenker	/* Colibri PWM_A */
5352eba2438SPhilippe Schenker	pinctrl_pwm_a: pwmagrp {
5362eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D05 */
5377efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D05_CI_PI_D07				0x61>,		/* SODIMM  59 */
5387efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT			0x60>;		/* SODIMM  59 */
5392eba2438SPhilippe Schenker	};
5402eba2438SPhilippe Schenker
5412eba2438SPhilippe Schenker	/* Colibri PWM_B */
5422eba2438SPhilippe Schenker	pinctrl_pwm_b: pwmbgrp {
5437efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_TX_LSIO_PWM0_OUT			0x60>;		/* SODIMM  28 */
5442eba2438SPhilippe Schenker	};
5452eba2438SPhilippe Schenker
5462eba2438SPhilippe Schenker	/* Colibri PWM_C */
5472eba2438SPhilippe Schenker	pinctrl_pwm_c: pwmcgrp {
5487efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_UART1_RX_LSIO_PWM1_OUT			0x60>;		/* SODIMM  30 */
5492eba2438SPhilippe Schenker	};
5502eba2438SPhilippe Schenker
5512eba2438SPhilippe Schenker	/* Colibri PWM_D */
5522eba2438SPhilippe Schenker	pinctrl_pwm_d: pwmdgrp {
5532eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D04 */
5547efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_CSI_D04_CI_PI_D06				0x61>,		/* SODIMM  67 */
5557efa409eSPhilippe Schenker			   <IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT			0x60>;		/* SODIMM  67 */
5562eba2438SPhilippe Schenker	};
5572eba2438SPhilippe Schenker
5582eba2438SPhilippe Schenker	/* On-module I2S */
5592eba2438SPhilippe Schenker	pinctrl_sai0: sai0grp {
5607efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD			0x06000040>,
5617efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD			0x06000040>,
5627efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC			0x06000040>,
5637efa409eSPhilippe Schenker			   <IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS			0x06000040>;
5642eba2438SPhilippe Schenker	};
5652eba2438SPhilippe Schenker
5662eba2438SPhilippe Schenker	/* Colibri Audio Analogue Microphone GND */
5672eba2438SPhilippe Schenker	pinctrl_sgtl5000: sgtl5000grp {
5687efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06		0x41>;
5692eba2438SPhilippe Schenker	};
5702eba2438SPhilippe Schenker
5712eba2438SPhilippe Schenker	/* On-module SGTL5000 clock */
5722eba2438SPhilippe Schenker	pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp {
5737efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0			0x21>;
5742eba2438SPhilippe Schenker	};
5752eba2438SPhilippe Schenker
5762eba2438SPhilippe Schenker	/* On-module USB interrupt */
5772eba2438SPhilippe Schenker	pinctrl_usb3503a: usb3503agrp {
5787efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04		0x61>;
5792eba2438SPhilippe Schenker	};
5802eba2438SPhilippe Schenker
5812eba2438SPhilippe Schenker	/* Colibri USB Client Cable Detect */
5822eba2438SPhilippe Schenker	pinctrl_usbc_det: usbcdetgrp {
5837efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09	0x06000040>;	/* SODIMM 137 */
5842eba2438SPhilippe Schenker	};
5852eba2438SPhilippe Schenker
5862eba2438SPhilippe Schenker	/* USB Host Power Enable */
5872eba2438SPhilippe Schenker	pinctrl_usbh1_reg: usbh1reggrp {
5887efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03			0x06000040>;	/* SODIMM 129 */
5892eba2438SPhilippe Schenker	};
5902eba2438SPhilippe Schenker
5912eba2438SPhilippe Schenker	/* On-module eMMC */
5922eba2438SPhilippe Schenker	pinctrl_usdhc1: usdhc1grp {
5937efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
5947efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
5957efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
5967efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
5977efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
5987efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
5997efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
6007efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
6017efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
6027efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
6037efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
6047efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
6052eba2438SPhilippe Schenker	};
6062eba2438SPhilippe Schenker
6072eba2438SPhilippe Schenker	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
6087efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
6097efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
6107efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
6117efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
6127efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
6137efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
6147efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
6157efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
6167efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
6177efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
6187efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
6197efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
6202eba2438SPhilippe Schenker	};
6212eba2438SPhilippe Schenker
6222eba2438SPhilippe Schenker	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
6237efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
6247efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x21>,
6257efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21>,
6267efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21>,
6277efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21>,
6287efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21>,
6297efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21>,
6307efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21>,
6317efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21>,
6327efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21>,
6337efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41>,
6347efa409eSPhilippe Schenker			   <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x21>;
6352eba2438SPhilippe Schenker	};
6362eba2438SPhilippe Schenker
6372eba2438SPhilippe Schenker	/* Colibri SD/MMC Card Detect */
6382eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
6397efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x06000021>;	/* SODIMM  43 */
6402eba2438SPhilippe Schenker	};
6412eba2438SPhilippe Schenker
6422eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
6437efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x60>;		/* SODIMM  43 */
6442eba2438SPhilippe Schenker	};
6452eba2438SPhilippe Schenker
6462eba2438SPhilippe Schenker	/* Colibri SD/MMC Card */
6472eba2438SPhilippe Schenker	pinctrl_usdhc2: usdhc2grp {
6487efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
6497efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
6507efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
6517efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
6527efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
6537efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
6547efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
6552eba2438SPhilippe Schenker	};
6562eba2438SPhilippe Schenker
6572eba2438SPhilippe Schenker	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
6587efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
6597efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
6607efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
6617efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
6627efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
6637efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
6647efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
6652eba2438SPhilippe Schenker	};
6662eba2438SPhilippe Schenker
6672eba2438SPhilippe Schenker	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
6687efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,	/* SODIMM  47 */
6697efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x21>,		/* SODIMM 190 */
6707efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21>,		/* SODIMM 192 */
6717efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21>,		/* SODIMM  49 */
6727efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21>,		/* SODIMM  51 */
6737efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21>,		/* SODIMM  53 */
6747efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
6752eba2438SPhilippe Schenker	};
6762eba2438SPhilippe Schenker
6772eba2438SPhilippe Schenker	pinctrl_usdhc2_sleep: usdhc2slpgrp {
6787efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23			0x60>,		/* SODIMM  47 */
6797efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24			0x60>,		/* SODIMM 190 */
6807efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25		0x60>,		/* SODIMM 192 */
6817efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26		0x60>,		/* SODIMM  49 */
6827efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27		0x60>,		/* SODIMM  51 */
6837efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28		0x60>,		/* SODIMM  53 */
6847efa409eSPhilippe Schenker			   <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x21>;
6852eba2438SPhilippe Schenker	};
6862eba2438SPhilippe Schenker
6872eba2438SPhilippe Schenker	pinctrl_wifi: wifigrp {
6887efa409eSPhilippe Schenker		fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20>;
6892eba2438SPhilippe Schenker	};
6902eba2438SPhilippe Schenker};
691