1*2eba2438SPhilippe Schenker// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*2eba2438SPhilippe Schenker/*
3*2eba2438SPhilippe Schenker * Copyright 2019 Toradex
4*2eba2438SPhilippe Schenker */
5*2eba2438SPhilippe Schenker
6*2eba2438SPhilippe Schenker/ {
7*2eba2438SPhilippe Schenker	chosen {
8*2eba2438SPhilippe Schenker		stdout-path = &lpuart3;
9*2eba2438SPhilippe Schenker	};
10*2eba2438SPhilippe Schenker
11*2eba2438SPhilippe Schenker	reg_module_3v3: regulator-module-3v3 {
12*2eba2438SPhilippe Schenker		compatible = "regulator-fixed";
13*2eba2438SPhilippe Schenker		regulator-name = "+V3.3";
14*2eba2438SPhilippe Schenker		regulator-min-microvolt = <3300000>;
15*2eba2438SPhilippe Schenker		regulator-max-microvolt = <3300000>;
16*2eba2438SPhilippe Schenker	};
17*2eba2438SPhilippe Schenker};
18*2eba2438SPhilippe Schenker
19*2eba2438SPhilippe Schenker/* On-module I2C */
20*2eba2438SPhilippe Schenker&i2c0 {
21*2eba2438SPhilippe Schenker	#address-cells = <1>;
22*2eba2438SPhilippe Schenker	#size-cells = <0>;
23*2eba2438SPhilippe Schenker	clock-frequency = <100000>;
24*2eba2438SPhilippe Schenker	pinctrl-names = "default";
25*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
26*2eba2438SPhilippe Schenker	status = "okay";
27*2eba2438SPhilippe Schenker
28*2eba2438SPhilippe Schenker	/* Touch controller */
29*2eba2438SPhilippe Schenker	touchscreen@2c {
30*2eba2438SPhilippe Schenker		compatible = "adi,ad7879-1";
31*2eba2438SPhilippe Schenker		pinctrl-names = "default";
32*2eba2438SPhilippe Schenker		pinctrl-0 = <&pinctrl_ad7879_int>;
33*2eba2438SPhilippe Schenker		reg = <0x2c>;
34*2eba2438SPhilippe Schenker		interrupt-parent = <&lsio_gpio3>;
35*2eba2438SPhilippe Schenker		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
36*2eba2438SPhilippe Schenker		touchscreen-max-pressure = <4096>;
37*2eba2438SPhilippe Schenker		adi,resistance-plate-x = <120>;
38*2eba2438SPhilippe Schenker		adi,first-conversion-delay = /bits/ 8 <3>;
39*2eba2438SPhilippe Schenker		adi,acquisition-time = /bits/ 8 <1>;
40*2eba2438SPhilippe Schenker		adi,median-filter-size = /bits/ 8 <2>;
41*2eba2438SPhilippe Schenker		adi,averaging = /bits/ 8 <1>;
42*2eba2438SPhilippe Schenker		adi,conversion-interval = /bits/ 8 <255>;
43*2eba2438SPhilippe Schenker	};
44*2eba2438SPhilippe Schenker};
45*2eba2438SPhilippe Schenker
46*2eba2438SPhilippe Schenker/* Colibri I2C */
47*2eba2438SPhilippe Schenker&i2c1 {
48*2eba2438SPhilippe Schenker	#address-cells = <1>;
49*2eba2438SPhilippe Schenker	#size-cells = <0>;
50*2eba2438SPhilippe Schenker	clock-frequency = <100000>;
51*2eba2438SPhilippe Schenker	pinctrl-names = "default";
52*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_i2c1>;
53*2eba2438SPhilippe Schenker};
54*2eba2438SPhilippe Schenker
55*2eba2438SPhilippe Schenker/* Colibri UART_B */
56*2eba2438SPhilippe Schenker&lpuart0 {
57*2eba2438SPhilippe Schenker	pinctrl-names = "default";
58*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart0>;
59*2eba2438SPhilippe Schenker};
60*2eba2438SPhilippe Schenker
61*2eba2438SPhilippe Schenker/* Colibri UART_C */
62*2eba2438SPhilippe Schenker&lpuart2 {
63*2eba2438SPhilippe Schenker	pinctrl-names = "default";
64*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart2>;
65*2eba2438SPhilippe Schenker};
66*2eba2438SPhilippe Schenker
67*2eba2438SPhilippe Schenker/* Colibri UART_A */
68*2eba2438SPhilippe Schenker&lpuart3 {
69*2eba2438SPhilippe Schenker	pinctrl-names = "default";
70*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
71*2eba2438SPhilippe Schenker};
72*2eba2438SPhilippe Schenker
73*2eba2438SPhilippe Schenker/* Colibri FastEthernet */
74*2eba2438SPhilippe Schenker&fec1 {
75*2eba2438SPhilippe Schenker	pinctrl-names = "default", "sleep";
76*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_fec1>;
77*2eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_fec1_sleep>;
78*2eba2438SPhilippe Schenker	phy-mode = "rmii";
79*2eba2438SPhilippe Schenker	phy-handle = <&ethphy0>;
80*2eba2438SPhilippe Schenker	fsl,magic-packet;
81*2eba2438SPhilippe Schenker
82*2eba2438SPhilippe Schenker	mdio {
83*2eba2438SPhilippe Schenker		#address-cells = <1>;
84*2eba2438SPhilippe Schenker		#size-cells = <0>;
85*2eba2438SPhilippe Schenker
86*2eba2438SPhilippe Schenker		ethphy0: ethernet-phy@2 {
87*2eba2438SPhilippe Schenker			compatible = "ethernet-phy-ieee802.3-c22";
88*2eba2438SPhilippe Schenker			max-speed = <100>;
89*2eba2438SPhilippe Schenker			reg = <2>;
90*2eba2438SPhilippe Schenker		};
91*2eba2438SPhilippe Schenker	};
92*2eba2438SPhilippe Schenker};
93*2eba2438SPhilippe Schenker
94*2eba2438SPhilippe Schenker/* On-module eMMC */
95*2eba2438SPhilippe Schenker&usdhc1 {
96*2eba2438SPhilippe Schenker	bus-width = <8>;
97*2eba2438SPhilippe Schenker	non-removable;
98*2eba2438SPhilippe Schenker	no-sd;
99*2eba2438SPhilippe Schenker	no-sdio;
100*2eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz";
101*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc1>;
102*2eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
103*2eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
104*2eba2438SPhilippe Schenker	status = "okay";
105*2eba2438SPhilippe Schenker};
106*2eba2438SPhilippe Schenker
107*2eba2438SPhilippe Schenker/* Colibri SD/MMC Card */
108*2eba2438SPhilippe Schenker&usdhc2 {
109*2eba2438SPhilippe Schenker	bus-width = <4>;
110*2eba2438SPhilippe Schenker	cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
111*2eba2438SPhilippe Schenker	vmmc-supply = <&reg_module_3v3>;
112*2eba2438SPhilippe Schenker	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
113*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
114*2eba2438SPhilippe Schenker	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
115*2eba2438SPhilippe Schenker	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
116*2eba2438SPhilippe Schenker	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
117*2eba2438SPhilippe Schenker	disable-wp;
118*2eba2438SPhilippe Schenker};
119*2eba2438SPhilippe Schenker
120*2eba2438SPhilippe Schenker&iomuxc {
121*2eba2438SPhilippe Schenker	pinctrl-names = "default";
122*2eba2438SPhilippe Schenker	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>;
123*2eba2438SPhilippe Schenker
124*2eba2438SPhilippe Schenker	/* On-module touch pen-down interrupt */
125*2eba2438SPhilippe Schenker	pinctrl_ad7879_int: ad7879intgrp {
126*2eba2438SPhilippe Schenker		fsl,pins = <
127*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05	0x21
128*2eba2438SPhilippe Schenker		>;
129*2eba2438SPhilippe Schenker	};
130*2eba2438SPhilippe Schenker
131*2eba2438SPhilippe Schenker	/* Colibri Analogue Inputs */
132*2eba2438SPhilippe Schenker	pinctrl_adc0: adc0grp {
133*2eba2438SPhilippe Schenker		fsl,pins = <
134*2eba2438SPhilippe Schenker			IMX8QXP_ADC_IN0_ADMA_ADC_IN0			0x60		/* SODIMM   8 */
135*2eba2438SPhilippe Schenker			IMX8QXP_ADC_IN1_ADMA_ADC_IN1			0x60		/* SODIMM   6 */
136*2eba2438SPhilippe Schenker			IMX8QXP_ADC_IN4_ADMA_ADC_IN4			0x60		/* SODIMM   4 */
137*2eba2438SPhilippe Schenker			IMX8QXP_ADC_IN5_ADMA_ADC_IN5			0x60		/* SODIMM   2 */
138*2eba2438SPhilippe Schenker		>;
139*2eba2438SPhilippe Schenker	};
140*2eba2438SPhilippe Schenker
141*2eba2438SPhilippe Schenker	pinctrl_can_int: canintgrp {
142*2eba2438SPhilippe Schenker		fsl,pins = <
143*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13		0x40		/* SODIMM  73 */
144*2eba2438SPhilippe Schenker		>;
145*2eba2438SPhilippe Schenker	};
146*2eba2438SPhilippe Schenker
147*2eba2438SPhilippe Schenker	pinctrl_csi_ctl: csictlgrp {
148*2eba2438SPhilippe Schenker		fsl,pins = <
149*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14		0x20		/* SODIMM  77 */
150*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15		0x20		/* SODIMM  89 */
151*2eba2438SPhilippe Schenker		>;
152*2eba2438SPhilippe Schenker	};
153*2eba2438SPhilippe Schenker
154*2eba2438SPhilippe Schenker	pinctrl_ext_io0: extio0grp {
155*2eba2438SPhilippe Schenker		fsl,pins = <
156*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08	0x06000040	/* SODIMM 135 */
157*2eba2438SPhilippe Schenker		>;
158*2eba2438SPhilippe Schenker	};
159*2eba2438SPhilippe Schenker
160*2eba2438SPhilippe Schenker	/* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
161*2eba2438SPhilippe Schenker	pinctrl_fec1: fec1grp {
162*2eba2438SPhilippe Schenker		fsl,pins = <
163*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020
164*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
165*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x61
166*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT		0x06000061
167*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0		0x61
168*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1		0x61
169*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x61
170*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0		0x61
171*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1		0x61
172*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER		0x61
173*2eba2438SPhilippe Schenker		>;
174*2eba2438SPhilippe Schenker	};
175*2eba2438SPhilippe Schenker
176*2eba2438SPhilippe Schenker	pinctrl_fec1_sleep: fec1slpgrp {
177*2eba2438SPhilippe Schenker		fsl,pins = <
178*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11		0x06000041
179*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10		0x06000041
180*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30	0x41
181*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29		0x41
182*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31	0x41
183*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00	0x41
184*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04	0x41
185*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05	0x41
186*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06	0x41
187*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07	0x41
188*2eba2438SPhilippe Schenker		>;
189*2eba2438SPhilippe Schenker	};
190*2eba2438SPhilippe Schenker
191*2eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_B RTS/CTS */
192*2eba2438SPhilippe Schenker	pinctrl_flexcan1: flexcan0grp {
193*2eba2438SPhilippe Schenker		fsl,pins = <
194*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX		0x21		/* SODIMM  32 */
195*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX		0x21		/* SODIMM  34 */
196*2eba2438SPhilippe Schenker		>;
197*2eba2438SPhilippe Schenker	};
198*2eba2438SPhilippe Schenker
199*2eba2438SPhilippe Schenker	/* Colibri optional CAN on PS2 */
200*2eba2438SPhilippe Schenker	pinctrl_flexcan2: flexcan1grp {
201*2eba2438SPhilippe Schenker		fsl,pins = <
202*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX		0x21		/* SODIMM  55 */
203*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX		0x21		/* SODIMM  63 */
204*2eba2438SPhilippe Schenker		>;
205*2eba2438SPhilippe Schenker	};
206*2eba2438SPhilippe Schenker
207*2eba2438SPhilippe Schenker	/* Colibri optional CAN on UART_A TXD/RXD */
208*2eba2438SPhilippe Schenker	pinctrl_flexcan3: flexcan2grp {
209*2eba2438SPhilippe Schenker		fsl,pins = <
210*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX		0x21		/* SODIMM  35 */
211*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX		0x21		/* SODIMM  33 */
212*2eba2438SPhilippe Schenker		>;
213*2eba2438SPhilippe Schenker	};
214*2eba2438SPhilippe Schenker
215*2eba2438SPhilippe Schenker	/* Colibri LCD Back-Light GPIO */
216*2eba2438SPhilippe Schenker	pinctrl_gpio_bl_on: gpioblongrp {
217*2eba2438SPhilippe Schenker		fsl,pins = <
218*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12		0x60		/* SODIMM  71 */
219*2eba2438SPhilippe Schenker		>;
220*2eba2438SPhilippe Schenker	};
221*2eba2438SPhilippe Schenker
222*2eba2438SPhilippe Schenker	pinctrl_gpiokeys: gpiokeysgrp {
223*2eba2438SPhilippe Schenker		fsl,pins = <
224*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10		0x06700041	/* SODIMM  45 */
225*2eba2438SPhilippe Schenker		>;
226*2eba2438SPhilippe Schenker	};
227*2eba2438SPhilippe Schenker
228*2eba2438SPhilippe Schenker	pinctrl_hog0: hog0grp {
229*2eba2438SPhilippe Schenker		fsl,pins = <
230*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02	0x06000020	/* SODIMM  65 */
231*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D07_CI_PI_D09			0x61		/* SODIMM  65 */
232*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11		0x20		/* SODIMM  69 */
233*2eba2438SPhilippe Schenker			IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20		/* SODIMM  79 */
234*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D02_CI_PI_D04			0x61		/* SODIMM  79 */
235*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03		0x06000020	/* SODIMM  85 */
236*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D06_CI_PI_D08			0x61		/* SODIMM  85 */
237*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17		0x20		/* SODIMM  95 */
238*2eba2438SPhilippe Schenker			IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27		0x20		/* SODIMM  97 */
239*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D03_CI_PI_D05			0x61		/* SODIMM  97 */
240*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18		0x20		/* SODIMM  99 */
241*2eba2438SPhilippe Schenker			IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28		0x20		/* SODIMM 101 */
242*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D00_CI_PI_D02			0x61		/* SODIMM 101 */
243*2eba2438SPhilippe Schenker			IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25		0x20		/* SODIMM 103 */
244*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D01_CI_PI_D03			0x61		/* SODIMM 103 */
245*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19		0x20		/* SODIMM 105 */
246*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20		0x20		/* SODIMM 107 */
247*2eba2438SPhilippe Schenker			IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05		0x20		/* SODIMM 127 */
248*2eba2438SPhilippe Schenker			IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06		0x20		/* SODIMM 131 */
249*2eba2438SPhilippe Schenker			IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04		0x20		/* SODIMM 133 */
250*2eba2438SPhilippe Schenker			IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00		0x20		/* SODIMM  96 */
251*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21		0x20		/* SODIMM  98 */
252*2eba2438SPhilippe Schenker			IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31		0x20		/* SODIMM 100 */
253*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22		0x20		/* SODIMM 102 */
254*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23		0x20		/* SODIMM 104 */
255*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24		0x20		/* SODIMM 106 */
256*2eba2438SPhilippe Schenker		>;
257*2eba2438SPhilippe Schenker	};
258*2eba2438SPhilippe Schenker
259*2eba2438SPhilippe Schenker	pinctrl_hog1: hog1grp {
260*2eba2438SPhilippe Schenker		fsl,pins = <
261*2eba2438SPhilippe Schenker			IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01		0x20		/* SODIMM  75 */
262*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16		0x20		/* SODIMM  93 */
263*2eba2438SPhilippe Schenker		>;
264*2eba2438SPhilippe Schenker	};
265*2eba2438SPhilippe Schenker
266*2eba2438SPhilippe Schenker	/*
267*2eba2438SPhilippe Schenker	 * This pin is used in the SCFW as a UART. Using it from
268*2eba2438SPhilippe Schenker	 * Linux would require rewritting the SCFW board file.
269*2eba2438SPhilippe Schenker	 */
270*2eba2438SPhilippe Schenker	pinctrl_hog_scfw: hogscfwgrp {
271*2eba2438SPhilippe Schenker		fsl,pins = <
272*2eba2438SPhilippe Schenker			IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03		0x20		/* SODIMM 144 */
273*2eba2438SPhilippe Schenker		>;
274*2eba2438SPhilippe Schenker	};
275*2eba2438SPhilippe Schenker
276*2eba2438SPhilippe Schenker	/* On Module I2C */
277*2eba2438SPhilippe Schenker	pinctrl_i2c0: i2c0grp {
278*2eba2438SPhilippe Schenker		fsl,pins = <
279*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL	0x06000021
280*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA	0x06000021
281*2eba2438SPhilippe Schenker		>;
282*2eba2438SPhilippe Schenker	};
283*2eba2438SPhilippe Schenker
284*2eba2438SPhilippe Schenker	/* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
285*2eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp {
286*2eba2438SPhilippe Schenker		fsl,pins = <
287*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL	0xc6000020	/* SODIMM 140 */
288*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA	0xc6000020	/* SODIMM 142 */
289*2eba2438SPhilippe Schenker		>;
290*2eba2438SPhilippe Schenker	};
291*2eba2438SPhilippe Schenker
292*2eba2438SPhilippe Schenker	/* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
293*2eba2438SPhilippe Schenker	pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp {
294*2eba2438SPhilippe Schenker		fsl,pins = <
295*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL	0xc6000020	/* SODIMM 186 */
296*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA	0xc6000020	/* SODIMM 188 */
297*2eba2438SPhilippe Schenker		>;
298*2eba2438SPhilippe Schenker	};
299*2eba2438SPhilippe Schenker
300*2eba2438SPhilippe Schenker	/* Colibri I2C */
301*2eba2438SPhilippe Schenker	pinctrl_i2c1: i2c1grp {
302*2eba2438SPhilippe Schenker		fsl,pins = <
303*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL	0x06000021	/* SODIMM 196 */
304*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA	0x06000021	/* SODIMM 194 */
305*2eba2438SPhilippe Schenker		>;
306*2eba2438SPhilippe Schenker	};
307*2eba2438SPhilippe Schenker
308*2eba2438SPhilippe Schenker	/* Colibri Parallel RGB LCD Interface */
309*2eba2438SPhilippe Schenker	pinctrl_lcdif: lcdifgrp {
310*2eba2438SPhilippe Schenker		fsl,pins = <
311*2eba2438SPhilippe Schenker			IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK		0x60		/* SODIMM  56 */
312*2eba2438SPhilippe Schenker			IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC		0x60		/* SODIMM  68 */
313*2eba2438SPhilippe Schenker			IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC		0x60		/* SODIMM  82 */
314*2eba2438SPhilippe Schenker			IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN			0x60		/* SODIMM  44 */
315*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19		0x60		/* SODIMM  44 */
316*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00		0x60		/* SODIMM  76 */
317*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21		0x60		/* SODIMM  76 */
318*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01		0x60		/* SODIMM  70 */
319*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02		0x60		/* SODIMM  60 */
320*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03		0x60		/* SODIMM  58 */
321*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04		0x60		/* SODIMM  78 */
322*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05		0x60		/* SODIMM  72 */
323*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06		0x60		/* SODIMM  80 */
324*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07		0x60		/* SODIMM  46 */
325*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08		0x60		/* SODIMM  62 */
326*2eba2438SPhilippe Schenker			IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09		0x60		/* SODIMM  48 */
327*2eba2438SPhilippe Schenker			IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10		0x60		/* SODIMM  74 */
328*2eba2438SPhilippe Schenker			IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11		0x60		/* SODIMM  50 */
329*2eba2438SPhilippe Schenker			IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12		0x60		/* SODIMM  52 */
330*2eba2438SPhilippe Schenker			IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13			0x60		/* SODIMM  54 */
331*2eba2438SPhilippe Schenker			IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14			0x60		/* SODIMM  66 */
332*2eba2438SPhilippe Schenker			IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15			0x60		/* SODIMM  64 */
333*2eba2438SPhilippe Schenker			IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16			0x60		/* SODIMM  57 */
334*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01	0x60		/* SODIMM  57 */
335*2eba2438SPhilippe Schenker			IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17		0x60		/* SODIMM  61 */
336*2eba2438SPhilippe Schenker		>;
337*2eba2438SPhilippe Schenker	};
338*2eba2438SPhilippe Schenker
339*2eba2438SPhilippe Schenker	/* Colibri SPI */
340*2eba2438SPhilippe Schenker	pinctrl_lpspi2: lpspi2grp {
341*2eba2438SPhilippe Schenker		fsl,pins = <
342*2eba2438SPhilippe Schenker			IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00		0x21		/* SODIMM  86 */
343*2eba2438SPhilippe Schenker			IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO			0x06000040	/* SODIMM  92 */
344*2eba2438SPhilippe Schenker			IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI			0x06000040	/* SODIMM  90 */
345*2eba2438SPhilippe Schenker			IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK			0x06000040	/* SODIMM  88 */
346*2eba2438SPhilippe Schenker		>;
347*2eba2438SPhilippe Schenker	};
348*2eba2438SPhilippe Schenker
349*2eba2438SPhilippe Schenker	/* Colibri UART_B */
350*2eba2438SPhilippe Schenker	pinctrl_lpuart0: lpuart0grp {
351*2eba2438SPhilippe Schenker		fsl,pins = <
352*2eba2438SPhilippe Schenker			IMX8QXP_UART0_RX_ADMA_UART0_RX			0x06000020	/* SODIMM  36 */
353*2eba2438SPhilippe Schenker			IMX8QXP_UART0_TX_ADMA_UART0_TX			0x06000020	/* SODIMM  38 */
354*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B		0x06000020	/* SODIMM  34 */
355*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B		0x06000020	/* SODIMM  32 */
356*2eba2438SPhilippe Schenker		>;
357*2eba2438SPhilippe Schenker	};
358*2eba2438SPhilippe Schenker
359*2eba2438SPhilippe Schenker	/* Colibri UART_C */
360*2eba2438SPhilippe Schenker	pinctrl_lpuart2: lpuart2grp {
361*2eba2438SPhilippe Schenker		fsl,pins = <
362*2eba2438SPhilippe Schenker			IMX8QXP_UART2_RX_ADMA_UART2_RX			0x06000020	/* SODIMM  19 */
363*2eba2438SPhilippe Schenker			IMX8QXP_UART2_TX_ADMA_UART2_TX			0x06000020	/* SODIMM  21 */
364*2eba2438SPhilippe Schenker		>;
365*2eba2438SPhilippe Schenker	};
366*2eba2438SPhilippe Schenker
367*2eba2438SPhilippe Schenker	/* Colibri UART_A */
368*2eba2438SPhilippe Schenker	pinctrl_lpuart3: lpuart3grp {
369*2eba2438SPhilippe Schenker		fsl,pins = <
370*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX		0x06000020	/* SODIMM  33 */
371*2eba2438SPhilippe Schenker			IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX		0x06000020	/* SODIMM  35 */
372*2eba2438SPhilippe Schenker		>;
373*2eba2438SPhilippe Schenker	};
374*2eba2438SPhilippe Schenker
375*2eba2438SPhilippe Schenker	/* Colibri UART_A Control */
376*2eba2438SPhilippe Schenker	pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
377*2eba2438SPhilippe Schenker		fsl,pins = <
378*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00	0x20		/* SODIMM  23 */
379*2eba2438SPhilippe Schenker			IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29		0x20		/* SODIMM  25 */
380*2eba2438SPhilippe Schenker			IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30		0x20		/* SODIMM  27 */
381*2eba2438SPhilippe Schenker			IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03		0x20		/* SODIMM  29 */
382*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22		0x20		/* SODIMM  31 */
383*2eba2438SPhilippe Schenker			IMX8QXP_CSI_EN_LSIO_GPIO3_IO02			0x20		/* SODIMM  37 */
384*2eba2438SPhilippe Schenker		>;
385*2eba2438SPhilippe Schenker	};
386*2eba2438SPhilippe Schenker
387*2eba2438SPhilippe Schenker	/* On module wifi module */
388*2eba2438SPhilippe Schenker	pinctrl_pcieb: pciebgrp {
389*2eba2438SPhilippe Schenker		fsl,pins = <
390*2eba2438SPhilippe Schenker			IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01	0x04000061	/* SODIMM 178 */
391*2eba2438SPhilippe Schenker			IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02	0x04000061	/* SODIMM  94 */
392*2eba2438SPhilippe Schenker			IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00	0x60		/* SODIMM  81 */
393*2eba2438SPhilippe Schenker		>;
394*2eba2438SPhilippe Schenker	};
395*2eba2438SPhilippe Schenker
396*2eba2438SPhilippe Schenker	/* Colibri PWM_A */
397*2eba2438SPhilippe Schenker	pinctrl_pwm_a: pwmagrp {
398*2eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D05 */
399*2eba2438SPhilippe Schenker		fsl,pins = <
400*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D05_CI_PI_D07			0x61		/* SODIMM  59 */
401*2eba2438SPhilippe Schenker			IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT		0x60		/* SODIMM  59 */
402*2eba2438SPhilippe Schenker		>;
403*2eba2438SPhilippe Schenker	};
404*2eba2438SPhilippe Schenker
405*2eba2438SPhilippe Schenker	/* Colibri PWM_B */
406*2eba2438SPhilippe Schenker	pinctrl_pwm_b: pwmbgrp {
407*2eba2438SPhilippe Schenker		fsl,pins = <
408*2eba2438SPhilippe Schenker			IMX8QXP_UART1_TX_LSIO_PWM0_OUT			0x60		/* SODIMM  28 */
409*2eba2438SPhilippe Schenker		>;
410*2eba2438SPhilippe Schenker	};
411*2eba2438SPhilippe Schenker
412*2eba2438SPhilippe Schenker	/* Colibri PWM_C */
413*2eba2438SPhilippe Schenker	pinctrl_pwm_c: pwmcgrp {
414*2eba2438SPhilippe Schenker		fsl,pins = <
415*2eba2438SPhilippe Schenker			IMX8QXP_UART1_RX_LSIO_PWM1_OUT			0x60		/* SODIMM  30 */
416*2eba2438SPhilippe Schenker		>;
417*2eba2438SPhilippe Schenker	};
418*2eba2438SPhilippe Schenker
419*2eba2438SPhilippe Schenker	/* Colibri PWM_D */
420*2eba2438SPhilippe Schenker	pinctrl_pwm_d: pwmdgrp {
421*2eba2438SPhilippe Schenker	/* both pins are connected together, reserve the unused CSI_D04 */
422*2eba2438SPhilippe Schenker		fsl,pins = <
423*2eba2438SPhilippe Schenker			IMX8QXP_CSI_D04_CI_PI_D06			0x61		/* SODIMM  67 */
424*2eba2438SPhilippe Schenker			IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT		0x60		/* SODIMM  67 */
425*2eba2438SPhilippe Schenker		>;
426*2eba2438SPhilippe Schenker	};
427*2eba2438SPhilippe Schenker
428*2eba2438SPhilippe Schenker	/* On-module I2S */
429*2eba2438SPhilippe Schenker	pinctrl_sai0: sai0grp {
430*2eba2438SPhilippe Schenker		fsl,pins = <
431*2eba2438SPhilippe Schenker			IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD			0x06000040
432*2eba2438SPhilippe Schenker			IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD			0x06000040
433*2eba2438SPhilippe Schenker			IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC			0x06000040
434*2eba2438SPhilippe Schenker			IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS			0x06000040
435*2eba2438SPhilippe Schenker		>;
436*2eba2438SPhilippe Schenker	};
437*2eba2438SPhilippe Schenker
438*2eba2438SPhilippe Schenker	/* Colibri Audio Analogue Microphone GND */
439*2eba2438SPhilippe Schenker	pinctrl_sgtl5000: sgtl5000grp {
440*2eba2438SPhilippe Schenker		fsl,pins = <
441*2eba2438SPhilippe Schenker			/* MIC GND EN */
442*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06	0x41
443*2eba2438SPhilippe Schenker		>;
444*2eba2438SPhilippe Schenker	};
445*2eba2438SPhilippe Schenker
446*2eba2438SPhilippe Schenker	/* On-module SGTL5000 clock */
447*2eba2438SPhilippe Schenker	pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp {
448*2eba2438SPhilippe Schenker		fsl,pins = <
449*2eba2438SPhilippe Schenker			IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0		0x21
450*2eba2438SPhilippe Schenker		>;
451*2eba2438SPhilippe Schenker	};
452*2eba2438SPhilippe Schenker
453*2eba2438SPhilippe Schenker	/* On-module USB interrupt */
454*2eba2438SPhilippe Schenker	pinctrl_usb3503a: usb3503agrp {
455*2eba2438SPhilippe Schenker		fsl,pins = <
456*2eba2438SPhilippe Schenker			IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04	0x61
457*2eba2438SPhilippe Schenker		>;
458*2eba2438SPhilippe Schenker	};
459*2eba2438SPhilippe Schenker
460*2eba2438SPhilippe Schenker	/* Colibri USB Client Cable Detect */
461*2eba2438SPhilippe Schenker	pinctrl_usbc_det: usbcdetgrp {
462*2eba2438SPhilippe Schenker		fsl,pins = <
463*2eba2438SPhilippe Schenker			IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09	0x06000040	/* SODIMM 137 */
464*2eba2438SPhilippe Schenker		>;
465*2eba2438SPhilippe Schenker	};
466*2eba2438SPhilippe Schenker
467*2eba2438SPhilippe Schenker	/* USB Host Power Enable */
468*2eba2438SPhilippe Schenker	pinctrl_usbh1_reg: usbh1reggrp {
469*2eba2438SPhilippe Schenker		fsl,pins = <
470*2eba2438SPhilippe Schenker			IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03		0x06000040	/* SODIMM 129 */
471*2eba2438SPhilippe Schenker		>;
472*2eba2438SPhilippe Schenker	};
473*2eba2438SPhilippe Schenker
474*2eba2438SPhilippe Schenker	/* On-module eMMC */
475*2eba2438SPhilippe Schenker	pinctrl_usdhc1: usdhc1grp {
476*2eba2438SPhilippe Schenker		fsl,pins = <
477*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
478*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x21
479*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21
480*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21
481*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21
482*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21
483*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21
484*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21
485*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21
486*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21
487*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41
488*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x21
489*2eba2438SPhilippe Schenker		>;
490*2eba2438SPhilippe Schenker	};
491*2eba2438SPhilippe Schenker
492*2eba2438SPhilippe Schenker	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
493*2eba2438SPhilippe Schenker		fsl,pins = <
494*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
495*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x21
496*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21
497*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21
498*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21
499*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21
500*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21
501*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21
502*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21
503*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21
504*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41
505*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x21
506*2eba2438SPhilippe Schenker		>;
507*2eba2438SPhilippe Schenker	};
508*2eba2438SPhilippe Schenker
509*2eba2438SPhilippe Schenker	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
510*2eba2438SPhilippe Schenker		fsl,pins = <
511*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
512*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x21
513*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21
514*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21
515*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21
516*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21
517*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21
518*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21
519*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21
520*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21
521*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41
522*2eba2438SPhilippe Schenker			IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x21
523*2eba2438SPhilippe Schenker		>;
524*2eba2438SPhilippe Schenker	};
525*2eba2438SPhilippe Schenker
526*2eba2438SPhilippe Schenker	/* Colibri SD/MMC Card Detect */
527*2eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
528*2eba2438SPhilippe Schenker		fsl,pins = <
529*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x06000021	/* SODIMM  43 */
530*2eba2438SPhilippe Schenker		>;
531*2eba2438SPhilippe Schenker	};
532*2eba2438SPhilippe Schenker
533*2eba2438SPhilippe Schenker	pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
534*2eba2438SPhilippe Schenker		fsl,pins = <
535*2eba2438SPhilippe Schenker			IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x60		/* SODIMM  43 */
536*2eba2438SPhilippe Schenker		>;
537*2eba2438SPhilippe Schenker	};
538*2eba2438SPhilippe Schenker
539*2eba2438SPhilippe Schenker	/* Colibri SD/MMC Card */
540*2eba2438SPhilippe Schenker	pinctrl_usdhc2: usdhc2grp {
541*2eba2438SPhilippe Schenker		fsl,pins = <
542*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041	/* SODIMM  47 */
543*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x21		/* SODIMM 190 */
544*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21		/* SODIMM 192 */
545*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21		/* SODIMM  49 */
546*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21		/* SODIMM  51 */
547*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21		/* SODIMM  53 */
548*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
549*2eba2438SPhilippe Schenker		>;
550*2eba2438SPhilippe Schenker	};
551*2eba2438SPhilippe Schenker
552*2eba2438SPhilippe Schenker	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
553*2eba2438SPhilippe Schenker		fsl,pins = <
554*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041	/* SODIMM  47 */
555*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x21		/* SODIMM 190 */
556*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21		/* SODIMM 192 */
557*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21		/* SODIMM  49 */
558*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21		/* SODIMM  51 */
559*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21		/* SODIMM  53 */
560*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
561*2eba2438SPhilippe Schenker		>;
562*2eba2438SPhilippe Schenker	};
563*2eba2438SPhilippe Schenker
564*2eba2438SPhilippe Schenker	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
565*2eba2438SPhilippe Schenker		fsl,pins = <
566*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041	/* SODIMM  47 */
567*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x21		/* SODIMM 190 */
568*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21		/* SODIMM 192 */
569*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21		/* SODIMM  49 */
570*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21		/* SODIMM  51 */
571*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21		/* SODIMM  53 */
572*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
573*2eba2438SPhilippe Schenker		>;
574*2eba2438SPhilippe Schenker	};
575*2eba2438SPhilippe Schenker
576*2eba2438SPhilippe Schenker	pinctrl_usdhc2_sleep: usdhc2slpgrp {
577*2eba2438SPhilippe Schenker		fsl,pins = <
578*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23		0x60		/* SODIMM  47 */
579*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24		0x60		/* SODIMM 190 */
580*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25		0x60		/* SODIMM 192 */
581*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26		0x60		/* SODIMM  49 */
582*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27		0x60		/* SODIMM  51 */
583*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28		0x60		/* SODIMM  53 */
584*2eba2438SPhilippe Schenker			IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
585*2eba2438SPhilippe Schenker		>;
586*2eba2438SPhilippe Schenker	};
587*2eba2438SPhilippe Schenker
588*2eba2438SPhilippe Schenker	pinctrl_wifi: wifigrp {
589*2eba2438SPhilippe Schenker		fsl,pins = <
590*2eba2438SPhilippe Schenker			IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20
591*2eba2438SPhilippe Schenker		>;
592*2eba2438SPhilippe Schenker	};
593*2eba2438SPhilippe Schenker};
594