1a39ed23bSMarcel Ziswiler// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2a39ed23bSMarcel Ziswiler/*
3a39ed23bSMarcel Ziswiler * Copyright 2022 Toradex
4a39ed23bSMarcel Ziswiler */
5a39ed23bSMarcel Ziswiler
6a39ed23bSMarcel Ziswiler/* TODO: Audio Codec */
7a39ed23bSMarcel Ziswiler
8a39ed23bSMarcel Ziswiler&backlight {
9a39ed23bSMarcel Ziswiler	power-supply = <&reg_3p3v>;
10a39ed23bSMarcel Ziswiler};
11a39ed23bSMarcel Ziswiler
12a39ed23bSMarcel Ziswiler/* Verdin SPI_1 */
13a39ed23bSMarcel Ziswiler&ecspi1 {
14a39ed23bSMarcel Ziswiler	status = "okay";
15a39ed23bSMarcel Ziswiler};
16a39ed23bSMarcel Ziswiler
17a39ed23bSMarcel Ziswiler/* EEPROM on display adapter boards */
18a39ed23bSMarcel Ziswiler&eeprom_display_adapter {
19a39ed23bSMarcel Ziswiler	status = "okay";
20a39ed23bSMarcel Ziswiler};
21a39ed23bSMarcel Ziswiler
22a39ed23bSMarcel Ziswiler/* EEPROM on Verdin Development board */
23a39ed23bSMarcel Ziswiler&eeprom_carrier_board {
24a39ed23bSMarcel Ziswiler	status = "okay";
25a39ed23bSMarcel Ziswiler};
26a39ed23bSMarcel Ziswiler
27a39ed23bSMarcel Ziswiler&eqos {
28a39ed23bSMarcel Ziswiler	status = "okay";
29a39ed23bSMarcel Ziswiler};
30a39ed23bSMarcel Ziswiler
31a39ed23bSMarcel Ziswiler&flexcan1 {
32a39ed23bSMarcel Ziswiler	status = "okay";
33a39ed23bSMarcel Ziswiler};
34a39ed23bSMarcel Ziswiler
35a39ed23bSMarcel Ziswiler&flexcan2 {
36a39ed23bSMarcel Ziswiler	status = "okay";
37a39ed23bSMarcel Ziswiler};
38a39ed23bSMarcel Ziswiler
39a39ed23bSMarcel Ziswiler/* Verdin QSPI_1 */
40a39ed23bSMarcel Ziswiler&flexspi {
41a39ed23bSMarcel Ziswiler	status = "okay";
42a39ed23bSMarcel Ziswiler};
43a39ed23bSMarcel Ziswiler
44a39ed23bSMarcel Ziswiler/* Current measurement into module VCC */
45a39ed23bSMarcel Ziswiler&hwmon {
46a39ed23bSMarcel Ziswiler	status = "okay";
47a39ed23bSMarcel Ziswiler};
48a39ed23bSMarcel Ziswiler
49a39ed23bSMarcel Ziswiler&hwmon_temp {
50a39ed23bSMarcel Ziswiler	vs-supply = <&reg_1p8v>;
51a39ed23bSMarcel Ziswiler	status = "okay";
52a39ed23bSMarcel Ziswiler};
53a39ed23bSMarcel Ziswiler
54a39ed23bSMarcel Ziswiler/* Verdin I2C_2_DSI */
55a39ed23bSMarcel Ziswiler&i2c2 {
56a39ed23bSMarcel Ziswiler	status = "okay";
57a39ed23bSMarcel Ziswiler};
58a39ed23bSMarcel Ziswiler
59a39ed23bSMarcel Ziswiler&i2c3 {
60a39ed23bSMarcel Ziswiler	status = "okay";
61a39ed23bSMarcel Ziswiler};
62a39ed23bSMarcel Ziswiler
63a39ed23bSMarcel Ziswiler/* Verdin I2C_1 */
64a39ed23bSMarcel Ziswiler&i2c4 {
65a39ed23bSMarcel Ziswiler	status = "okay";
66a39ed23bSMarcel Ziswiler
67a39ed23bSMarcel Ziswiler	/* TODO: Audio Codec */
68a39ed23bSMarcel Ziswiler};
69a39ed23bSMarcel Ziswiler
70*93ba667dSMarcel Ziswiler/* Verdin PCIE_1 */
71*93ba667dSMarcel Ziswiler&pcie {
72*93ba667dSMarcel Ziswiler	status = "okay";
73*93ba667dSMarcel Ziswiler};
74*93ba667dSMarcel Ziswiler
75*93ba667dSMarcel Ziswiler&pcie_phy {
76*93ba667dSMarcel Ziswiler	status = "okay";
77*93ba667dSMarcel Ziswiler};
78a39ed23bSMarcel Ziswiler
79a39ed23bSMarcel Ziswiler/* Verdin PWM_1 */
80a39ed23bSMarcel Ziswiler&pwm1 {
81a39ed23bSMarcel Ziswiler	status = "okay";
82a39ed23bSMarcel Ziswiler};
83a39ed23bSMarcel Ziswiler
84a39ed23bSMarcel Ziswiler/* Verdin PWM_2 */
85a39ed23bSMarcel Ziswiler&pwm2 {
86a39ed23bSMarcel Ziswiler	status = "okay";
87a39ed23bSMarcel Ziswiler};
88a39ed23bSMarcel Ziswiler
89a39ed23bSMarcel Ziswiler/* Verdin PWM_3_DSI */
90a39ed23bSMarcel Ziswiler&pwm3 {
91a39ed23bSMarcel Ziswiler	status = "okay";
92a39ed23bSMarcel Ziswiler};
93a39ed23bSMarcel Ziswiler
94a39ed23bSMarcel Ziswiler&reg_usdhc2_vmmc {
95a39ed23bSMarcel Ziswiler	vin-supply = <&reg_3p3v>;
96a39ed23bSMarcel Ziswiler};
97a39ed23bSMarcel Ziswiler
98a39ed23bSMarcel Ziswiler/* TODO: Verdin I2S_1 */
99a39ed23bSMarcel Ziswiler
100a39ed23bSMarcel Ziswiler/* Verdin UART_1 */
101a39ed23bSMarcel Ziswiler&uart1 {
102a39ed23bSMarcel Ziswiler	status = "okay";
103a39ed23bSMarcel Ziswiler};
104a39ed23bSMarcel Ziswiler
105a39ed23bSMarcel Ziswiler/* Verdin UART_2 */
106a39ed23bSMarcel Ziswiler&uart2 {
107a39ed23bSMarcel Ziswiler	status = "okay";
108a39ed23bSMarcel Ziswiler};
109a39ed23bSMarcel Ziswiler
110a39ed23bSMarcel Ziswiler/* Verdin UART_3, used as the Linux Console */
111a39ed23bSMarcel Ziswiler&uart3 {
112a39ed23bSMarcel Ziswiler	status = "okay";
113a39ed23bSMarcel Ziswiler};
114a39ed23bSMarcel Ziswiler
115a39ed23bSMarcel Ziswiler/* Verdin USB_1 */
116a39ed23bSMarcel Ziswiler&usb3_0 {
117a39ed23bSMarcel Ziswiler	status = "okay";
118a39ed23bSMarcel Ziswiler};
119a39ed23bSMarcel Ziswiler
120a39ed23bSMarcel Ziswiler&usb3_phy0 {
121a39ed23bSMarcel Ziswiler	status = "okay";
122a39ed23bSMarcel Ziswiler};
123a39ed23bSMarcel Ziswiler
124a39ed23bSMarcel Ziswiler/* Verdin USB_2 */
125a39ed23bSMarcel Ziswiler&usb3_1 {
126237f7d58SMarcel Ziswiler	fsl,permanently-attached;
127a39ed23bSMarcel Ziswiler	status = "okay";
128a39ed23bSMarcel Ziswiler};
129a39ed23bSMarcel Ziswiler
130a39ed23bSMarcel Ziswiler&usb3_phy1 {
131a39ed23bSMarcel Ziswiler	status = "okay";
132a39ed23bSMarcel Ziswiler};
133a39ed23bSMarcel Ziswiler
134a39ed23bSMarcel Ziswiler/* Verdin SD_1 */
135a39ed23bSMarcel Ziswiler&usdhc2 {
136a39ed23bSMarcel Ziswiler	status = "okay";
137a39ed23bSMarcel Ziswiler};
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