xref: /openbmc/linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mp-venice-gw7905.dtsi (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
1*0d5b288cSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*0d5b288cSTim Harvey/*
3*0d5b288cSTim Harvey * Copyright 2023 Gateworks Corporation
4*0d5b288cSTim Harvey */
5*0d5b288cSTim Harvey
6*0d5b288cSTim Harvey#include <dt-bindings/gpio/gpio.h>
7*0d5b288cSTim Harvey#include <dt-bindings/leds/common.h>
8*0d5b288cSTim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h>
9*0d5b288cSTim Harvey
10*0d5b288cSTim Harvey/ {
11*0d5b288cSTim Harvey	led-controller {
12*0d5b288cSTim Harvey		compatible = "gpio-leds";
13*0d5b288cSTim Harvey		pinctrl-names = "default";
14*0d5b288cSTim Harvey		pinctrl-0 = <&pinctrl_gpio_leds>;
15*0d5b288cSTim Harvey
16*0d5b288cSTim Harvey		led-0 {
17*0d5b288cSTim Harvey			function = LED_FUNCTION_STATUS;
18*0d5b288cSTim Harvey			color = <LED_COLOR_ID_GREEN>;
19*0d5b288cSTim Harvey			gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
20*0d5b288cSTim Harvey			default-state = "on";
21*0d5b288cSTim Harvey			linux,default-trigger = "heartbeat";
22*0d5b288cSTim Harvey		};
23*0d5b288cSTim Harvey
24*0d5b288cSTim Harvey		led-1 {
25*0d5b288cSTim Harvey			function = LED_FUNCTION_STATUS;
26*0d5b288cSTim Harvey			color = <LED_COLOR_ID_RED>;
27*0d5b288cSTim Harvey			gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
28*0d5b288cSTim Harvey			default-state = "off";
29*0d5b288cSTim Harvey		};
30*0d5b288cSTim Harvey	};
31*0d5b288cSTim Harvey
32*0d5b288cSTim Harvey	pcie0_refclk: pcie0-refclk {
33*0d5b288cSTim Harvey		compatible = "fixed-clock";
34*0d5b288cSTim Harvey		#clock-cells = <0>;
35*0d5b288cSTim Harvey		clock-frequency = <100000000>;
36*0d5b288cSTim Harvey	};
37*0d5b288cSTim Harvey
38*0d5b288cSTim Harvey	pps {
39*0d5b288cSTim Harvey		compatible = "pps-gpio";
40*0d5b288cSTim Harvey		pinctrl-names = "default";
41*0d5b288cSTim Harvey		pinctrl-0 = <&pinctrl_pps>;
42*0d5b288cSTim Harvey		gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
43*0d5b288cSTim Harvey		status = "okay";
44*0d5b288cSTim Harvey	};
45*0d5b288cSTim Harvey
46*0d5b288cSTim Harvey	reg_usb2_vbus: regulator-usb2-vbus {
47*0d5b288cSTim Harvey		pinctrl-names = "default";
48*0d5b288cSTim Harvey		pinctrl-0 = <&pinctrl_reg_usb2_en>;
49*0d5b288cSTim Harvey		compatible = "regulator-fixed";
50*0d5b288cSTim Harvey		regulator-name = "usb2_vbus";
51*0d5b288cSTim Harvey		gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
52*0d5b288cSTim Harvey		enable-active-high;
53*0d5b288cSTim Harvey		regulator-min-microvolt = <5000000>;
54*0d5b288cSTim Harvey		regulator-max-microvolt = <5000000>;
55*0d5b288cSTim Harvey	};
56*0d5b288cSTim Harvey
57*0d5b288cSTim Harvey	reg_usdhc2_vmmc: regulator-usdhc2 {
58*0d5b288cSTim Harvey		pinctrl-names = "default";
59*0d5b288cSTim Harvey		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
60*0d5b288cSTim Harvey		compatible = "regulator-fixed";
61*0d5b288cSTim Harvey		regulator-name = "SD2_3P3V";
62*0d5b288cSTim Harvey		regulator-min-microvolt = <3300000>;
63*0d5b288cSTim Harvey		regulator-max-microvolt = <3300000>;
64*0d5b288cSTim Harvey		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
65*0d5b288cSTim Harvey		enable-active-high;
66*0d5b288cSTim Harvey	};
67*0d5b288cSTim Harvey};
68*0d5b288cSTim Harvey
69*0d5b288cSTim Harvey/* off-board header */
70*0d5b288cSTim Harvey&ecspi2 {
71*0d5b288cSTim Harvey	pinctrl-names = "default";
72*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_spi2>;
73*0d5b288cSTim Harvey	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
74*0d5b288cSTim Harvey	status = "okay";
75*0d5b288cSTim Harvey};
76*0d5b288cSTim Harvey
77*0d5b288cSTim Harvey&gpio4 {
78*0d5b288cSTim Harvey	gpio-line-names =
79*0d5b288cSTim Harvey		"", "", "", "",
80*0d5b288cSTim Harvey		"", "", "", "",
81*0d5b288cSTim Harvey		"", "", "", "",
82*0d5b288cSTim Harvey		"", "gpioa", "", "",
83*0d5b288cSTim Harvey		"", "", "", "",
84*0d5b288cSTim Harvey		"", "", "", "",
85*0d5b288cSTim Harvey		"", "", "", "",
86*0d5b288cSTim Harvey		"", "", "", "";
87*0d5b288cSTim Harvey};
88*0d5b288cSTim Harvey
89*0d5b288cSTim Harvey&gpio4 {
90*0d5b288cSTim Harvey	gpio-line-names =
91*0d5b288cSTim Harvey		"", "gpiod", "", "",
92*0d5b288cSTim Harvey		"gpiob", "gpioc", "", "",
93*0d5b288cSTim Harvey		"", "", "", "",
94*0d5b288cSTim Harvey		"", "", "", "",
95*0d5b288cSTim Harvey		"", "", "", "",
96*0d5b288cSTim Harvey		"", "", "", "",
97*0d5b288cSTim Harvey		"", "", "pci_usb_sel", "",
98*0d5b288cSTim Harvey		"pci_wdis#", "", "", "";
99*0d5b288cSTim Harvey};
100*0d5b288cSTim Harvey
101*0d5b288cSTim Harvey&i2c2 {
102*0d5b288cSTim Harvey	clock-frequency = <400000>;
103*0d5b288cSTim Harvey	pinctrl-names = "default";
104*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_i2c2>;
105*0d5b288cSTim Harvey	status = "okay";
106*0d5b288cSTim Harvey
107*0d5b288cSTim Harvey	eeprom@52 {
108*0d5b288cSTim Harvey		compatible = "atmel,24c32";
109*0d5b288cSTim Harvey		reg = <0x52>;
110*0d5b288cSTim Harvey		pagesize = <32>;
111*0d5b288cSTim Harvey	};
112*0d5b288cSTim Harvey};
113*0d5b288cSTim Harvey
114*0d5b288cSTim Harvey/* off-board header */
115*0d5b288cSTim Harvey&i2c3 {
116*0d5b288cSTim Harvey	clock-frequency = <400000>;
117*0d5b288cSTim Harvey	pinctrl-names = "default";
118*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_i2c3>;
119*0d5b288cSTim Harvey	status = "okay";
120*0d5b288cSTim Harvey};
121*0d5b288cSTim Harvey
122*0d5b288cSTim Harvey&pcie_phy {
123*0d5b288cSTim Harvey	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
124*0d5b288cSTim Harvey	fsl,clkreq-unsupported;
125*0d5b288cSTim Harvey	clocks = <&pcie0_refclk>;
126*0d5b288cSTim Harvey	clock-names = "ref";
127*0d5b288cSTim Harvey	status = "okay";
128*0d5b288cSTim Harvey};
129*0d5b288cSTim Harvey
130*0d5b288cSTim Harvey&pcie {
131*0d5b288cSTim Harvey	pinctrl-names = "default";
132*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_pcie0>;
133*0d5b288cSTim Harvey	reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
134*0d5b288cSTim Harvey	status = "okay";
135*0d5b288cSTim Harvey};
136*0d5b288cSTim Harvey
137*0d5b288cSTim Harvey/* GPS */
138*0d5b288cSTim Harvey&uart1 {
139*0d5b288cSTim Harvey	pinctrl-names = "default";
140*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_uart1>;
141*0d5b288cSTim Harvey	status = "okay";
142*0d5b288cSTim Harvey};
143*0d5b288cSTim Harvey
144*0d5b288cSTim Harvey/* USB1 - Type C front panel SINK port J14 */
145*0d5b288cSTim Harvey&usb3_0 {
146*0d5b288cSTim Harvey	status = "okay";
147*0d5b288cSTim Harvey};
148*0d5b288cSTim Harvey
149*0d5b288cSTim Harvey&usb3_phy0 {
150*0d5b288cSTim Harvey	status = "okay";
151*0d5b288cSTim Harvey};
152*0d5b288cSTim Harvey
153*0d5b288cSTim Harvey&usb_dwc3_0 {
154*0d5b288cSTim Harvey	dr_mode = "peripheral";
155*0d5b288cSTim Harvey	status = "okay";
156*0d5b288cSTim Harvey};
157*0d5b288cSTim Harvey
158*0d5b288cSTim Harvey/* USB2 4-port USB3.0 HUB:
159*0d5b288cSTim Harvey *  P1 - USBC connector (host only)
160*0d5b288cSTim Harvey *  P2 - USB2 test connector
161*0d5b288cSTim Harvey *  P3 - miniPCIe full card
162*0d5b288cSTim Harvey *  P4 - miniPCIe half card
163*0d5b288cSTim Harvey */
164*0d5b288cSTim Harvey&usb3_phy1 {
165*0d5b288cSTim Harvey	vbus-supply = <&reg_usb2_vbus>;
166*0d5b288cSTim Harvey	status = "okay";
167*0d5b288cSTim Harvey};
168*0d5b288cSTim Harvey
169*0d5b288cSTim Harvey&usb3_1 {
170*0d5b288cSTim Harvey	fsl,permanently-attached;
171*0d5b288cSTim Harvey	fsl,disable-port-power-control;
172*0d5b288cSTim Harvey	status = "okay";
173*0d5b288cSTim Harvey};
174*0d5b288cSTim Harvey
175*0d5b288cSTim Harvey&usb_dwc3_1 {
176*0d5b288cSTim Harvey	dr_mode = "host";
177*0d5b288cSTim Harvey	status = "okay";
178*0d5b288cSTim Harvey};
179*0d5b288cSTim Harvey
180*0d5b288cSTim Harvey/* microSD */
181*0d5b288cSTim Harvey&usdhc2 {
182*0d5b288cSTim Harvey	pinctrl-names = "default", "state_100mhz", "state_200mhz";
183*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
184*0d5b288cSTim Harvey	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
185*0d5b288cSTim Harvey	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
186*0d5b288cSTim Harvey	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
187*0d5b288cSTim Harvey	vmmc-supply = <&reg_usdhc2_vmmc>;
188*0d5b288cSTim Harvey	bus-width = <4>;
189*0d5b288cSTim Harvey	status = "okay";
190*0d5b288cSTim Harvey};
191*0d5b288cSTim Harvey
192*0d5b288cSTim Harvey&iomuxc {
193*0d5b288cSTim Harvey	pinctrl-names = "default";
194*0d5b288cSTim Harvey	pinctrl-0 = <&pinctrl_hog>;
195*0d5b288cSTim Harvey
196*0d5b288cSTim Harvey	pinctrl_hog: hoggrp {
197*0d5b288cSTim Harvey		fsl,pins = <
198*0d5b288cSTim Harvey			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x40000040 /* GPIOA */
199*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x40000040 /* GPIOD */
200*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04	0x40000040 /* GPIOB */
201*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05	0x40000040 /* GPIOC */
202*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26	0x40000106 /* PCI_USBSEL */
203*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x40000106 /* PCI_WDIS# */
204*0d5b288cSTim Harvey		>;
205*0d5b288cSTim Harvey	};
206*0d5b288cSTim Harvey
207*0d5b288cSTim Harvey	pinctrl_gpio_leds: gpioledgrp {
208*0d5b288cSTim Harvey		fsl,pins = <
209*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x6	/* LEDG */
210*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x6	/* LEDR */
211*0d5b288cSTim Harvey		>;
212*0d5b288cSTim Harvey	};
213*0d5b288cSTim Harvey
214*0d5b288cSTim Harvey	pinctrl_i2c2: i2c2grp {
215*0d5b288cSTim Harvey		fsl,pins = <
216*0d5b288cSTim Harvey			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2
217*0d5b288cSTim Harvey			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2
218*0d5b288cSTim Harvey		>;
219*0d5b288cSTim Harvey	};
220*0d5b288cSTim Harvey
221*0d5b288cSTim Harvey	pinctrl_i2c3: i2c3grp {
222*0d5b288cSTim Harvey		fsl,pins = <
223*0d5b288cSTim Harvey			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c2
224*0d5b288cSTim Harvey			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c2
225*0d5b288cSTim Harvey		>;
226*0d5b288cSTim Harvey	};
227*0d5b288cSTim Harvey
228*0d5b288cSTim Harvey	pinctrl_pcie0: pciegrp {
229*0d5b288cSTim Harvey		fsl,pins = <
230*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x106
231*0d5b288cSTim Harvey		>;
232*0d5b288cSTim Harvey	};
233*0d5b288cSTim Harvey
234*0d5b288cSTim Harvey	pinctrl_pps: ppsgrp {
235*0d5b288cSTim Harvey		fsl,pins = <
236*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x106
237*0d5b288cSTim Harvey		>;
238*0d5b288cSTim Harvey	};
239*0d5b288cSTim Harvey
240*0d5b288cSTim Harvey	pinctrl_reg_usb2_en: regusb2grp {
241*0d5b288cSTim Harvey		fsl,pins = <
242*0d5b288cSTim Harvey			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	0x6 /* USBHUB_RST# (ext p/u) */
243*0d5b288cSTim Harvey		>;
244*0d5b288cSTim Harvey	};
245*0d5b288cSTim Harvey
246*0d5b288cSTim Harvey	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
247*0d5b288cSTim Harvey		fsl,pins = <
248*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
249*0d5b288cSTim Harvey		>;
250*0d5b288cSTim Harvey	};
251*0d5b288cSTim Harvey
252*0d5b288cSTim Harvey	pinctrl_spi2: spi2grp {
253*0d5b288cSTim Harvey		fsl,pins = <
254*0d5b288cSTim Harvey			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x140
255*0d5b288cSTim Harvey			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x140
256*0d5b288cSTim Harvey			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x140
257*0d5b288cSTim Harvey			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x140
258*0d5b288cSTim Harvey		>;
259*0d5b288cSTim Harvey	};
260*0d5b288cSTim Harvey
261*0d5b288cSTim Harvey	pinctrl_uart1: uart1grp {
262*0d5b288cSTim Harvey		fsl,pins = <
263*0d5b288cSTim Harvey			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
264*0d5b288cSTim Harvey			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140
265*0d5b288cSTim Harvey		>;
266*0d5b288cSTim Harvey	};
267*0d5b288cSTim Harvey
268*0d5b288cSTim Harvey	pinctrl_usdhc2: usdhc2grp {
269*0d5b288cSTim Harvey		fsl,pins = <
270*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190
271*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0
272*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0
273*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0
274*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0
275*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0
276*0d5b288cSTim Harvey			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
277*0d5b288cSTim Harvey		>;
278*0d5b288cSTim Harvey	};
279*0d5b288cSTim Harvey
280*0d5b288cSTim Harvey	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
281*0d5b288cSTim Harvey		fsl,pins = <
282*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194
283*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4
284*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4
285*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4
286*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4
287*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4
288*0d5b288cSTim Harvey			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
289*0d5b288cSTim Harvey		>;
290*0d5b288cSTim Harvey	};
291*0d5b288cSTim Harvey
292*0d5b288cSTim Harvey	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
293*0d5b288cSTim Harvey		fsl,pins = <
294*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196
295*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6
296*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6
297*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6
298*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6
299*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6
300*0d5b288cSTim Harvey			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
301*0d5b288cSTim Harvey		>;
302*0d5b288cSTim Harvey	};
303*0d5b288cSTim Harvey
304*0d5b288cSTim Harvey	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
305*0d5b288cSTim Harvey		fsl,pins = <
306*0d5b288cSTim Harvey			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x1c4
307*0d5b288cSTim Harvey		>;
308*0d5b288cSTim Harvey	};
309*0d5b288cSTim Harvey};
310