1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/usb/pd.h>
9#include <dt-bindings/phy/phy-imx8-pcie.h>
10#include "imx8mp.dtsi"
11#include "imx8mp-beacon-som.dtsi"
12
13/ {
14	model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
15	compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
16
17	aliases {
18		ethernet0 = &eqos;
19		ethernet1 = &fec;
20	};
21
22	chosen {
23		stdout-path = &uart2;
24	};
25
26	connector {
27		compatible = "usb-c-connector";
28		label = "USB-C";
29		data-role = "dual";
30
31		ports {
32			#address-cells = <1>;
33			#size-cells = <0>;
34
35			port@0 {
36				reg = <0>;
37
38				hs_ep: endpoint {
39					remote-endpoint = <&usb3_hs_ep>;
40				};
41			};
42			port@1 {
43				reg = <1>;
44
45				ss_ep: endpoint {
46					remote-endpoint = <&hd3ss3220_in_ep>;
47				};
48			};
49		};
50	};
51
52	gpio-keys {
53		compatible = "gpio-keys";
54		autorepeat;
55
56		button-0 {
57			label = "btn0";
58			linux,code = <BTN_0>;
59			gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
60			wakeup-source;
61		};
62
63		button-1 {
64			label = "btn1";
65			linux,code = <BTN_1>;
66			gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
67			wakeup-source;
68		};
69
70		button-2 {
71			label = "btn2";
72			linux,code = <BTN_2>;
73			gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
74			wakeup-source;
75		};
76
77		button-3 {
78			label = "btn3";
79			linux,code = <BTN_3>;
80			gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
81			wakeup-source;
82		};
83	};
84
85	leds {
86		compatible = "gpio-leds";
87		pinctrl-names = "default";
88		pinctrl-0 = <&pinctrl_led3>;
89
90		led-0 {
91			label = "gen_led0";
92			gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
93			default-state = "off";
94		};
95
96		led-1 {
97			label = "gen_led1";
98			gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
99			default-state = "off";
100		};
101
102		led-2 {
103			label = "gen_led2";
104			gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
105			default-state = "off";
106		};
107
108		led-3 {
109			label = "heartbeat";
110			gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
111			linux,default-trigger = "heartbeat";
112		};
113	};
114
115	pcie0_refclk: clock-pcie {
116		compatible = "fixed-clock";
117		#clock-cells = <0>;
118		clock-frequency = <100000000>;
119	};
120
121	reg_audio: regulator-wm8962 {
122		compatible = "regulator-fixed";
123		regulator-name = "3v3_aud";
124		regulator-min-microvolt = <3300000>;
125		regulator-max-microvolt = <3300000>;
126		gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
127		enable-active-high;
128	};
129
130	reg_usdhc2_vmmc: regulator-usdhc2 {
131		compatible = "regulator-fixed";
132		regulator-name = "VSD_3V3";
133		regulator-min-microvolt = <3300000>;
134		regulator-max-microvolt = <3300000>;
135		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
136		enable-active-high;
137		startup-delay-us = <100>;
138		off-on-delay-us = <20000>;
139	};
140
141	reg_usb1_host_vbus: regulator-usb1-vbus {
142		compatible = "regulator-fixed";
143		regulator-name = "usb1_host_vbus";
144		regulator-max-microvolt = <5000000>;
145		regulator-min-microvolt = <5000000>;
146		gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
147		enable-active-high;
148	};
149
150	sound-wm8962 {
151		compatible = "simple-audio-card";
152		simple-audio-card,name = "wm8962";
153		simple-audio-card,format = "i2s";
154		simple-audio-card,widgets = "Headphone", "Headphones",
155					    "Microphone", "Headset Mic",
156					    "Speaker", "Speaker";
157		simple-audio-card,routing = "Headphones", "HPOUTL",
158					    "Headphones", "HPOUTR",
159					    "Speaker", "SPKOUTL",
160					    "Speaker", "SPKOUTR",
161					    "Headset Mic", "MICBIAS",
162					    "IN3R", "Headset Mic";
163
164		simple-audio-card,cpu {
165			sound-dai = <&sai3>;
166			frame-master;
167			bitclock-master;
168		};
169
170		simple-audio-card,codec {
171			sound-dai = <&wm8962>;
172		};
173	};
174};
175
176&ecspi2 {
177	pinctrl-names = "default";
178	pinctrl-0 = <&pinctrl_ecspi2>;
179	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
180	status = "okay";
181
182	tpm: tpm@0 {
183		compatible = "infineon,slb9670";
184		reg = <0>;
185		pinctrl-names = "default";
186		pinctrl-0 = <&pinctrl_tpm>;
187		reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
188		spi-max-frequency = <18500000>;
189	};
190};
191
192&fec {
193	pinctrl-names = "default";
194	pinctrl-0 = <&pinctrl_fec>;
195	phy-mode = "rgmii-id";
196	phy-handle = <&ethphy1>;
197	fsl,magic-packet;
198	status = "okay";
199
200	mdio {
201		#address-cells = <1>;
202		#size-cells = <0>;
203
204		ethphy1: ethernet-phy@3 {
205			compatible = "ethernet-phy-id0022.1640",
206				     "ethernet-phy-ieee802.3-c22";
207			reg = <3>;
208			reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
209			reset-assert-us = <10000>;
210			reset-deassert-us = <150000>;
211			interrupt-parent = <&gpio4>;
212			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
213		};
214	};
215};
216
217&flexcan1 {
218	pinctrl-names = "default";
219	pinctrl-0 = <&pinctrl_flexcan1>;
220	status = "okay";
221};
222
223&gpio2 {
224	usb-mux-hog {
225		gpio-hog;
226		gpios = <20 0>;
227		output-low;
228		line-name = "USB-C Mux En";
229	};
230};
231
232&i2c2 {
233	clock-frequency = <384000>;
234	pinctrl-names = "default";
235	pinctrl-0 = <&pinctrl_i2c2>;
236	status = "okay";
237
238	pca6416_3: gpio@20 {
239		compatible = "nxp,pcal6416";
240		reg = <0x20>;
241		gpio-controller;
242		#gpio-cells = <2>;
243		interrupt-parent = <&gpio4>;
244		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
245		interrupt-controller;
246		#interrupt-cells = <2>;
247	};
248};
249
250&i2c3 {
251	/* Connected to USB Hub */
252	usb-typec@52 {
253		compatible = "nxp,ptn5110";
254		reg = <0x52>;
255		pinctrl-names = "default";
256		pinctrl-0 = <&pinctrl_typec>;
257		interrupt-parent = <&gpio4>;
258		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
259
260		connector {
261			compatible = "usb-c-connector";
262			label = "USB-C";
263			power-role = "source";
264			data-role = "host";
265			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
266		};
267	};
268};
269
270&i2c4 {
271	pinctrl-names = "default";
272	pinctrl-0 = <&pinctrl_i2c4>;
273	clock-frequency = <384000>;
274	status = "okay";
275
276	wm8962: audio-codec@1a {
277		compatible = "wlf,wm8962";
278		reg = <0x1a>;
279		pinctrl-names = "default";
280		pinctrl-0 = <&pinctrl_wm8962>;
281		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
282		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
283		assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
284		assigned-clock-rates = <22576000>;
285		DCVDD-supply = <&reg_audio>;
286		DBVDD-supply = <&reg_audio>;
287		AVDD-supply = <&reg_audio>;
288		CPVDD-supply = <&reg_audio>;
289		MICVDD-supply = <&reg_audio>;
290		PLLVDD-supply = <&reg_audio>;
291		SPKVDD1-supply = <&reg_audio>;
292		SPKVDD2-supply = <&reg_audio>;
293		gpio-cfg = <
294			0x0000 /* 0:Default */
295			0x0000 /* 1:Default */
296			0x0000 /* 2:FN_DMICCLK */
297			0x0000 /* 3:Default */
298			0x0000 /* 4:FN_DMICCDAT */
299			0x0000 /* 5:Default */
300		>;
301		#sound-dai-cells = <0>;
302	};
303
304	pca6416: gpio@20 {
305		compatible = "nxp,pcal6416";
306		reg = <0x20>;
307		pinctrl-names = "default";
308		pinctrl-0 = <&pinctrl_pcal6414>;
309		gpio-controller;
310		#gpio-cells = <2>;
311		interrupt-parent = <&gpio4>;
312		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
313		interrupt-controller;
314		#interrupt-cells = <2>;
315	};
316
317	pca6416_1: gpio@21 {
318		compatible = "nxp,pcal6416";
319		reg = <0x21>;
320		gpio-controller;
321		#gpio-cells = <2>;
322		interrupt-parent = <&gpio4>;
323		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
324		interrupt-controller;
325		#interrupt-cells = <2>;
326
327		usb-hub-hog {
328			gpio-hog;
329			gpios = <7 0>;
330			output-low;
331			line-name = "USB Hub Enable";
332		};
333	};
334
335	usb-typec@47 {
336		compatible = "ti,hd3ss3220";
337		reg = <0x47>;
338		pinctrl-names = "default";
339		pinctrl-0 = <&pinctrl_hd3ss3220>;
340		interrupt-parent = <&gpio4>;
341		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
342
343		ports {
344			#address-cells = <1>;
345			#size-cells = <0>;
346
347			port@0 {
348				reg = <0>;
349
350				hd3ss3220_in_ep: endpoint {
351					remote-endpoint = <&ss_ep>;
352				};
353			};
354
355			port@1 {
356				reg = <1>;
357
358				hd3ss3220_out_ep: endpoint {
359					remote-endpoint = <&usb3_role_switch>;
360				};
361			};
362		};
363	};
364};
365
366&pcie {
367	pinctrl-names = "default";
368	pinctrl-0 = <&pinctrl_pcie>;
369	reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
370	status = "okay";
371};
372
373&pcie_phy {
374	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
375	clocks = <&pcie0_refclk>;
376	clock-names = "ref";
377	status = "okay";
378};
379
380&sai3 {
381	pinctrl-names = "default";
382	pinctrl-0 = <&pinctrl_sai3>;
383	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
384	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
385	assigned-clock-rates = <12288000>;
386	fsl,sai-mclk-direction-output;
387	status = "okay";
388};
389
390&snvs_pwrkey {
391	status = "okay";
392};
393
394&uart2 {
395	pinctrl-names = "default";
396	pinctrl-0 = <&pinctrl_uart2>;
397	status = "okay";
398};
399
400&uart3 {
401	pinctrl-names = "default";
402	pinctrl-0 = <&pinctrl_uart3>;
403	assigned-clocks = <&clk IMX8MP_CLK_UART3>;
404	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
405	uart-has-rtscts;
406	status = "okay";
407};
408
409&usb3_0 {
410	status = "okay";
411};
412
413&usb_dwc3_0 {
414	dr_mode = "otg";
415	hnp-disable;
416	srp-disable;
417	adp-disable;
418	usb-role-switch;
419	status = "okay";
420
421	ports {
422		#address-cells = <1>;
423		#size-cells = <0>;
424
425		port@0 {
426			reg = <0>;
427			usb3_hs_ep: endpoint {
428				remote-endpoint = <&hs_ep>;
429			};
430		};
431		port@1 {
432			reg = <1>;
433			usb3_role_switch: endpoint {
434				remote-endpoint = <&hd3ss3220_out_ep>;
435			};
436		};
437	};
438};
439
440&usb3_phy0 {
441	vbus-supply = <&reg_usb1_host_vbus>;
442	status = "okay";
443};
444
445&usb3_1 {
446	status = "okay";
447};
448
449&usb_dwc3_1 {
450	dr_mode = "host";
451	status = "okay";
452};
453
454&usb3_phy1 {
455	status = "okay";
456};
457
458&usdhc2 {
459	pinctrl-names = "default", "state_100mhz", "state_200mhz";
460	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
461	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
462	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
463	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
464	vmmc-supply = <&reg_usdhc2_vmmc>;
465	bus-width = <4>;
466	status = "okay";
467};
468
469&iomuxc {
470	pinctrl_ecspi2: ecspi2grp {
471		fsl,pins = <
472			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x82
473			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x82
474			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x82
475			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x40000
476		>;
477	};
478
479	pinctrl_fec: fecgrp {
480		fsl,pins = <
481			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC	0x2
482			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO	0x2
483			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0	0x90
484			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1	0x90
485			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2	0x90
486			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3	0x90
487			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC	0x90
488			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x90
489			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0	0x16
490			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1	0x16
491			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2	0x16
492			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3	0x16
493			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x16
494			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC	0x16
495			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x140
496			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x10
497		>;
498	};
499
500	pinctrl_flexcan1: flexcan1grp {
501		fsl,pins = <
502			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX	0x154
503			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX	0x154
504		>;
505	};
506
507	pinctrl_hd3ss3220: hd3ss3220grp {
508		fsl,pins = <
509			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x140
510		>;
511	};
512
513	pinctrl_i2c2: i2c2grp {
514		fsl,pins = <
515			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL	0x400001c2
516			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA	0x400001c2
517		>;
518	};
519
520	pinctrl_i2c4: i2c4grp {
521		fsl,pins = <
522			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL	0x400001c2
523			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA	0x400001c2
524		>;
525	};
526
527	pinctrl_led3: led3grp {
528		fsl,pins = <
529			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x41
530		>;
531	};
532
533	pinctrl_pcal6414: pcal6414-gpiogrp {
534		fsl,pins = <
535			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x10
536		>;
537	};
538
539	pinctrl_pcie: pciegrp {
540		fsl,pins = <
541			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05	0x10 /* PCIe_nDIS */
542			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10	/* PCIe_nRST */
543		>;
544	};
545
546	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
547		fsl,pins = <
548			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
549		>;
550	};
551
552	pinctrl_sai3: sai3grp {
553		fsl,pins = <
554			MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0xd6
555			MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0xd6
556			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00	0xd6
557			MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00	0xd6
558			MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK	0xd6
559		>;
560	};
561
562	pinctrl_tpm: tpmgrp {
563		fsl,pins = <
564			MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00	0x19 /* Reset */
565			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x1d6 /* IRQ */
566		>;
567	};
568
569	pinctrl_typec: typec1grp {
570		fsl,pins = <
571			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0xc4
572		>;
573	};
574
575	pinctrl_uart2: uart2grp {
576		fsl,pins = <
577			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x140
578			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x140
579		>;
580	};
581
582	pinctrl_uart3: uart3grp {
583		fsl,pins = <
584			MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x140
585			MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX		0x140
586			MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS		0x140
587			MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS		0x140
588		>;
589	};
590
591	pinctrl_usdhc2: usdhc2grp {
592		fsl,pins = <
593			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190
594			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0
595			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0
596			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0
597			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0
598			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0
599			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0
600		>;
601	};
602
603	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
604		fsl,pins = <
605			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194
606			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4
607			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4
608			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4
609			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4
610			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4
611			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
612		>;
613	};
614
615	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
616		fsl,pins = <
617			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196
618			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6
619			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6
620			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6
621			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6
622			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6
623			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
624		>;
625	};
626
627	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
628		fsl,pins = <
629			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4
630		>;
631	};
632
633	pinctrl_wm8962: wm8962grp {
634		fsl,pins = <
635			MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1	0x59
636		>;
637	};
638};
639