xref: /openbmc/linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mm-venice-gw72xx-0x-imx219.dtso (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1*4c33cb31SAndrew Davis// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4c33cb31SAndrew Davis/*
3*4c33cb31SAndrew Davis * Copyright 2022 Gateworks Corporation
4*4c33cb31SAndrew Davis */
5*4c33cb31SAndrew Davis
6*4c33cb31SAndrew Davis#include <dt-bindings/gpio/gpio.h>
7*4c33cb31SAndrew Davis
8*4c33cb31SAndrew Davis#include "imx8mm-pinfunc.h"
9*4c33cb31SAndrew Davis
10*4c33cb31SAndrew Davis/dts-v1/;
11*4c33cb31SAndrew Davis/plugin/;
12*4c33cb31SAndrew Davis
13*4c33cb31SAndrew Davis&{/} {
14*4c33cb31SAndrew Davis	compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
15*4c33cb31SAndrew Davis
16*4c33cb31SAndrew Davis	reg_cam: regulator-cam {
17*4c33cb31SAndrew Davis		pinctrl-names = "default";
18*4c33cb31SAndrew Davis		pinctrl-0 = <&pinctrl_reg_cam>;
19*4c33cb31SAndrew Davis		compatible = "regulator-fixed";
20*4c33cb31SAndrew Davis		regulator-name = "reg_cam";
21*4c33cb31SAndrew Davis		gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
22*4c33cb31SAndrew Davis		enable-active-high;
23*4c33cb31SAndrew Davis		regulator-min-microvolt = <1800000>;
24*4c33cb31SAndrew Davis		regulator-max-microvolt = <1800000>;
25*4c33cb31SAndrew Davis	};
26*4c33cb31SAndrew Davis
27*4c33cb31SAndrew Davis	cam24m: cam24m {
28*4c33cb31SAndrew Davis		compatible = "fixed-clock";
29*4c33cb31SAndrew Davis		#clock-cells = <0>;
30*4c33cb31SAndrew Davis		clock-frequency = <24000000>;
31*4c33cb31SAndrew Davis		clock-output-names = "cam24m";
32*4c33cb31SAndrew Davis	};
33*4c33cb31SAndrew Davis};
34*4c33cb31SAndrew Davis
35*4c33cb31SAndrew Davis&csi {
36*4c33cb31SAndrew Davis	status = "okay";
37*4c33cb31SAndrew Davis};
38*4c33cb31SAndrew Davis
39*4c33cb31SAndrew Davis&i2c3 {
40*4c33cb31SAndrew Davis	#address-cells = <1>;
41*4c33cb31SAndrew Davis	#size-cells = <0>;
42*4c33cb31SAndrew Davis
43*4c33cb31SAndrew Davis	imx219: sensor@10 {
44*4c33cb31SAndrew Davis		compatible = "sony,imx219";
45*4c33cb31SAndrew Davis		reg = <0x10>;
46*4c33cb31SAndrew Davis		clocks = <&cam24m>;
47*4c33cb31SAndrew Davis		VDIG-supply = <&reg_cam>;
48*4c33cb31SAndrew Davis
49*4c33cb31SAndrew Davis		port {
50*4c33cb31SAndrew Davis			/* MIPI CSI-2 bus endpoint */
51*4c33cb31SAndrew Davis			imx219_to_mipi_csi2: endpoint {
52*4c33cb31SAndrew Davis				remote-endpoint = <&imx8mm_mipi_csi_in>;
53*4c33cb31SAndrew Davis				clock-lanes = <0>;
54*4c33cb31SAndrew Davis				data-lanes = <1 2>;
55*4c33cb31SAndrew Davis				link-frequencies = /bits/ 64 <456000000>;
56*4c33cb31SAndrew Davis			};
57*4c33cb31SAndrew Davis		};
58*4c33cb31SAndrew Davis	};
59*4c33cb31SAndrew Davis};
60*4c33cb31SAndrew Davis
61*4c33cb31SAndrew Davis&mipi_csi {
62*4c33cb31SAndrew Davis	status = "okay";
63*4c33cb31SAndrew Davis
64*4c33cb31SAndrew Davis	ports {
65*4c33cb31SAndrew Davis		#address-cells = <1>;
66*4c33cb31SAndrew Davis		#size-cells = <0>;
67*4c33cb31SAndrew Davis
68*4c33cb31SAndrew Davis		port@0 {
69*4c33cb31SAndrew Davis			reg = <0>;
70*4c33cb31SAndrew Davis
71*4c33cb31SAndrew Davis			imx8mm_mipi_csi_in: endpoint {
72*4c33cb31SAndrew Davis				remote-endpoint = <&imx219_to_mipi_csi2>;
73*4c33cb31SAndrew Davis				data-lanes = <1 2>;
74*4c33cb31SAndrew Davis			};
75*4c33cb31SAndrew Davis		};
76*4c33cb31SAndrew Davis
77*4c33cb31SAndrew Davis		port@1 {
78*4c33cb31SAndrew Davis			reg = <1>;
79*4c33cb31SAndrew Davis
80*4c33cb31SAndrew Davis			imx8mm_mipi_csi_out: endpoint {
81*4c33cb31SAndrew Davis				remote-endpoint = <&csi_in>;
82*4c33cb31SAndrew Davis			};
83*4c33cb31SAndrew Davis		};
84*4c33cb31SAndrew Davis	};
85*4c33cb31SAndrew Davis};
86*4c33cb31SAndrew Davis
87*4c33cb31SAndrew Davis&iomuxc {
88*4c33cb31SAndrew Davis	pinctrl_reg_cam: regcamgrp {
89*4c33cb31SAndrew Davis		fsl,pins = <
90*4c33cb31SAndrew Davis			MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1	0x41
91*4c33cb31SAndrew Davis		>;
92*4c33cb31SAndrew Davis	};
93*4c33cb31SAndrew Davis};
94