158497d7aSDavid Jander// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 258497d7aSDavid Jander/* 358497d7aSDavid Jander * Copyright 2020 Protonic Holland 458497d7aSDavid Jander * Copyright 2019 NXP 558497d7aSDavid Jander */ 658497d7aSDavid Jander 758497d7aSDavid Jander/dts-v1/; 858497d7aSDavid Jander 958497d7aSDavid Jander#include <dt-bindings/usb/pd.h> 1058497d7aSDavid Jander#include "imx8mm.dtsi" 1158497d7aSDavid Jander 1258497d7aSDavid Jander/ { 1358497d7aSDavid Jander model = "Protonic PRT8MM"; 1458497d7aSDavid Jander compatible = "prt,prt8mm", "fsl,imx8mm"; 1558497d7aSDavid Jander 1658497d7aSDavid Jander chosen { 1758497d7aSDavid Jander stdout-path = &uart4; 1858497d7aSDavid Jander }; 1958497d7aSDavid Jander 2058497d7aSDavid Jander memory@40000000 { 2158497d7aSDavid Jander device_type = "memory"; 2258497d7aSDavid Jander reg = <0x0 0x40000000 0 0x40000000>; 2358497d7aSDavid Jander }; 2458497d7aSDavid Jander 2558497d7aSDavid Jander leds { 2658497d7aSDavid Jander compatible = "gpio-leds"; 2758497d7aSDavid Jander pinctrl-names = "default"; 2858497d7aSDavid Jander pinctrl-0 = <&pinctrl_gpio_leds>; 2958497d7aSDavid Jander 3058497d7aSDavid Jander debug-led0 { 3158497d7aSDavid Jander label = "DEBUG_LED0"; 3258497d7aSDavid Jander gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; 3358497d7aSDavid Jander linux,default-trigger = "heartbeat"; 3458497d7aSDavid Jander }; 3558497d7aSDavid Jander 3658497d7aSDavid Jander debug-led1 { 3758497d7aSDavid Jander label = "DEBUG_LED1"; 3858497d7aSDavid Jander gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>; 3958497d7aSDavid Jander linux,default-trigger = "cpu"; 4058497d7aSDavid Jander }; 4158497d7aSDavid Jander }; 4258497d7aSDavid Jander 4358497d7aSDavid Jander sound-ssm2518 { 4458497d7aSDavid Jander compatible = "simple-audio-card"; 4558497d7aSDavid Jander simple-audio-card,name = "ssm2518-audio"; 4658497d7aSDavid Jander simple-audio-card,format = "i2s"; 4758497d7aSDavid Jander simple-audio-card,frame-master = <&cpudai>; 4858497d7aSDavid Jander simple-audio-card,bitclock-master = <&cpudai>; 4958497d7aSDavid Jander 5058497d7aSDavid Jander cpudai: simple-audio-card,cpu { 5158497d7aSDavid Jander sound-dai = <&sai3>; 5258497d7aSDavid Jander }; 5358497d7aSDavid Jander 5458497d7aSDavid Jander simple-audio-card,codec { 5558497d7aSDavid Jander sound-dai = <&ssm2518>; 5658497d7aSDavid Jander clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; 5758497d7aSDavid Jander }; 5858497d7aSDavid Jander }; 5958497d7aSDavid Jander}; 6058497d7aSDavid Jander 6158497d7aSDavid Jander&i2c1 { 6258497d7aSDavid Jander clock-frequency = <400000>; 6358497d7aSDavid Jander pinctrl-names = "default"; 6458497d7aSDavid Jander pinctrl-0 = <&pinctrl_i2c1>; 6558497d7aSDavid Jander status = "okay"; 6658497d7aSDavid Jander 6758497d7aSDavid Jander ssm2518: audio-codec@34 { 6858497d7aSDavid Jander compatible = "adi,ssm2518"; 6958497d7aSDavid Jander reg = <0x34>; 7058497d7aSDavid Jander #sound-dai-cells = <0>; 7158497d7aSDavid Jander }; 7258497d7aSDavid Jander}; 7358497d7aSDavid Jander 7458497d7aSDavid Jander&i2c2 { 7558497d7aSDavid Jander clock-frequency = <400000>; 7658497d7aSDavid Jander pinctrl-names = "default"; 7758497d7aSDavid Jander pinctrl-0 = <&pinctrl_i2c2>; 7858497d7aSDavid Jander status = "okay"; 7958497d7aSDavid Jander 8058497d7aSDavid Jander regulator@60 { 8158497d7aSDavid Jander compatible = "fcs,fan53555"; 8258497d7aSDavid Jander reg = <0x60>; 8358497d7aSDavid Jander regulator-name = "0V9_CORE"; 8458497d7aSDavid Jander regulator-min-microvolt = <900000>; 8558497d7aSDavid Jander regulator-max-microvolt = <980000>; 8658497d7aSDavid Jander regulator-boot-on; 8758497d7aSDavid Jander regulator-always-on; 8858497d7aSDavid Jander }; 8958497d7aSDavid Jander}; 9058497d7aSDavid Jander 9158497d7aSDavid Jander&i2c3 { 9258497d7aSDavid Jander clock-frequency = <400000>; 9358497d7aSDavid Jander pinctrl-names = "default"; 9458497d7aSDavid Jander pinctrl-0 = <&pinctrl_i2c3>; 9558497d7aSDavid Jander status = "okay"; 9658497d7aSDavid Jander 9758497d7aSDavid Jander rtc@51 { 9858497d7aSDavid Jander compatible = "nxp,pcf85363"; 9958497d7aSDavid Jander reg = <0x51>; 10058497d7aSDavid Jander }; 10158497d7aSDavid Jander 10258497d7aSDavid Jander touchscreeen@5d { 10358497d7aSDavid Jander compatible = "goodix,gt911"; 10458497d7aSDavid Jander reg = <0x5d>; 10558497d7aSDavid Jander pinctrl-names = "default"; 10658497d7aSDavid Jander pinctrl-0 = <&pinctrl_touchscreen>; 10758497d7aSDavid Jander interrupt-parent = <&gpio1>; 10858497d7aSDavid Jander interrupts = <8 IRQ_TYPE_NONE>; 10958497d7aSDavid Jander irq-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 11058497d7aSDavid Jander reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 11158497d7aSDavid Jander }; 11258497d7aSDavid Jander 11358497d7aSDavid Jander temp-sense@70 { 11458497d7aSDavid Jander compatible = "ti,tmp103"; 11558497d7aSDavid Jander reg = <0x70>; 11658497d7aSDavid Jander }; 11758497d7aSDavid Jander}; 11858497d7aSDavid Jander 11958497d7aSDavid Jander&sai3 { 12058497d7aSDavid Jander pinctrl-names = "default"; 12158497d7aSDavid Jander pinctrl-0 = <&pinctrl_sai3>; 12258497d7aSDavid Jander assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 12358497d7aSDavid Jander assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 12458497d7aSDavid Jander assigned-clock-rates = <12288000>; 12558497d7aSDavid Jander fsl,sai-mclk-direction-output; 12658497d7aSDavid Jander fsl,sai-asynchronous; 12758497d7aSDavid Jander status = "okay"; 12858497d7aSDavid Jander}; 12958497d7aSDavid Jander 13058497d7aSDavid Jander&snvs_pwrkey { 13158497d7aSDavid Jander status = "okay"; 13258497d7aSDavid Jander}; 13358497d7aSDavid Jander 13458497d7aSDavid Jander&uart4 { 13558497d7aSDavid Jander pinctrl-names = "default"; 13658497d7aSDavid Jander pinctrl-0 = <&pinctrl_uart4>; 13758497d7aSDavid Jander status = "okay"; 13858497d7aSDavid Jander}; 13958497d7aSDavid Jander 14058497d7aSDavid Jander&usbotg1 { 14158497d7aSDavid Jander pinctrl-names = "default"; 14258497d7aSDavid Jander pinctrl-0 = <&pinctrl_usbotg1>; 14358497d7aSDavid Jander dr_mode = "host"; 14458497d7aSDavid Jander disable-over-current; 14558497d7aSDavid Jander power-active-high; 14658497d7aSDavid Jander status = "okay"; 14758497d7aSDavid Jander}; 14858497d7aSDavid Jander 14958497d7aSDavid Jander&usdhc2 { 15058497d7aSDavid Jander pinctrl-names = "default"; 15158497d7aSDavid Jander pinctrl-0 = <&pinctrl_usdhc2>; 15258497d7aSDavid Jander assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; 15358497d7aSDavid Jander assigned-clock-rates = <100000000>; 15458497d7aSDavid Jander cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 15558497d7aSDavid Jander bus-width = <4>; 15658497d7aSDavid Jander status = "okay"; 15758497d7aSDavid Jander}; 15858497d7aSDavid Jander 15958497d7aSDavid Jander&usdhc3 { 16058497d7aSDavid Jander pinctrl-names = "default", "state_100mhz", "state_200mhz"; 16158497d7aSDavid Jander pinctrl-0 = <&pinctrl_usdhc3>; 16258497d7aSDavid Jander pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 16358497d7aSDavid Jander pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 16458497d7aSDavid Jander assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>; 16558497d7aSDavid Jander assigned-clock-rates = <400000000>; 16658497d7aSDavid Jander bus-width = <8>; 16758497d7aSDavid Jander non-removable; 16858497d7aSDavid Jander no-sdio; 16958497d7aSDavid Jander no-sd; 17058497d7aSDavid Jander status = "okay"; 17158497d7aSDavid Jander}; 17258497d7aSDavid Jander 17358497d7aSDavid Jander&wdog1 { 17458497d7aSDavid Jander pinctrl-names = "default"; 17558497d7aSDavid Jander pinctrl-0 = <&pinctrl_wdog>; 17658497d7aSDavid Jander fsl,ext-reset-output; 17758497d7aSDavid Jander status = "okay"; 17858497d7aSDavid Jander}; 17958497d7aSDavid Jander 18058497d7aSDavid Jander&iomuxc { 18158497d7aSDavid Jander pinctrl_gpio_leds: ledsgrp { 18258497d7aSDavid Jander fsl,pins = < 18358497d7aSDavid Jander MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x00 18458497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x00 18558497d7aSDavid Jander >; 18658497d7aSDavid Jander }; 18758497d7aSDavid Jander 18858497d7aSDavid Jander pinctrl_i2c1: i2c1grp { 18958497d7aSDavid Jander fsl,pins = < 19058497d7aSDavid Jander MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c3 19158497d7aSDavid Jander MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c3 19258497d7aSDavid Jander >; 19358497d7aSDavid Jander }; 19458497d7aSDavid Jander 19558497d7aSDavid Jander pinctrl_i2c2: i2c2grp { 19658497d7aSDavid Jander fsl,pins = < 19758497d7aSDavid Jander MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400000c3 19858497d7aSDavid Jander MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000c3 19958497d7aSDavid Jander >; 20058497d7aSDavid Jander }; 20158497d7aSDavid Jander 20258497d7aSDavid Jander pinctrl_i2c3: i2c3grp { 20358497d7aSDavid Jander fsl,pins = < 20458497d7aSDavid Jander MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c3 20558497d7aSDavid Jander MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c3 20658497d7aSDavid Jander >; 20758497d7aSDavid Jander }; 20858497d7aSDavid Jander 20958497d7aSDavid Jander pinctrl_sai3: sai3grp { 21058497d7aSDavid Jander fsl,pins = < 21158497d7aSDavid Jander MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 21258497d7aSDavid Jander MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 21358497d7aSDavid Jander MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 21458497d7aSDavid Jander MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 21558497d7aSDavid Jander >; 21658497d7aSDavid Jander }; 21758497d7aSDavid Jander 21858497d7aSDavid Jander pinctrl_touchscreen: tsgrp { 21958497d7aSDavid Jander fsl,pins = < 22058497d7aSDavid Jander MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x80 22158497d7aSDavid Jander MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80 22258497d7aSDavid Jander >; 22358497d7aSDavid Jander }; 22458497d7aSDavid Jander 22558497d7aSDavid Jander pinctrl_uart4: uart4grp { 22658497d7aSDavid Jander fsl,pins = < 22758497d7aSDavid Jander MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040 22858497d7aSDavid Jander MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040 22958497d7aSDavid Jander >; 23058497d7aSDavid Jander }; 23158497d7aSDavid Jander 23258497d7aSDavid Jander pinctrl_usbotg1: usbotg1grp { 23358497d7aSDavid Jander fsl,pins = < 23458497d7aSDavid Jander MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x000 23558497d7aSDavid Jander MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x000 23658497d7aSDavid Jander >; 23758497d7aSDavid Jander }; 23858497d7aSDavid Jander 23958497d7aSDavid Jander pinctrl_usdhc2: usdhc2grp { 24058497d7aSDavid Jander fsl,pins = < 24158497d7aSDavid Jander MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 24258497d7aSDavid Jander MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 24358497d7aSDavid Jander MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 24458497d7aSDavid Jander MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 24558497d7aSDavid Jander MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 24658497d7aSDavid Jander MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 24758497d7aSDavid Jander MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x0d4 24858497d7aSDavid Jander >; 24958497d7aSDavid Jander }; 25058497d7aSDavid Jander 25158497d7aSDavid Jander pinctrl_usdhc3: usdhc3grp { 25258497d7aSDavid Jander fsl,pins = < 25358497d7aSDavid Jander MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 25458497d7aSDavid Jander MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 25558497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 25658497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 25758497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 25858497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 25958497d7aSDavid Jander MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 26058497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 26158497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 26258497d7aSDavid Jander MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 26358497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 26458497d7aSDavid Jander >; 26558497d7aSDavid Jander }; 26658497d7aSDavid Jander 267*cb562eddSPeng Fan pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 26858497d7aSDavid Jander fsl,pins = < 26958497d7aSDavid Jander MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 27058497d7aSDavid Jander MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 27158497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 27258497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 27358497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 27458497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 27558497d7aSDavid Jander MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 27658497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 27758497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 27858497d7aSDavid Jander MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 27958497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 28058497d7aSDavid Jander >; 28158497d7aSDavid Jander }; 28258497d7aSDavid Jander 283*cb562eddSPeng Fan pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 28458497d7aSDavid Jander fsl,pins = < 28558497d7aSDavid Jander MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 28658497d7aSDavid Jander MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 28758497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 28858497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 28958497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 29058497d7aSDavid Jander MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 29158497d7aSDavid Jander MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 29258497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 29358497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 29458497d7aSDavid Jander MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 29558497d7aSDavid Jander MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 29658497d7aSDavid Jander >; 29758497d7aSDavid Jander }; 29858497d7aSDavid Jander 29958497d7aSDavid Jander pinctrl_wdog: wdoggrp { 30058497d7aSDavid Jander fsl,pins = < 30158497d7aSDavid Jander MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 30258497d7aSDavid Jander >; 30358497d7aSDavid Jander }; 30458497d7aSDavid Jander}; 305