1aa3457d4SWasim Khan// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2aa3457d4SWasim Khan//
3aa3457d4SWasim Khan// Device Tree file for LX2160A BLUEBOX3
4aa3457d4SWasim Khan//
5aa3457d4SWasim Khan// Copyright 2020-2021 NXP
6aa3457d4SWasim Khan
7aa3457d4SWasim Khan/dts-v1/;
8aa3457d4SWasim Khan
9aa3457d4SWasim Khan#include "fsl-lx2160a.dtsi"
10aa3457d4SWasim Khan
11aa3457d4SWasim Khan/ {
12aa3457d4SWasim Khan	model = "NXP Layerscape LX2160ABLUEBOX3";
13aa3457d4SWasim Khan	compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
14aa3457d4SWasim Khan
15aa3457d4SWasim Khan	aliases {
16aa3457d4SWasim Khan		crypto = &crypto;
17aa3457d4SWasim Khan		mmc0 = &esdhc0;
18aa3457d4SWasim Khan		mmc1 = &esdhc1;
19aa3457d4SWasim Khan		serial0 = &uart0;
20aa3457d4SWasim Khan	};
21aa3457d4SWasim Khan
22aa3457d4SWasim Khan	chosen {
23aa3457d4SWasim Khan		stdout-path = "serial0:115200n8";
24aa3457d4SWasim Khan	};
25aa3457d4SWasim Khan
26aa3457d4SWasim Khan	sb_3v3: regulator-sb3v3 {
27aa3457d4SWasim Khan		compatible = "regulator-fixed";
28aa3457d4SWasim Khan		regulator-name = "MC34717-3.3VSB";
29aa3457d4SWasim Khan		regulator-min-microvolt = <3300000>;
30aa3457d4SWasim Khan		regulator-max-microvolt = <3300000>;
31aa3457d4SWasim Khan		regulator-boot-on;
32aa3457d4SWasim Khan		regulator-always-on;
33aa3457d4SWasim Khan	};
34aa3457d4SWasim Khan};
35aa3457d4SWasim Khan
36aa3457d4SWasim Khan&can0 {
37aa3457d4SWasim Khan	status = "okay";
38aa3457d4SWasim Khan
39aa3457d4SWasim Khan	can-transceiver {
40aa3457d4SWasim Khan		max-bitrate = <5000000>;
41aa3457d4SWasim Khan	};
42aa3457d4SWasim Khan};
43aa3457d4SWasim Khan
44aa3457d4SWasim Khan&can1 {
45aa3457d4SWasim Khan	status = "okay";
46aa3457d4SWasim Khan
47aa3457d4SWasim Khan	can-transceiver {
48aa3457d4SWasim Khan		max-bitrate = <5000000>;
49aa3457d4SWasim Khan	};
50aa3457d4SWasim Khan};
51aa3457d4SWasim Khan
52aa3457d4SWasim Khan&crypto {
53aa3457d4SWasim Khan	status = "okay";
54aa3457d4SWasim Khan};
55aa3457d4SWasim Khan
56aa3457d4SWasim Khan&dpmac5 {
57aa3457d4SWasim Khan	phy-handle = <&aqr113c_phy1>;
58aa3457d4SWasim Khan	phy-mode = "usxgmii";
59aa3457d4SWasim Khan	managed = "in-band-status";
60aa3457d4SWasim Khan};
61aa3457d4SWasim Khan
62aa3457d4SWasim Khan&dpmac6 {
63aa3457d4SWasim Khan	phy-handle = <&aqr113c_phy2>;
64aa3457d4SWasim Khan	phy-mode = "usxgmii";
65aa3457d4SWasim Khan	managed = "in-band-status";
66aa3457d4SWasim Khan};
67aa3457d4SWasim Khan
68aa3457d4SWasim Khan&dpmac9 {
69aa3457d4SWasim Khan	phy-handle = <&aqr113c_phy3>;
70aa3457d4SWasim Khan	phy-mode = "usxgmii";
71aa3457d4SWasim Khan	managed = "in-band-status";
72aa3457d4SWasim Khan};
73aa3457d4SWasim Khan
74aa3457d4SWasim Khan&dpmac10 {
75aa3457d4SWasim Khan	phy-handle = <&aqr113c_phy4>;
76aa3457d4SWasim Khan	phy-mode = "usxgmii";
77aa3457d4SWasim Khan	managed = "in-band-status";
78aa3457d4SWasim Khan};
79aa3457d4SWasim Khan
80aa3457d4SWasim Khan&dpmac17 {
81aa3457d4SWasim Khan	phy-mode = "rgmii";
82aa3457d4SWasim Khan	status = "okay";
83aa3457d4SWasim Khan
84aa3457d4SWasim Khan	fixed-link {
85aa3457d4SWasim Khan		speed = <1000>;
86aa3457d4SWasim Khan		full-duplex;
87aa3457d4SWasim Khan	};
88aa3457d4SWasim Khan};
89aa3457d4SWasim Khan
90aa3457d4SWasim Khan&dpmac18 {
91aa3457d4SWasim Khan	phy-mode = "rgmii";
92aa3457d4SWasim Khan	status = "okay";
93aa3457d4SWasim Khan
94aa3457d4SWasim Khan	fixed-link {
95aa3457d4SWasim Khan		speed = <1000>;
96aa3457d4SWasim Khan		full-duplex;
97aa3457d4SWasim Khan	};
98aa3457d4SWasim Khan};
99aa3457d4SWasim Khan
100aa3457d4SWasim Khan&emdio1 {
101aa3457d4SWasim Khan	status = "okay";
102aa3457d4SWasim Khan
103aa3457d4SWasim Khan	aqr113c_phy2: ethernet-phy@0 {
104aa3457d4SWasim Khan		compatible = "ethernet-phy-ieee802.3-c45";
105aa3457d4SWasim Khan		reg = <0x0>;
106aa3457d4SWasim Khan		/* IRQ_10G_PHY2 */
107aa3457d4SWasim Khan		interrupts-extended = <&extirq 3 IRQ_TYPE_LEVEL_LOW>;
108aa3457d4SWasim Khan	};
109aa3457d4SWasim Khan
110aa3457d4SWasim Khan	aqr113c_phy1: ethernet-phy@8 {
111aa3457d4SWasim Khan		compatible = "ethernet-phy-ieee802.3-c45";
112aa3457d4SWasim Khan		reg = <0x8>;
113aa3457d4SWasim Khan		/* IRQ_10G_PHY1 */
114aa3457d4SWasim Khan		interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
115aa3457d4SWasim Khan	};
116aa3457d4SWasim Khan
117aa3457d4SWasim Khan	sw1_mii3_phy: ethernet-phy@5 {
118aa3457d4SWasim Khan		/* AR8035 */
119aa3457d4SWasim Khan		compatible = "ethernet-phy-id004d.d072";
120aa3457d4SWasim Khan		reg = <0x5>;
121aa3457d4SWasim Khan		interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
122aa3457d4SWasim Khan	};
123aa3457d4SWasim Khan
124aa3457d4SWasim Khan	sw2_mii3_phy: ethernet-phy@6 {
125aa3457d4SWasim Khan		/* AR8035 */
126aa3457d4SWasim Khan		compatible = "ethernet-phy-id004d.d072";
127aa3457d4SWasim Khan		reg = <0x6>;
128aa3457d4SWasim Khan		interrupts-extended = <&extirq 7 IRQ_TYPE_LEVEL_LOW>;
129aa3457d4SWasim Khan	};
130aa3457d4SWasim Khan};
131aa3457d4SWasim Khan
132aa3457d4SWasim Khan&emdio2 {
133aa3457d4SWasim Khan	status = "okay";
134aa3457d4SWasim Khan
135aa3457d4SWasim Khan	aqr113c_phy4: ethernet-phy@0 {
136aa3457d4SWasim Khan		compatible = "ethernet-phy-ieee802.3-c45";
137aa3457d4SWasim Khan		reg = <0x0>;
138aa3457d4SWasim Khan		/* IRQ_10G_PHY4 */
139aa3457d4SWasim Khan		interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
140aa3457d4SWasim Khan	};
141aa3457d4SWasim Khan
142aa3457d4SWasim Khan	aqr113c_phy3: ethernet-phy@8 {
143aa3457d4SWasim Khan		compatible = "ethernet-phy-ieee802.3-c45";
144aa3457d4SWasim Khan		reg = <0x8>;
145aa3457d4SWasim Khan		/* IRQ_10G_PHY3 */
146aa3457d4SWasim Khan		interrupts-extended = <&extirq 4 IRQ_TYPE_LEVEL_LOW>;
147aa3457d4SWasim Khan	};
148aa3457d4SWasim Khan};
149aa3457d4SWasim Khan
150aa3457d4SWasim Khan&esdhc0 {
151aa3457d4SWasim Khan	sd-uhs-sdr104;
152aa3457d4SWasim Khan	sd-uhs-sdr50;
153aa3457d4SWasim Khan	sd-uhs-sdr25;
154aa3457d4SWasim Khan	sd-uhs-sdr12;
155aa3457d4SWasim Khan	status = "okay";
156aa3457d4SWasim Khan};
157aa3457d4SWasim Khan
158aa3457d4SWasim Khan&esdhc1 {
159aa3457d4SWasim Khan	mmc-hs200-1_8v;
160aa3457d4SWasim Khan	mmc-hs400-1_8v;
161aa3457d4SWasim Khan	bus-width = <8>;
162aa3457d4SWasim Khan	status = "okay";
163aa3457d4SWasim Khan};
164aa3457d4SWasim Khan
165aa3457d4SWasim Khan&fspi {
166aa3457d4SWasim Khan	status = "okay";
167aa3457d4SWasim Khan
168aa3457d4SWasim Khan	mt35xu512aba0: flash@0 {
169aa3457d4SWasim Khan		compatible = "jedec,spi-nor";
170aa3457d4SWasim Khan		#address-cells = <1>;
171aa3457d4SWasim Khan		#size-cells = <1>;
172aa3457d4SWasim Khan		reg = <0>;
173aa3457d4SWasim Khan		m25p,fast-read;
174aa3457d4SWasim Khan		spi-max-frequency = <50000000>;
175aa3457d4SWasim Khan		spi-rx-bus-width = <8>;
176aa3457d4SWasim Khan		spi-tx-bus-width = <8>;
177aa3457d4SWasim Khan	};
178aa3457d4SWasim Khan
179aa3457d4SWasim Khan	mt35xu512aba1: flash@1 {
180aa3457d4SWasim Khan		compatible = "jedec,spi-nor";
181aa3457d4SWasim Khan		#address-cells = <1>;
182aa3457d4SWasim Khan		#size-cells = <1>;
183aa3457d4SWasim Khan		reg = <1>;
184aa3457d4SWasim Khan		m25p,fast-read;
185aa3457d4SWasim Khan		spi-max-frequency = <50000000>;
186aa3457d4SWasim Khan		spi-rx-bus-width = <8>;
187aa3457d4SWasim Khan		spi-tx-bus-width = <8>;
188aa3457d4SWasim Khan	};
189aa3457d4SWasim Khan};
190aa3457d4SWasim Khan
191aa3457d4SWasim Khan&i2c0 {
192aa3457d4SWasim Khan	status = "okay";
193aa3457d4SWasim Khan
194aa3457d4SWasim Khan	i2c-mux@77 {
195aa3457d4SWasim Khan		compatible = "nxp,pca9547";
196aa3457d4SWasim Khan		reg = <0x77>;
197aa3457d4SWasim Khan		#address-cells = <1>;
198aa3457d4SWasim Khan		#size-cells = <0>;
199aa3457d4SWasim Khan
200aa3457d4SWasim Khan		i2c@2 {
201aa3457d4SWasim Khan			#address-cells = <1>;
202aa3457d4SWasim Khan			#size-cells = <0>;
203aa3457d4SWasim Khan			reg = <0x2>;
204aa3457d4SWasim Khan
205aa3457d4SWasim Khan			power-monitor@40 {
206aa3457d4SWasim Khan				compatible = "ti,ina220";
207aa3457d4SWasim Khan				reg = <0x40>;
208aa3457d4SWasim Khan				shunt-resistor = <500>;
209aa3457d4SWasim Khan			};
210aa3457d4SWasim Khan		};
211aa3457d4SWasim Khan
212aa3457d4SWasim Khan		i2c@3 {
213aa3457d4SWasim Khan			#address-cells = <1>;
214aa3457d4SWasim Khan			#size-cells = <0>;
215aa3457d4SWasim Khan			reg = <0x3>;
216aa3457d4SWasim Khan
217aa3457d4SWasim Khan			temp2: temperature-sensor@48 {
218aa3457d4SWasim Khan				compatible = "nxp,sa56004";
219aa3457d4SWasim Khan				reg = <0x48>;
220aa3457d4SWasim Khan				vcc-supply = <&sb_3v3>;
221aa3457d4SWasim Khan				#thermal-sensor-cells = <1>;
222aa3457d4SWasim Khan			};
223aa3457d4SWasim Khan
224aa3457d4SWasim Khan			temp1: temperature-sensor@4c {
225aa3457d4SWasim Khan				compatible = "nxp,sa56004";
226aa3457d4SWasim Khan				reg = <0x4c>;
227aa3457d4SWasim Khan				vcc-supply = <&sb_3v3>;
228aa3457d4SWasim Khan				#thermal-sensor-cells = <1>;
229aa3457d4SWasim Khan			};
230aa3457d4SWasim Khan		};
231aa3457d4SWasim Khan
232aa3457d4SWasim Khan		i2c@4 {
233aa3457d4SWasim Khan			#address-cells = <1>;
234aa3457d4SWasim Khan			#size-cells = <0>;
235aa3457d4SWasim Khan			reg = <0x4>;
236aa3457d4SWasim Khan
237aa3457d4SWasim Khan			rtc@51 {
238aa3457d4SWasim Khan				compatible = "nxp,pcf2129";
239aa3457d4SWasim Khan				reg = <0x51>;
240aa3457d4SWasim Khan				interrupts-extended = <&extirq 11 IRQ_TYPE_LEVEL_LOW>;
241aa3457d4SWasim Khan			};
242aa3457d4SWasim Khan		};
243aa3457d4SWasim Khan
244aa3457d4SWasim Khan		i2c@7 {
245aa3457d4SWasim Khan			#address-cells = <1>;
246aa3457d4SWasim Khan			#size-cells = <0>;
247aa3457d4SWasim Khan			reg = <0x7>;
248aa3457d4SWasim Khan
249aa3457d4SWasim Khan			i2c-mux@75 {
250aa3457d4SWasim Khan				compatible = "nxp,pca9547";
251aa3457d4SWasim Khan				reg = <0x75>;
252aa3457d4SWasim Khan				#address-cells = <1>;
253aa3457d4SWasim Khan				#size-cells = <0>;
254aa3457d4SWasim Khan
255aa3457d4SWasim Khan				i2c@0 {
256aa3457d4SWasim Khan					#address-cells = <1>;
257aa3457d4SWasim Khan					#size-cells = <0>;
258aa3457d4SWasim Khan					reg = <0x0>;
259aa3457d4SWasim Khan
260aa3457d4SWasim Khan					spi_bridge: spi@28 {
261aa3457d4SWasim Khan						compatible = "nxp,sc18is602b";
262aa3457d4SWasim Khan						reg = <0x28>;
263aa3457d4SWasim Khan						#address-cells = <1>;
264aa3457d4SWasim Khan						#size-cells = <0>;
265aa3457d4SWasim Khan					};
266aa3457d4SWasim Khan				};
267aa3457d4SWasim Khan			};
268aa3457d4SWasim Khan		};
269aa3457d4SWasim Khan	};
270aa3457d4SWasim Khan};
271aa3457d4SWasim Khan
272aa3457d4SWasim Khan&i2c5 {
273aa3457d4SWasim Khan	status = "okay";
274aa3457d4SWasim Khan
275aa3457d4SWasim Khan	i2c-mux@77 {
276aa3457d4SWasim Khan		compatible = "nxp,pca9846";
277aa3457d4SWasim Khan		reg = <0x77>;
278aa3457d4SWasim Khan		#address-cells = <1>;
279aa3457d4SWasim Khan		#size-cells = <0>;
280aa3457d4SWasim Khan
281aa3457d4SWasim Khan		i2c@1 {
282aa3457d4SWasim Khan			#address-cells = <1>;
283aa3457d4SWasim Khan			#size-cells = <0>;
284aa3457d4SWasim Khan			reg = <0x1>;
285aa3457d4SWasim Khan
286aa3457d4SWasim Khan			/* The I2C multiplexer and temperature sensors are on
287aa3457d4SWasim Khan			 * the T6 riser card.
288aa3457d4SWasim Khan			 */
289aa3457d4SWasim Khan			i2c-mux@70 {
290aa3457d4SWasim Khan				compatible = "nxp,pca9548";
291aa3457d4SWasim Khan				reg = <0x70>;
292aa3457d4SWasim Khan				#address-cells = <1>;
293aa3457d4SWasim Khan				#size-cells = <0>;
294aa3457d4SWasim Khan
295aa3457d4SWasim Khan				i2c@6 {
296aa3457d4SWasim Khan					#address-cells = <1>;
297aa3457d4SWasim Khan					#size-cells = <0>;
298aa3457d4SWasim Khan					reg = <0x6>;
299aa3457d4SWasim Khan
300aa3457d4SWasim Khan					q12: temperature-sensor@4c {
301aa3457d4SWasim Khan						compatible = "nxp,sa56004";
302aa3457d4SWasim Khan						reg = <0x4c>;
303aa3457d4SWasim Khan						vcc-supply = <&sb_3v3>;
304aa3457d4SWasim Khan						#thermal-sensor-cells = <1>;
305aa3457d4SWasim Khan					};
306aa3457d4SWasim Khan				};
307aa3457d4SWasim Khan
308aa3457d4SWasim Khan				i2c@7 {
309aa3457d4SWasim Khan					#address-cells = <1>;
310aa3457d4SWasim Khan					#size-cells = <0>;
311aa3457d4SWasim Khan					reg = <0x7>;
312aa3457d4SWasim Khan
313aa3457d4SWasim Khan					q11: temperature-sensor@4c {
314aa3457d4SWasim Khan						compatible = "nxp,sa56004";
315aa3457d4SWasim Khan						reg = <0x4c>;
316aa3457d4SWasim Khan						vcc-supply = <&sb_3v3>;
317aa3457d4SWasim Khan						#thermal-sensor-cells = <1>;
318aa3457d4SWasim Khan					};
319aa3457d4SWasim Khan
320aa3457d4SWasim Khan					q13: temperature-sensor@48 {
321aa3457d4SWasim Khan						compatible = "nxp,sa56004";
322aa3457d4SWasim Khan						reg = <0x48>;
323aa3457d4SWasim Khan						vcc-supply = <&sb_3v3>;
324aa3457d4SWasim Khan						#thermal-sensor-cells = <1>;
325aa3457d4SWasim Khan					};
326aa3457d4SWasim Khan
327aa3457d4SWasim Khan					q14: temperature-sensor@4a {
328aa3457d4SWasim Khan						compatible = "nxp,sa56004";
329aa3457d4SWasim Khan						reg = <0x4a>;
330aa3457d4SWasim Khan						vcc-supply = <&sb_3v3>;
331aa3457d4SWasim Khan						#thermal-sensor-cells = <1>;
332aa3457d4SWasim Khan					};
333aa3457d4SWasim Khan				};
334aa3457d4SWasim Khan			};
335aa3457d4SWasim Khan		};
336aa3457d4SWasim Khan	};
337aa3457d4SWasim Khan};
338aa3457d4SWasim Khan
339aa3457d4SWasim Khan&pcs_mdio5 {
340aa3457d4SWasim Khan	status = "okay";
341aa3457d4SWasim Khan};
342aa3457d4SWasim Khan
343aa3457d4SWasim Khan&pcs_mdio6 {
344aa3457d4SWasim Khan	status = "okay";
345aa3457d4SWasim Khan};
346aa3457d4SWasim Khan
347aa3457d4SWasim Khan&pcs_mdio9 {
348aa3457d4SWasim Khan	status = "okay";
349aa3457d4SWasim Khan};
350aa3457d4SWasim Khan
351aa3457d4SWasim Khan&pcs_mdio10 {
352aa3457d4SWasim Khan	status = "okay";
353aa3457d4SWasim Khan};
354aa3457d4SWasim Khan
355aa3457d4SWasim Khan&spi_bridge {
356aa3457d4SWasim Khan	sw1: ethernet-switch@0 {
357aa3457d4SWasim Khan		compatible = "nxp,sja1110a";
358aa3457d4SWasim Khan		reg = <0>;
359aa3457d4SWasim Khan		spi-max-frequency = <4000000>;
360aa3457d4SWasim Khan		spi-cpol;
361aa3457d4SWasim Khan		dsa,member = <0 0>;
362aa3457d4SWasim Khan
363aa3457d4SWasim Khan		ethernet-ports {
364aa3457d4SWasim Khan			#address-cells = <1>;
365aa3457d4SWasim Khan			#size-cells = <0>;
366aa3457d4SWasim Khan
367aa3457d4SWasim Khan			/* Microcontroller port */
368aa3457d4SWasim Khan			port@0 {
369aa3457d4SWasim Khan				reg = <0>;
370aa3457d4SWasim Khan				status = "disabled";
371aa3457d4SWasim Khan			};
372aa3457d4SWasim Khan
373aa3457d4SWasim Khan			/* SW1_P1 */
374aa3457d4SWasim Khan			port@1 {
375aa3457d4SWasim Khan				reg = <1>;
376aa3457d4SWasim Khan				label = "con_2x20";
377aa3457d4SWasim Khan				phy-mode = "sgmii";
378aa3457d4SWasim Khan
379aa3457d4SWasim Khan				fixed-link {
380aa3457d4SWasim Khan					speed = <1000>;
381aa3457d4SWasim Khan					full-duplex;
382aa3457d4SWasim Khan				};
383aa3457d4SWasim Khan			};
384aa3457d4SWasim Khan
385aa3457d4SWasim Khan			port@2 {
386aa3457d4SWasim Khan				reg = <2>;
387aa3457d4SWasim Khan				ethernet = <&dpmac17>;
388aa3457d4SWasim Khan				phy-mode = "rgmii-id";
389*25501d8dSVladimir Oltean				rx-internal-delay-ps = <2000>;
390*25501d8dSVladimir Oltean				tx-internal-delay-ps = <2000>;
391aa3457d4SWasim Khan
392aa3457d4SWasim Khan				fixed-link {
393aa3457d4SWasim Khan					speed = <1000>;
394aa3457d4SWasim Khan					full-duplex;
395aa3457d4SWasim Khan				};
396aa3457d4SWasim Khan			};
397aa3457d4SWasim Khan
398aa3457d4SWasim Khan			port@3 {
399aa3457d4SWasim Khan				reg = <3>;
400aa3457d4SWasim Khan				label = "1ge_p1";
401aa3457d4SWasim Khan				phy-mode = "rgmii-id";
402aa3457d4SWasim Khan				phy-handle = <&sw1_mii3_phy>;
403aa3457d4SWasim Khan			};
404aa3457d4SWasim Khan
405aa3457d4SWasim Khan			sw1p4: port@4 {
406aa3457d4SWasim Khan				reg = <4>;
407aa3457d4SWasim Khan				link = <&sw2p1>;
408aa3457d4SWasim Khan				phy-mode = "sgmii";
409aa3457d4SWasim Khan
410aa3457d4SWasim Khan				fixed-link {
411aa3457d4SWasim Khan					speed = <1000>;
412aa3457d4SWasim Khan					full-duplex;
413aa3457d4SWasim Khan				};
414aa3457d4SWasim Khan			};
415aa3457d4SWasim Khan
416aa3457d4SWasim Khan			port@5 {
417aa3457d4SWasim Khan				reg = <5>;
418aa3457d4SWasim Khan				label = "trx1";
419aa3457d4SWasim Khan				phy-mode = "internal";
420aa3457d4SWasim Khan				phy-handle = <&sw1_port5_base_t1_phy>;
421aa3457d4SWasim Khan			};
422aa3457d4SWasim Khan
423aa3457d4SWasim Khan			port@6 {
424aa3457d4SWasim Khan				reg = <6>;
425aa3457d4SWasim Khan				label = "trx2";
426aa3457d4SWasim Khan				phy-mode = "internal";
427aa3457d4SWasim Khan				phy-handle = <&sw1_port6_base_t1_phy>;
428aa3457d4SWasim Khan			};
429aa3457d4SWasim Khan
430aa3457d4SWasim Khan			port@7 {
431aa3457d4SWasim Khan				reg = <7>;
432aa3457d4SWasim Khan				label = "trx3";
433aa3457d4SWasim Khan				phy-mode = "internal";
434aa3457d4SWasim Khan				phy-handle = <&sw1_port7_base_t1_phy>;
435aa3457d4SWasim Khan			};
436aa3457d4SWasim Khan
437aa3457d4SWasim Khan			port@8 {
438aa3457d4SWasim Khan				reg = <8>;
439aa3457d4SWasim Khan				label = "trx4";
440aa3457d4SWasim Khan				phy-mode = "internal";
441aa3457d4SWasim Khan				phy-handle = <&sw1_port8_base_t1_phy>;
442aa3457d4SWasim Khan			};
443aa3457d4SWasim Khan
444aa3457d4SWasim Khan			port@9 {
445aa3457d4SWasim Khan				reg = <9>;
446aa3457d4SWasim Khan				label = "trx5";
447aa3457d4SWasim Khan				phy-mode = "internal";
448aa3457d4SWasim Khan				phy-handle = <&sw1_port9_base_t1_phy>;
449aa3457d4SWasim Khan			};
450aa3457d4SWasim Khan
451aa3457d4SWasim Khan			port@a {
452aa3457d4SWasim Khan				reg = <10>;
453aa3457d4SWasim Khan				label = "trx6";
454aa3457d4SWasim Khan				phy-mode = "internal";
455aa3457d4SWasim Khan				phy-handle = <&sw1_port10_base_t1_phy>;
456aa3457d4SWasim Khan			};
457aa3457d4SWasim Khan		};
458aa3457d4SWasim Khan
459aa3457d4SWasim Khan		mdios {
460aa3457d4SWasim Khan			#address-cells = <1>;
461aa3457d4SWasim Khan			#size-cells = <0>;
462aa3457d4SWasim Khan
463aa3457d4SWasim Khan			mdio@0 {
464aa3457d4SWasim Khan				compatible = "nxp,sja1110-base-t1-mdio";
465aa3457d4SWasim Khan				#address-cells = <1>;
466aa3457d4SWasim Khan				#size-cells = <0>;
467aa3457d4SWasim Khan				reg = <0>;
468aa3457d4SWasim Khan
469aa3457d4SWasim Khan				sw1_port5_base_t1_phy: ethernet-phy@1 {
470aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
471aa3457d4SWasim Khan					reg = <0x1>;
472aa3457d4SWasim Khan				};
473aa3457d4SWasim Khan
474aa3457d4SWasim Khan				sw1_port6_base_t1_phy: ethernet-phy@2 {
475aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
476aa3457d4SWasim Khan					reg = <0x2>;
477aa3457d4SWasim Khan				};
478aa3457d4SWasim Khan
479aa3457d4SWasim Khan				sw1_port7_base_t1_phy: ethernet-phy@3 {
480aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
481aa3457d4SWasim Khan					reg = <0x3>;
482aa3457d4SWasim Khan				};
483aa3457d4SWasim Khan
484aa3457d4SWasim Khan				sw1_port8_base_t1_phy: ethernet-phy@4 {
485aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
486aa3457d4SWasim Khan					reg = <0x4>;
487aa3457d4SWasim Khan				};
488aa3457d4SWasim Khan
489aa3457d4SWasim Khan				sw1_port9_base_t1_phy: ethernet-phy@5 {
490aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
491aa3457d4SWasim Khan					reg = <0x5>;
492aa3457d4SWasim Khan				};
493aa3457d4SWasim Khan
494aa3457d4SWasim Khan				sw1_port10_base_t1_phy: ethernet-phy@6 {
495aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
496aa3457d4SWasim Khan					reg = <0x6>;
497aa3457d4SWasim Khan				};
498aa3457d4SWasim Khan			};
499aa3457d4SWasim Khan		};
500aa3457d4SWasim Khan	};
501aa3457d4SWasim Khan
502aa3457d4SWasim Khan	sw2: ethernet-switch@2 {
503aa3457d4SWasim Khan		compatible = "nxp,sja1110a";
504aa3457d4SWasim Khan		reg = <2>;
505aa3457d4SWasim Khan		spi-max-frequency = <4000000>;
506aa3457d4SWasim Khan		spi-cpol;
507aa3457d4SWasim Khan		dsa,member = <0 1>;
508aa3457d4SWasim Khan
509aa3457d4SWasim Khan		ethernet-ports {
510aa3457d4SWasim Khan			#address-cells = <1>;
511aa3457d4SWasim Khan			#size-cells = <0>;
512aa3457d4SWasim Khan
513aa3457d4SWasim Khan			/* Microcontroller port */
514aa3457d4SWasim Khan			port@0 {
515aa3457d4SWasim Khan				reg = <0>;
516aa3457d4SWasim Khan				status = "disabled";
517aa3457d4SWasim Khan			};
518aa3457d4SWasim Khan
519aa3457d4SWasim Khan			sw2p1: port@1 {
520aa3457d4SWasim Khan				reg = <1>;
521aa3457d4SWasim Khan				link = <&sw1p4>;
522aa3457d4SWasim Khan				phy-mode = "sgmii";
523aa3457d4SWasim Khan
524aa3457d4SWasim Khan				fixed-link {
525aa3457d4SWasim Khan					speed = <1000>;
526aa3457d4SWasim Khan					full-duplex;
527aa3457d4SWasim Khan				};
528aa3457d4SWasim Khan			};
529aa3457d4SWasim Khan
530aa3457d4SWasim Khan			port@2 {
531aa3457d4SWasim Khan				reg = <2>;
532aa3457d4SWasim Khan				ethernet = <&dpmac18>;
533aa3457d4SWasim Khan				phy-mode = "rgmii-id";
534*25501d8dSVladimir Oltean				rx-internal-delay-ps = <2000>;
535*25501d8dSVladimir Oltean				tx-internal-delay-ps = <2000>;
536aa3457d4SWasim Khan
537aa3457d4SWasim Khan				fixed-link {
538aa3457d4SWasim Khan					speed = <1000>;
539aa3457d4SWasim Khan					full-duplex;
540aa3457d4SWasim Khan				};
541aa3457d4SWasim Khan			};
542aa3457d4SWasim Khan
543aa3457d4SWasim Khan			port@3 {
544aa3457d4SWasim Khan				reg = <3>;
545aa3457d4SWasim Khan				label = "1ge_p2";
546aa3457d4SWasim Khan				phy-mode = "rgmii-id";
547aa3457d4SWasim Khan				phy-handle = <&sw2_mii3_phy>;
548aa3457d4SWasim Khan			};
549aa3457d4SWasim Khan
550aa3457d4SWasim Khan			port@4 {
551aa3457d4SWasim Khan				reg = <4>;
552aa3457d4SWasim Khan				label = "to_sw3";
553aa3457d4SWasim Khan				phy-mode = "2500base-x";
554aa3457d4SWasim Khan
555aa3457d4SWasim Khan				fixed-link {
556aa3457d4SWasim Khan					speed = <2500>;
557aa3457d4SWasim Khan					full-duplex;
558aa3457d4SWasim Khan				};
559aa3457d4SWasim Khan			};
560aa3457d4SWasim Khan
561aa3457d4SWasim Khan			port@5 {
562aa3457d4SWasim Khan				reg = <5>;
563aa3457d4SWasim Khan				label = "trx7";
564aa3457d4SWasim Khan				phy-mode = "internal";
565aa3457d4SWasim Khan				phy-handle = <&sw2_port5_base_t1_phy>;
566aa3457d4SWasim Khan			};
567aa3457d4SWasim Khan
568aa3457d4SWasim Khan			port@6 {
569aa3457d4SWasim Khan				reg = <6>;
570aa3457d4SWasim Khan				label = "trx8";
571aa3457d4SWasim Khan				phy-mode = "internal";
572aa3457d4SWasim Khan				phy-handle = <&sw2_port6_base_t1_phy>;
573aa3457d4SWasim Khan			};
574aa3457d4SWasim Khan
575aa3457d4SWasim Khan			port@7 {
576aa3457d4SWasim Khan				reg = <7>;
577aa3457d4SWasim Khan				label = "trx9";
578aa3457d4SWasim Khan				phy-mode = "internal";
579aa3457d4SWasim Khan				phy-handle = <&sw2_port7_base_t1_phy>;
580aa3457d4SWasim Khan			};
581aa3457d4SWasim Khan
582aa3457d4SWasim Khan			port@8 {
583aa3457d4SWasim Khan				reg = <8>;
584aa3457d4SWasim Khan				label = "trx10";
585aa3457d4SWasim Khan				phy-mode = "internal";
586aa3457d4SWasim Khan				phy-handle = <&sw2_port8_base_t1_phy>;
587aa3457d4SWasim Khan			};
588aa3457d4SWasim Khan
589aa3457d4SWasim Khan			port@9 {
590aa3457d4SWasim Khan				reg = <9>;
591aa3457d4SWasim Khan				label = "trx11";
592aa3457d4SWasim Khan				phy-mode = "internal";
593aa3457d4SWasim Khan				phy-handle = <&sw2_port9_base_t1_phy>;
594aa3457d4SWasim Khan			};
595aa3457d4SWasim Khan
596aa3457d4SWasim Khan			port@a {
597aa3457d4SWasim Khan				reg = <10>;
598aa3457d4SWasim Khan				label = "trx12";
599aa3457d4SWasim Khan				phy-mode = "internal";
600aa3457d4SWasim Khan				phy-handle = <&sw2_port10_base_t1_phy>;
601aa3457d4SWasim Khan			};
602aa3457d4SWasim Khan		};
603aa3457d4SWasim Khan
604aa3457d4SWasim Khan		mdios {
605aa3457d4SWasim Khan			#address-cells = <1>;
606aa3457d4SWasim Khan			#size-cells = <0>;
607aa3457d4SWasim Khan
608aa3457d4SWasim Khan			mdio@0 {
609aa3457d4SWasim Khan				compatible = "nxp,sja1110-base-t1-mdio";
610aa3457d4SWasim Khan				#address-cells = <1>;
611aa3457d4SWasim Khan				#size-cells = <0>;
612aa3457d4SWasim Khan				reg = <0>;
613aa3457d4SWasim Khan
614aa3457d4SWasim Khan				sw2_port5_base_t1_phy: ethernet-phy@1 {
615aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
616aa3457d4SWasim Khan					reg = <0x1>;
617aa3457d4SWasim Khan				};
618aa3457d4SWasim Khan
619aa3457d4SWasim Khan				sw2_port6_base_t1_phy: ethernet-phy@2 {
620aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
621aa3457d4SWasim Khan					reg = <0x2>;
622aa3457d4SWasim Khan				};
623aa3457d4SWasim Khan
624aa3457d4SWasim Khan				sw2_port7_base_t1_phy: ethernet-phy@3 {
625aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
626aa3457d4SWasim Khan					reg = <0x3>;
627aa3457d4SWasim Khan				};
628aa3457d4SWasim Khan
629aa3457d4SWasim Khan				sw2_port8_base_t1_phy: ethernet-phy@4 {
630aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
631aa3457d4SWasim Khan					reg = <0x4>;
632aa3457d4SWasim Khan				};
633aa3457d4SWasim Khan
634aa3457d4SWasim Khan				sw2_port9_base_t1_phy: ethernet-phy@5 {
635aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
636aa3457d4SWasim Khan					reg = <0x5>;
637aa3457d4SWasim Khan				};
638aa3457d4SWasim Khan
639aa3457d4SWasim Khan				sw2_port10_base_t1_phy: ethernet-phy@6 {
640aa3457d4SWasim Khan					compatible = "ethernet-phy-ieee802.3-c45";
641aa3457d4SWasim Khan					reg = <0x6>;
642aa3457d4SWasim Khan				};
643aa3457d4SWasim Khan			};
644aa3457d4SWasim Khan		};
645aa3457d4SWasim Khan	};
646aa3457d4SWasim Khan};
647aa3457d4SWasim Khan
648aa3457d4SWasim Khan&uart0 {
649aa3457d4SWasim Khan	status = "okay";
650aa3457d4SWasim Khan};
651aa3457d4SWasim Khan
652aa3457d4SWasim Khan&uart1 {
653aa3457d4SWasim Khan	status = "okay";
654aa3457d4SWasim Khan};
655aa3457d4SWasim Khan
656aa3457d4SWasim Khan&usb0 {
657aa3457d4SWasim Khan	status = "okay";
658aa3457d4SWasim Khan};
659aa3457d4SWasim Khan
660aa3457d4SWasim Khan&usb1 {
661aa3457d4SWasim Khan	status = "okay";
662aa3457d4SWasim Khan};
663