164285609SMichael Walle// SPDX-License-Identifier: GPL-2.0+
264285609SMichael Walle/*
364285609SMichael Walle * Device Tree file for the Kontron SMARC-sAL28 board.
464285609SMichael Walle *
564285609SMichael Walle * This is for the network variant 1 which has one ethernet port. It is
664285609SMichael Walle * different than the base variant, which also has one port, but here the
764285609SMichael Walle * port is connected via RGMII. This port is not TSN aware.
864285609SMichael Walle * None of the  four SerDes lanes are used by the module, instead they are
964285609SMichael Walle * all led out to the carrier for customer use.
1064285609SMichael Walle *
1164285609SMichael Walle * Copyright (C) 2020 Michael Walle <michael@walle.cc>
1264285609SMichael Walle *
1364285609SMichael Walle */
1464285609SMichael Walle
1564285609SMichael Walle/dts-v1/;
1664285609SMichael Walle#include "fsl-ls1028a-kontron-sl28.dts"
1764285609SMichael Walle#include <dt-bindings/net/qca-ar803x.h>
1864285609SMichael Walle
1964285609SMichael Walle/ {
2064285609SMichael Walle	model = "Kontron SMARC-sAL28 (4 Lanes)";
2164285609SMichael Walle	compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
2264285609SMichael Walle};
2364285609SMichael Walle
2464285609SMichael Walle&enetc_port0 {
2564285609SMichael Walle	status = "disabled";
2664285609SMichael Walle	/*
2764285609SMichael Walle	 * Delete both the phy-handle to the old phy0 label as well as
2864285609SMichael Walle	 * the mdio node with the old phy node with the old phy0 label.
2964285609SMichael Walle	 */
3064285609SMichael Walle	/delete-property/ phy-handle;
3164285609SMichael Walle	/delete-node/ mdio;
3264285609SMichael Walle};
3364285609SMichael Walle
3464285609SMichael Walle&enetc_port1 {
3564285609SMichael Walle	phy-handle = <&phy0>;
3664285609SMichael Walle	phy-connection-type = "rgmii-id";
3764285609SMichael Walle	status = "okay";
3864285609SMichael Walle
3964285609SMichael Walle	mdio {
4064285609SMichael Walle		#address-cells = <1>;
4164285609SMichael Walle		#size-cells = <0>;
4264285609SMichael Walle
4364285609SMichael Walle		phy0: ethernet-phy@4 {
4464285609SMichael Walle			reg = <0x4>;
4564285609SMichael Walle			eee-broken-1000t;
4664285609SMichael Walle			eee-broken-100tx;
4764285609SMichael Walle			qca,clk-out-frequency = <125000000>;
4864285609SMichael Walle			qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
49*52387bb9SMichael Walle			qca,keep-pll-enabled;
50*52387bb9SMichael Walle			vddio-supply = <&vddio>;
5164285609SMichael Walle
5264285609SMichael Walle			vddio: vddio-regulator {
5364285609SMichael Walle				regulator-name = "VDDIO";
5464285609SMichael Walle				regulator-min-microvolt = <1800000>;
5564285609SMichael Walle				regulator-max-microvolt = <1800000>;
5664285609SMichael Walle			};
5764285609SMichael Walle
5864285609SMichael Walle			vddh: vddh-regulator {
5964285609SMichael Walle				regulator-name = "VDDH";
6064285609SMichael Walle			};
6164285609SMichael Walle		};
6264285609SMichael Walle	};
6364285609SMichael Walle};
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