xref: /openbmc/linux/scripts/dtc/include-prefixes/arm64/arm/rtsm_ve-aemv8a.dts (revision ca5b34100c571658e605c5554aac374649593327)
1*ca5b3410SRobert Richter/*
2*ca5b3410SRobert Richter * ARM Ltd. Fast Models
3*ca5b3410SRobert Richter *
4*ca5b3410SRobert Richter * Architecture Envelope Model (AEM) ARMv8-A
5*ca5b3410SRobert Richter * ARMAEMv8AMPCT
6*ca5b3410SRobert Richter *
7*ca5b3410SRobert Richter * RTSM_VE_AEMv8A.lisa
8*ca5b3410SRobert Richter */
9*ca5b3410SRobert Richter
10*ca5b3410SRobert Richter/dts-v1/;
11*ca5b3410SRobert Richter
12*ca5b3410SRobert Richter/memreserve/ 0x80000000 0x00010000;
13*ca5b3410SRobert Richter
14*ca5b3410SRobert Richter/ {
15*ca5b3410SRobert Richter	model = "RTSM_VE_AEMv8A";
16*ca5b3410SRobert Richter	compatible = "arm,rtsm_ve,aemv8a", "arm,vexpress";
17*ca5b3410SRobert Richter	interrupt-parent = <&gic>;
18*ca5b3410SRobert Richter	#address-cells = <2>;
19*ca5b3410SRobert Richter	#size-cells = <2>;
20*ca5b3410SRobert Richter
21*ca5b3410SRobert Richter	chosen { };
22*ca5b3410SRobert Richter
23*ca5b3410SRobert Richter	aliases {
24*ca5b3410SRobert Richter		serial0 = &v2m_serial0;
25*ca5b3410SRobert Richter		serial1 = &v2m_serial1;
26*ca5b3410SRobert Richter		serial2 = &v2m_serial2;
27*ca5b3410SRobert Richter		serial3 = &v2m_serial3;
28*ca5b3410SRobert Richter	};
29*ca5b3410SRobert Richter
30*ca5b3410SRobert Richter	cpus {
31*ca5b3410SRobert Richter		#address-cells = <2>;
32*ca5b3410SRobert Richter		#size-cells = <0>;
33*ca5b3410SRobert Richter
34*ca5b3410SRobert Richter		cpu@0 {
35*ca5b3410SRobert Richter			device_type = "cpu";
36*ca5b3410SRobert Richter			compatible = "arm,armv8";
37*ca5b3410SRobert Richter			reg = <0x0 0x0>;
38*ca5b3410SRobert Richter			enable-method = "spin-table";
39*ca5b3410SRobert Richter			cpu-release-addr = <0x0 0x8000fff8>;
40*ca5b3410SRobert Richter		};
41*ca5b3410SRobert Richter		cpu@1 {
42*ca5b3410SRobert Richter			device_type = "cpu";
43*ca5b3410SRobert Richter			compatible = "arm,armv8";
44*ca5b3410SRobert Richter			reg = <0x0 0x1>;
45*ca5b3410SRobert Richter			enable-method = "spin-table";
46*ca5b3410SRobert Richter			cpu-release-addr = <0x0 0x8000fff8>;
47*ca5b3410SRobert Richter		};
48*ca5b3410SRobert Richter		cpu@2 {
49*ca5b3410SRobert Richter			device_type = "cpu";
50*ca5b3410SRobert Richter			compatible = "arm,armv8";
51*ca5b3410SRobert Richter			reg = <0x0 0x2>;
52*ca5b3410SRobert Richter			enable-method = "spin-table";
53*ca5b3410SRobert Richter			cpu-release-addr = <0x0 0x8000fff8>;
54*ca5b3410SRobert Richter		};
55*ca5b3410SRobert Richter		cpu@3 {
56*ca5b3410SRobert Richter			device_type = "cpu";
57*ca5b3410SRobert Richter			compatible = "arm,armv8";
58*ca5b3410SRobert Richter			reg = <0x0 0x3>;
59*ca5b3410SRobert Richter			enable-method = "spin-table";
60*ca5b3410SRobert Richter			cpu-release-addr = <0x0 0x8000fff8>;
61*ca5b3410SRobert Richter		};
62*ca5b3410SRobert Richter	};
63*ca5b3410SRobert Richter
64*ca5b3410SRobert Richter	memory@80000000 {
65*ca5b3410SRobert Richter		device_type = "memory";
66*ca5b3410SRobert Richter		reg = <0x00000000 0x80000000 0 0x80000000>,
67*ca5b3410SRobert Richter		      <0x00000008 0x80000000 0 0x80000000>;
68*ca5b3410SRobert Richter	};
69*ca5b3410SRobert Richter
70*ca5b3410SRobert Richter	gic: interrupt-controller@2c001000 {
71*ca5b3410SRobert Richter		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
72*ca5b3410SRobert Richter		#interrupt-cells = <3>;
73*ca5b3410SRobert Richter		#address-cells = <0>;
74*ca5b3410SRobert Richter		interrupt-controller;
75*ca5b3410SRobert Richter		reg = <0x0 0x2c001000 0 0x1000>,
76*ca5b3410SRobert Richter		      <0x0 0x2c002000 0 0x1000>,
77*ca5b3410SRobert Richter		      <0x0 0x2c004000 0 0x2000>,
78*ca5b3410SRobert Richter		      <0x0 0x2c006000 0 0x2000>;
79*ca5b3410SRobert Richter		interrupts = <1 9 0xf04>;
80*ca5b3410SRobert Richter	};
81*ca5b3410SRobert Richter
82*ca5b3410SRobert Richter	timer {
83*ca5b3410SRobert Richter		compatible = "arm,armv8-timer";
84*ca5b3410SRobert Richter		interrupts = <1 13 0xff01>,
85*ca5b3410SRobert Richter			     <1 14 0xff01>,
86*ca5b3410SRobert Richter			     <1 11 0xff01>,
87*ca5b3410SRobert Richter			     <1 10 0xff01>;
88*ca5b3410SRobert Richter		clock-frequency = <100000000>;
89*ca5b3410SRobert Richter	};
90*ca5b3410SRobert Richter
91*ca5b3410SRobert Richter	pmu {
92*ca5b3410SRobert Richter		compatible = "arm,armv8-pmuv3";
93*ca5b3410SRobert Richter		interrupts = <0 60 4>,
94*ca5b3410SRobert Richter			     <0 61 4>,
95*ca5b3410SRobert Richter			     <0 62 4>,
96*ca5b3410SRobert Richter			     <0 63 4>;
97*ca5b3410SRobert Richter	};
98*ca5b3410SRobert Richter
99*ca5b3410SRobert Richter	smb {
100*ca5b3410SRobert Richter		compatible = "simple-bus";
101*ca5b3410SRobert Richter
102*ca5b3410SRobert Richter		#address-cells = <2>;
103*ca5b3410SRobert Richter		#size-cells = <1>;
104*ca5b3410SRobert Richter		ranges = <0 0 0 0x08000000 0x04000000>,
105*ca5b3410SRobert Richter			 <1 0 0 0x14000000 0x04000000>,
106*ca5b3410SRobert Richter			 <2 0 0 0x18000000 0x04000000>,
107*ca5b3410SRobert Richter			 <3 0 0 0x1c000000 0x04000000>,
108*ca5b3410SRobert Richter			 <4 0 0 0x0c000000 0x04000000>,
109*ca5b3410SRobert Richter			 <5 0 0 0x10000000 0x04000000>;
110*ca5b3410SRobert Richter
111*ca5b3410SRobert Richter		#interrupt-cells = <1>;
112*ca5b3410SRobert Richter		interrupt-map-mask = <0 0 63>;
113*ca5b3410SRobert Richter		interrupt-map = <0 0  0 &gic 0  0 4>,
114*ca5b3410SRobert Richter				<0 0  1 &gic 0  1 4>,
115*ca5b3410SRobert Richter				<0 0  2 &gic 0  2 4>,
116*ca5b3410SRobert Richter				<0 0  3 &gic 0  3 4>,
117*ca5b3410SRobert Richter				<0 0  4 &gic 0  4 4>,
118*ca5b3410SRobert Richter				<0 0  5 &gic 0  5 4>,
119*ca5b3410SRobert Richter				<0 0  6 &gic 0  6 4>,
120*ca5b3410SRobert Richter				<0 0  7 &gic 0  7 4>,
121*ca5b3410SRobert Richter				<0 0  8 &gic 0  8 4>,
122*ca5b3410SRobert Richter				<0 0  9 &gic 0  9 4>,
123*ca5b3410SRobert Richter				<0 0 10 &gic 0 10 4>,
124*ca5b3410SRobert Richter				<0 0 11 &gic 0 11 4>,
125*ca5b3410SRobert Richter				<0 0 12 &gic 0 12 4>,
126*ca5b3410SRobert Richter				<0 0 13 &gic 0 13 4>,
127*ca5b3410SRobert Richter				<0 0 14 &gic 0 14 4>,
128*ca5b3410SRobert Richter				<0 0 15 &gic 0 15 4>,
129*ca5b3410SRobert Richter				<0 0 16 &gic 0 16 4>,
130*ca5b3410SRobert Richter				<0 0 17 &gic 0 17 4>,
131*ca5b3410SRobert Richter				<0 0 18 &gic 0 18 4>,
132*ca5b3410SRobert Richter				<0 0 19 &gic 0 19 4>,
133*ca5b3410SRobert Richter				<0 0 20 &gic 0 20 4>,
134*ca5b3410SRobert Richter				<0 0 21 &gic 0 21 4>,
135*ca5b3410SRobert Richter				<0 0 22 &gic 0 22 4>,
136*ca5b3410SRobert Richter				<0 0 23 &gic 0 23 4>,
137*ca5b3410SRobert Richter				<0 0 24 &gic 0 24 4>,
138*ca5b3410SRobert Richter				<0 0 25 &gic 0 25 4>,
139*ca5b3410SRobert Richter				<0 0 26 &gic 0 26 4>,
140*ca5b3410SRobert Richter				<0 0 27 &gic 0 27 4>,
141*ca5b3410SRobert Richter				<0 0 28 &gic 0 28 4>,
142*ca5b3410SRobert Richter				<0 0 29 &gic 0 29 4>,
143*ca5b3410SRobert Richter				<0 0 30 &gic 0 30 4>,
144*ca5b3410SRobert Richter				<0 0 31 &gic 0 31 4>,
145*ca5b3410SRobert Richter				<0 0 32 &gic 0 32 4>,
146*ca5b3410SRobert Richter				<0 0 33 &gic 0 33 4>,
147*ca5b3410SRobert Richter				<0 0 34 &gic 0 34 4>,
148*ca5b3410SRobert Richter				<0 0 35 &gic 0 35 4>,
149*ca5b3410SRobert Richter				<0 0 36 &gic 0 36 4>,
150*ca5b3410SRobert Richter				<0 0 37 &gic 0 37 4>,
151*ca5b3410SRobert Richter				<0 0 38 &gic 0 38 4>,
152*ca5b3410SRobert Richter				<0 0 39 &gic 0 39 4>,
153*ca5b3410SRobert Richter				<0 0 40 &gic 0 40 4>,
154*ca5b3410SRobert Richter				<0 0 41 &gic 0 41 4>,
155*ca5b3410SRobert Richter				<0 0 42 &gic 0 42 4>;
156*ca5b3410SRobert Richter
157*ca5b3410SRobert Richter		/include/ "rtsm_ve-motherboard.dtsi"
158*ca5b3410SRobert Richter	};
159*ca5b3410SRobert Richter};
160