196bb0954SRobin Murphy/ { 296bb0954SRobin Murphy etf@20010000 { 396bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 496bb0954SRobin Murphy }; 596bb0954SRobin Murphy 696bb0954SRobin Murphy tpiu@20030000 { 796bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 896bb0954SRobin Murphy }; 996bb0954SRobin Murphy 1096bb0954SRobin Murphy funnel@20040000 { 1196bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 1296bb0954SRobin Murphy }; 1396bb0954SRobin Murphy 1496bb0954SRobin Murphy etr@20070000 { 1596bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 1696bb0954SRobin Murphy }; 1796bb0954SRobin Murphy 1896bb0954SRobin Murphy stm@20100000 { 1996bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 2096bb0954SRobin Murphy }; 2196bb0954SRobin Murphy 2296bb0954SRobin Murphy replicator@20120000 { 2396bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 2496bb0954SRobin Murphy }; 2596bb0954SRobin Murphy 2696bb0954SRobin Murphy funnel@220c0000 { 2796bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 2896bb0954SRobin Murphy }; 2996bb0954SRobin Murphy 3096bb0954SRobin Murphy funnel@230c0000 { 3196bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 3296bb0954SRobin Murphy }; 3396bb0954SRobin Murphy 3496bb0954SRobin Murphy hdlcd@7ff50000 { 3596bb0954SRobin Murphy clocks = <&scmi_clk 3>; 3696bb0954SRobin Murphy }; 3796bb0954SRobin Murphy 3896bb0954SRobin Murphy hdlcd@7ff60000 { 3996bb0954SRobin Murphy clocks = <&scmi_clk 3>; 4096bb0954SRobin Murphy }; 4196bb0954SRobin Murphy 4296bb0954SRobin Murphy /delete-node/ scpi; 4396bb0954SRobin Murphy 4496bb0954SRobin Murphy firmware { 4596bb0954SRobin Murphy scmi { 4696bb0954SRobin Murphy compatible = "arm,scmi"; 4796bb0954SRobin Murphy mbox-names = "tx", "rx"; 4896bb0954SRobin Murphy mboxes = <&mailbox 0 0 &mailbox 0 1>; 4996bb0954SRobin Murphy shmem = <&cpu_scp_lpri0 &cpu_scp_lpri1>; 5096bb0954SRobin Murphy #address-cells = <1>; 5196bb0954SRobin Murphy #size-cells = <0>; 5296bb0954SRobin Murphy 5396bb0954SRobin Murphy scmi_devpd: protocol@11 { 5496bb0954SRobin Murphy reg = <0x11>; 5596bb0954SRobin Murphy #power-domain-cells = <1>; 5696bb0954SRobin Murphy }; 5796bb0954SRobin Murphy 5896bb0954SRobin Murphy scmi_dvfs: protocol@13 { 5996bb0954SRobin Murphy reg = <0x13>; 6096bb0954SRobin Murphy #clock-cells = <1>; 6196bb0954SRobin Murphy mbox-names = "tx", "rx"; 6296bb0954SRobin Murphy mboxes = <&mailbox 1 0 &mailbox 1 1>; 6396bb0954SRobin Murphy shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>; 6496bb0954SRobin Murphy }; 6596bb0954SRobin Murphy 6696bb0954SRobin Murphy scmi_clk: protocol@14 { 6796bb0954SRobin Murphy reg = <0x14>; 6896bb0954SRobin Murphy #clock-cells = <1>; 6996bb0954SRobin Murphy }; 7096bb0954SRobin Murphy 7196bb0954SRobin Murphy scmi_sensors0: protocol@15 { 7296bb0954SRobin Murphy reg = <0x15>; 7396bb0954SRobin Murphy #thermal-sensor-cells = <1>; 7496bb0954SRobin Murphy }; 7596bb0954SRobin Murphy }; 7696bb0954SRobin Murphy }; 7796bb0954SRobin Murphy 7896bb0954SRobin Murphy thermal-zones { 7996bb0954SRobin Murphy pmic { 8096bb0954SRobin Murphy thermal-sensors = <&scmi_sensors0 0>; 8196bb0954SRobin Murphy }; 8296bb0954SRobin Murphy 8396bb0954SRobin Murphy soc { 8496bb0954SRobin Murphy thermal-sensors = <&scmi_sensors0 3>; 8596bb0954SRobin Murphy }; 8696bb0954SRobin Murphy 8796bb0954SRobin Murphy big-cluster { 8896bb0954SRobin Murphy thermal-sensors = <&scmi_sensors0 21>; 8996bb0954SRobin Murphy }; 9096bb0954SRobin Murphy 9196bb0954SRobin Murphy little-cluster { 9296bb0954SRobin Murphy thermal-sensors = <&scmi_sensors0 22>; 9396bb0954SRobin Murphy }; 9496bb0954SRobin Murphy 9596bb0954SRobin Murphy gpu0 { 9696bb0954SRobin Murphy thermal-sensors = <&scmi_sensors0 23>; 9796bb0954SRobin Murphy }; 9896bb0954SRobin Murphy 9996bb0954SRobin Murphy gpu1 { 10096bb0954SRobin Murphy thermal-sensors = <&scmi_sensors0 24>; 10196bb0954SRobin Murphy }; 10296bb0954SRobin Murphy }; 10396bb0954SRobin Murphy 10496bb0954SRobin Murphy}; 10596bb0954SRobin Murphy 10696bb0954SRobin Murphy&A53_0 { 10796bb0954SRobin Murphy clocks = <&scmi_dvfs 1>; 10896bb0954SRobin Murphy}; 10996bb0954SRobin Murphy&A53_1 { 11096bb0954SRobin Murphy clocks = <&scmi_dvfs 1>; 11196bb0954SRobin Murphy}; 11296bb0954SRobin Murphy&A53_2 { 11396bb0954SRobin Murphy clocks = <&scmi_dvfs 1>; 11496bb0954SRobin Murphy}; 11596bb0954SRobin Murphy&A53_3 { 11696bb0954SRobin Murphy clocks = <&scmi_dvfs 1>; 11796bb0954SRobin Murphy}; 11896bb0954SRobin Murphy 11996bb0954SRobin Murphy&cpu_debug0 { 12096bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 12196bb0954SRobin Murphy}; 12296bb0954SRobin Murphy&cpu_debug1 { 12396bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 12496bb0954SRobin Murphy}; 12596bb0954SRobin Murphy&cpu_debug2 { 12696bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 12796bb0954SRobin Murphy}; 12896bb0954SRobin Murphy&cpu_debug3 { 12996bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 13096bb0954SRobin Murphy}; 13196bb0954SRobin Murphy&cpu_debug4 { 13296bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 13396bb0954SRobin Murphy}; 13496bb0954SRobin Murphy&cpu_debug5 { 13596bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 13696bb0954SRobin Murphy}; 13796bb0954SRobin Murphy 13896bb0954SRobin Murphy&etm0 { 13996bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 14096bb0954SRobin Murphy}; 14196bb0954SRobin Murphy&etm1 { 14296bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 14396bb0954SRobin Murphy}; 14496bb0954SRobin Murphy&etm2 { 14596bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 14696bb0954SRobin Murphy}; 14796bb0954SRobin Murphy&etm3 { 14896bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 14996bb0954SRobin Murphy}; 15096bb0954SRobin Murphy&etm4 { 15196bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 15296bb0954SRobin Murphy}; 15396bb0954SRobin Murphy&etm5 { 15496bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 15596bb0954SRobin Murphy}; 15696bb0954SRobin Murphy 157*e7676a00SMike Leach&cti0 { 158*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 159*e7676a00SMike Leach}; 160*e7676a00SMike Leach&cti1 { 161*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 162*e7676a00SMike Leach}; 163*e7676a00SMike Leach&cti2 { 164*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 165*e7676a00SMike Leach}; 166*e7676a00SMike Leach&cti3 { 167*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 168*e7676a00SMike Leach}; 169*e7676a00SMike Leach&cti4 { 170*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 171*e7676a00SMike Leach}; 172*e7676a00SMike Leach&cti5 { 173*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 174*e7676a00SMike Leach}; 175*e7676a00SMike Leach&cti_sys0 { 176*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 177*e7676a00SMike Leach}; 178*e7676a00SMike Leach&cti_sys1 { 179*e7676a00SMike Leach power-domains = <&scmi_devpd 8>; 180*e7676a00SMike Leach}; 181*e7676a00SMike Leach 18296bb0954SRobin Murphy&gpu { 18396bb0954SRobin Murphy clocks = <&scmi_dvfs 2>; 18496bb0954SRobin Murphy power-domains = <&scmi_devpd 9>; 18596bb0954SRobin Murphy}; 18696bb0954SRobin Murphy 18796bb0954SRobin Murphy&mailbox { 18896bb0954SRobin Murphy compatible = "arm,mhu-doorbell", "arm,primecell"; 18996bb0954SRobin Murphy #mbox-cells = <2>; 19096bb0954SRobin Murphy}; 19196bb0954SRobin Murphy 19296bb0954SRobin Murphy&smmu_etr { 19396bb0954SRobin Murphy power-domains = <&scmi_devpd 8>; 19496bb0954SRobin Murphy}; 19596bb0954SRobin Murphy 19696bb0954SRobin Murphy&smmu_gpu { 19796bb0954SRobin Murphy power-domains = <&scmi_devpd 9>; 19896bb0954SRobin Murphy}; 19996bb0954SRobin Murphy 20096bb0954SRobin Murphy&sram { 20196bb0954SRobin Murphy /delete-node/ scp-sram@0; 20296bb0954SRobin Murphy /delete-node/ scp-sram@200; 20396bb0954SRobin Murphy 20496bb0954SRobin Murphy cpu_scp_lpri0: scp-sram@0 { 20596bb0954SRobin Murphy compatible = "arm,scmi-shmem"; 20696bb0954SRobin Murphy reg = <0x0 0x80>; 20796bb0954SRobin Murphy }; 20896bb0954SRobin Murphy 20996bb0954SRobin Murphy cpu_scp_lpri1: scp-sram@80 { 21096bb0954SRobin Murphy compatible = "arm,scmi-shmem"; 21196bb0954SRobin Murphy reg = <0x80 0x80>; 21296bb0954SRobin Murphy }; 21396bb0954SRobin Murphy 21496bb0954SRobin Murphy cpu_scp_hpri0: scp-sram@100 { 21596bb0954SRobin Murphy compatible = "arm,scmi-shmem"; 21696bb0954SRobin Murphy reg = <0x100 0x80>; 21796bb0954SRobin Murphy }; 21896bb0954SRobin Murphy 21996bb0954SRobin Murphy cpu_scp_hpri1: scp-sram@180 { 22096bb0954SRobin Murphy compatible = "arm,scmi-shmem"; 22196bb0954SRobin Murphy reg = <0x180 0x80>; 22296bb0954SRobin Murphy }; 22396bb0954SRobin Murphy}; 224