1bc3d3447SDaniel Thompson/* 2bc3d3447SDaniel Thompson * ARM Ltd. 3bc3d3447SDaniel Thompson * 4bc3d3447SDaniel Thompson * ARMv8 Foundation model DTS (GICv3 configuration) 5bc3d3447SDaniel Thompson */ 6bc3d3447SDaniel Thompson 7bc3d3447SDaniel Thompson/ { 8bc3d3447SDaniel Thompson gic: interrupt-controller@2f000000 { 9bc3d3447SDaniel Thompson compatible = "arm,gic-v3"; 10bc3d3447SDaniel Thompson #interrupt-cells = <3>; 1178631aecSAndre Przywara #address-cells = <1>; 1278631aecSAndre Przywara #size-cells = <1>; 1378631aecSAndre Przywara ranges = <0x0 0x0 0x2f000000 0x100000>; 14bc3d3447SDaniel Thompson interrupt-controller; 15bc3d3447SDaniel Thompson reg = <0x0 0x2f000000 0x0 0x10000>, 16bc3d3447SDaniel Thompson <0x0 0x2f100000 0x0 0x200000>, 17bc3d3447SDaniel Thompson <0x0 0x2c000000 0x0 0x2000>, 18bc3d3447SDaniel Thompson <0x0 0x2c010000 0x0 0x2000>, 19bc3d3447SDaniel Thompson <0x0 0x2c02f000 0x0 0x2000>; 20ef972714SSudeep Holla interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 21bc3d3447SDaniel Thompson 22*fac959c9SAndre Przywara its: msi-controller@2f020000 { 23bc3d3447SDaniel Thompson compatible = "arm,gic-v3-its"; 24bc3d3447SDaniel Thompson msi-controller; 25*fac959c9SAndre Przywara #msi-cells = <1>; 2678631aecSAndre Przywara reg = <0x20000 0x20000>; 27bc3d3447SDaniel Thompson }; 28bc3d3447SDaniel Thompson }; 29bc3d3447SDaniel Thompson}; 30