1bc3d3447SDaniel Thompson/*
2bc3d3447SDaniel Thompson * ARM Ltd.
3bc3d3447SDaniel Thompson *
4bc3d3447SDaniel Thompson * ARMv8 Foundation model DTS (GICv2 configuration)
5bc3d3447SDaniel Thompson */
6bc3d3447SDaniel Thompson
7bc3d3447SDaniel Thompson/ {
8bc3d3447SDaniel Thompson	gic: interrupt-controller@2c001000 {
9bc3d3447SDaniel Thompson		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
10bc3d3447SDaniel Thompson		#interrupt-cells = <3>;
11bc3d3447SDaniel Thompson		#address-cells = <2>;
12bc3d3447SDaniel Thompson		interrupt-controller;
13bc3d3447SDaniel Thompson		reg = <0x0 0x2c001000 0 0x1000>,
14bc3d3447SDaniel Thompson		      <0x0 0x2c002000 0 0x2000>,
15bc3d3447SDaniel Thompson		      <0x0 0x2c004000 0 0x2000>,
16bc3d3447SDaniel Thompson		      <0x0 0x2c006000 0 0x2000>;
17ef972714SSudeep Holla		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
18bc3d3447SDaniel Thompson	};
19bc3d3447SDaniel Thompson};
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