1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Apple T6002 "M1 Ultra" SoC 4 * 5 * Other names: H13J, "Jade 2C" 6 * 7 * Copyright The Asahi Linux Contributors 8 */ 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/interrupt-controller/apple-aic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/pinctrl/apple.h> 14 15#include "multi-die-cpp.h" 16 17#include "t600x-common.dtsi" 18 19/ { 20 compatible = "apple,t6002", "apple,arm-platform"; 21 22 #address-cells = <2>; 23 #size-cells = <2>; 24 25 cpus { 26 cpu_e10: cpu@800 { 27 compatible = "apple,icestorm"; 28 device_type = "cpu"; 29 reg = <0x0 0x800>; 30 enable-method = "spin-table"; 31 cpu-release-addr = <0 0>; /* To be filled by loader */ 32 }; 33 34 cpu_e11: cpu@801 { 35 compatible = "apple,icestorm"; 36 device_type = "cpu"; 37 reg = <0x0 0x801>; 38 enable-method = "spin-table"; 39 cpu-release-addr = <0 0>; /* To be filled by loader */ 40 }; 41 42 cpu_p20: cpu@10900 { 43 compatible = "apple,firestorm"; 44 device_type = "cpu"; 45 reg = <0x0 0x10900>; 46 enable-method = "spin-table"; 47 cpu-release-addr = <0 0>; /* To be filled by loader */ 48 }; 49 50 cpu_p21: cpu@10901 { 51 compatible = "apple,firestorm"; 52 device_type = "cpu"; 53 reg = <0x0 0x10901>; 54 enable-method = "spin-table"; 55 cpu-release-addr = <0 0>; /* To be filled by loader */ 56 }; 57 58 cpu_p22: cpu@10902 { 59 compatible = "apple,firestorm"; 60 device_type = "cpu"; 61 reg = <0x0 0x10902>; 62 enable-method = "spin-table"; 63 cpu-release-addr = <0 0>; /* To be filled by loader */ 64 }; 65 66 cpu_p23: cpu@10903 { 67 compatible = "apple,firestorm"; 68 device_type = "cpu"; 69 reg = <0x0 0x10903>; 70 enable-method = "spin-table"; 71 cpu-release-addr = <0 0>; /* To be filled by loader */ 72 }; 73 74 cpu_p30: cpu@10a00 { 75 compatible = "apple,firestorm"; 76 device_type = "cpu"; 77 reg = <0x0 0x10a00>; 78 enable-method = "spin-table"; 79 cpu-release-addr = <0 0>; /* To be filled by loader */ 80 }; 81 82 cpu_p31: cpu@10a01 { 83 compatible = "apple,firestorm"; 84 device_type = "cpu"; 85 reg = <0x0 0x10a01>; 86 enable-method = "spin-table"; 87 cpu-release-addr = <0 0>; /* To be filled by loader */ 88 }; 89 90 cpu_p32: cpu@10a02 { 91 compatible = "apple,firestorm"; 92 device_type = "cpu"; 93 reg = <0x0 0x10a02>; 94 enable-method = "spin-table"; 95 cpu-release-addr = <0 0>; /* To be filled by loader */ 96 }; 97 98 cpu_p33: cpu@10a03 { 99 compatible = "apple,firestorm"; 100 device_type = "cpu"; 101 reg = <0x0 0x10a03>; 102 enable-method = "spin-table"; 103 cpu-release-addr = <0 0>; /* To be filled by loader */ 104 }; 105 }; 106 107 die0: soc@200000000 { 108 compatible = "simple-bus"; 109 #address-cells = <2>; 110 #size-cells = <2>; 111 ranges = <0x2 0x0 0x2 0x0 0x4 0x0>, 112 <0x5 0x80000000 0x5 0x80000000 0x1 0x80000000>, 113 <0x7 0x0 0x7 0x0 0xf 0x80000000>; 114 nonposted-mmio; 115 116 // filled via templated includes at the end of the file 117 }; 118 119 die1: soc@2200000000 { 120 compatible = "simple-bus"; 121 #address-cells = <2>; 122 #size-cells = <2>; 123 ranges = <0x2 0x0 0x22 0x0 0x4 0x0>, 124 <0x7 0x0 0x27 0x0 0xf 0x80000000>; 125 nonposted-mmio; 126 127 // filled via templated includes at the end of the file 128 }; 129}; 130 131#define DIE 132#define DIE_NO 0 133 134&die0 { 135 #include "t600x-die0.dtsi" 136 #include "t600x-dieX.dtsi" 137}; 138 139#include "t600x-pmgr.dtsi" 140#include "t600x-gpio-pins.dtsi" 141 142#undef DIE 143#undef DIE_NO 144 145#define DIE _die1 146#define DIE_NO 1 147 148&die1 { 149 #include "t600x-dieX.dtsi" 150 #include "t600x-nvme.dtsi" 151}; 152 153#include "t600x-pmgr.dtsi" 154 155#undef DIE 156#undef DIE_NO 157 158 159&aic { 160 affinities { 161 e-core-pmu-affinity { 162 apple,fiq-index = <AIC_CPU_PMU_E>; 163 cpus = <&cpu_e00 &cpu_e01 164 &cpu_e10 &cpu_e11>; 165 }; 166 167 p-core-pmu-affinity { 168 apple,fiq-index = <AIC_CPU_PMU_P>; 169 cpus = <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03 170 &cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13 171 &cpu_p20 &cpu_p21 &cpu_p22 &cpu_p23 172 &cpu_p30 &cpu_p31 &cpu_p32 &cpu_p33>; 173 }; 174 }; 175}; 176