1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-g12-common.dtsi"
8#include <dt-bindings/power/meson-sm1-power.h>
9
10/ {
11	compatible = "amlogic,sm1";
12
13	cpus {
14		#address-cells = <0x2>;
15		#size-cells = <0x0>;
16
17		cpu0: cpu@0 {
18			device_type = "cpu";
19			compatible = "arm,cortex-a55";
20			reg = <0x0 0x0>;
21			enable-method = "psci";
22			next-level-cache = <&l2>;
23		};
24
25		cpu1: cpu@1 {
26			device_type = "cpu";
27			compatible = "arm,cortex-a55";
28			reg = <0x0 0x1>;
29			enable-method = "psci";
30			next-level-cache = <&l2>;
31		};
32
33		cpu2: cpu@2 {
34			device_type = "cpu";
35			compatible = "arm,cortex-a55";
36			reg = <0x0 0x2>;
37			enable-method = "psci";
38			next-level-cache = <&l2>;
39		};
40
41		cpu3: cpu@3 {
42			device_type = "cpu";
43			compatible = "arm,cortex-a55";
44			reg = <0x0 0x3>;
45			enable-method = "psci";
46			next-level-cache = <&l2>;
47		};
48
49		l2: l2-cache0 {
50			compatible = "cache";
51		};
52	};
53
54	cpu_opp_table: opp-table {
55		compatible = "operating-points-v2";
56		opp-shared;
57
58		opp-100000000 {
59			opp-hz = /bits/ 64 <100000000>;
60			opp-microvolt = <730000>;
61		};
62
63		opp-250000000 {
64			opp-hz = /bits/ 64 <250000000>;
65			opp-microvolt = <730000>;
66		};
67
68		opp-500000000 {
69			opp-hz = /bits/ 64 <500000000>;
70			opp-microvolt = <730000>;
71		};
72
73		opp-667000000 {
74			opp-hz = /bits/ 64 <666666666>;
75			opp-microvolt = <750000>;
76		};
77
78		opp-1000000000 {
79			opp-hz = /bits/ 64 <1000000000>;
80			opp-microvolt = <770000>;
81		};
82
83		opp-1200000000 {
84			opp-hz = /bits/ 64 <1200000000>;
85			opp-microvolt = <780000>;
86		};
87
88		opp-1404000000 {
89			opp-hz = /bits/ 64 <1404000000>;
90			opp-microvolt = <790000>;
91		};
92
93		opp-1512000000 {
94			opp-hz = /bits/ 64 <1500000000>;
95			opp-microvolt = <800000>;
96		};
97
98		opp-1608000000 {
99			opp-hz = /bits/ 64 <1608000000>;
100			opp-microvolt = <810000>;
101		};
102
103		opp-1704000000 {
104			opp-hz = /bits/ 64 <1704000000>;
105			opp-microvolt = <850000>;
106		};
107
108		opp-1800000000 {
109			opp-hz = /bits/ 64 <1800000000>;
110			opp-microvolt = <900000>;
111		};
112
113		opp-1908000000 {
114			opp-hz = /bits/ 64 <1908000000>;
115			opp-microvolt = <950000>;
116		};
117	};
118};
119
120&cecb_AO {
121	compatible = "amlogic,meson-sm1-ao-cec";
122};
123
124&clk_msr {
125	compatible = "amlogic,meson-sm1-clk-measure";
126};
127
128
129&clkc {
130	compatible = "amlogic,sm1-clkc";
131};
132
133&ethmac {
134	power-domains = <&pwrc PWRC_SM1_ETH_ID>;
135};
136
137&gpio_intc {
138	compatible = "amlogic,meson-sm1-gpio-intc",
139		     "amlogic,meson-gpio-intc";
140};
141
142&pcie {
143	power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
144};
145
146&pwrc {
147	compatible = "amlogic,meson-sm1-pwrc";
148};
149
150&simplefb_cvbs {
151	power-domains = <&pwrc PWRC_SM1_VPU_ID>;
152};
153
154&simplefb_hdmi {
155	power-domains = <&pwrc PWRC_SM1_VPU_ID>;
156};
157
158&vpu {
159	power-domains = <&pwrc PWRC_SM1_VPU_ID>;
160};
161
162&usb {
163	power-domains = <&pwrc PWRC_SM1_USB_ID>;
164};
165