1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Endless Computers, Inc.
4 * Author: Carlo Caione <carlo@endlessm.com>
5 */
6
7#include "meson-gxl.dtsi"
8
9/ {
10	compatible = "amlogic,meson-gxm";
11
12	cpus {
13		cpu-map {
14			cluster0 {
15				core0 {
16					cpu = <&cpu0>;
17				};
18				core1 {
19					cpu = <&cpu1>;
20				};
21				core2 {
22					cpu = <&cpu2>;
23				};
24				core3 {
25					cpu = <&cpu3>;
26				};
27			};
28
29			cluster1 {
30				core0 {
31					cpu = <&cpu4>;
32				};
33				core1 {
34					cpu = <&cpu5>;
35				};
36				core2 {
37					cpu = <&cpu6>;
38				};
39				core3 {
40					cpu = <&cpu7>;
41				};
42			};
43		};
44
45		cpu4: cpu@100 {
46			device_type = "cpu";
47			compatible = "arm,cortex-a53";
48			reg = <0x0 0x100>;
49			enable-method = "psci";
50			next-level-cache = <&l2>;
51			clocks = <&scpi_dvfs 1>;
52			#cooling-cells = <2>;
53		};
54
55		cpu5: cpu@101 {
56			device_type = "cpu";
57			compatible = "arm,cortex-a53";
58			reg = <0x0 0x101>;
59			enable-method = "psci";
60			next-level-cache = <&l2>;
61			clocks = <&scpi_dvfs 1>;
62			#cooling-cells = <2>;
63		};
64
65		cpu6: cpu@102 {
66			device_type = "cpu";
67			compatible = "arm,cortex-a53";
68			reg = <0x0 0x102>;
69			enable-method = "psci";
70			next-level-cache = <&l2>;
71			clocks = <&scpi_dvfs 1>;
72			#cooling-cells = <2>;
73		};
74
75		cpu7: cpu@103 {
76			device_type = "cpu";
77			compatible = "arm,cortex-a53";
78			reg = <0x0 0x103>;
79			enable-method = "psci";
80			next-level-cache = <&l2>;
81			clocks = <&scpi_dvfs 1>;
82			#cooling-cells = <2>;
83		};
84	};
85};
86
87&apb {
88	usb2_phy2: phy@78040 {
89		compatible = "amlogic,meson-gxl-usb2-phy";
90		#phy-cells = <0>;
91		reg = <0x0 0x78040 0x0 0x20>;
92		clocks = <&clkc CLKID_USB>;
93		clock-names = "phy";
94		resets = <&reset RESET_USB_OTG>;
95		reset-names = "phy";
96		status = "okay";
97	};
98
99	mali: gpu@c0000 {
100		compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
101		reg = <0x0 0xc0000 0x0 0x40000>;
102		interrupt-parent = <&gic>;
103		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
104			     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
105			     <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
106		interrupt-names = "job", "mmu", "gpu";
107		clocks = <&clkc CLKID_MALI>;
108		resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
109
110		/*
111		 * Mali clocking is provided by two identical clock paths
112		 * MALI_0 and MALI_1 muxed to a single clock by a glitch
113		 * free mux to safely change frequency while running.
114		 */
115		assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
116				  <&clkc CLKID_MALI_0>,
117				  <&clkc CLKID_MALI>; /* Glitch free mux */
118		assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
119					 <0>, /* Do Nothing */
120					 <&clkc CLKID_MALI_0>;
121		assigned-clock-rates = <0>, /* Do Nothing */
122				       <666666666>,
123				       <0>; /* Do Nothing */
124	};
125};
126
127&clkc_AO {
128	compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
129};
130
131&cpu_cooling_maps {
132	map0 {
133		cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
134				 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
135				 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
136				 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
137				 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
138				 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
139				 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
140				 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
141	};
142
143	map1 {
144		cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
145				 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
146				 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
147				 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
148				 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
149				 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
150				 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
151				 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
152	};
153};
154
155&saradc {
156	compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
157};
158
159&scpi_dvfs {
160	clock-indices = <0 1>;
161	clock-output-names = "vbig", "vlittle";
162};
163
164&vpu {
165	compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
166};
167
168&hdmi_tx {
169	compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
170};
171
172&dwc3 {
173	phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
174};
175
176&vdec {
177	compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
178};
179