1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Andreas Färber
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/thermal/thermal.h>
16
17/ {
18	interrupt-parent = <&gic>;
19	#address-cells = <2>;
20	#size-cells = <2>;
21
22	reserved-memory {
23		#address-cells = <2>;
24		#size-cells = <2>;
25		ranges;
26
27		/* 16 MiB reserved for Hardware ROM Firmware */
28		hwrom_reserved: hwrom@0 {
29			reg = <0x0 0x0 0x0 0x1000000>;
30			no-map;
31		};
32
33		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
34		secmon_reserved: secmon@10000000 {
35			reg = <0x0 0x10000000 0x0 0x200000>;
36			no-map;
37		};
38
39		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
40		secmon_reserved_alt: secmon@5000000 {
41			reg = <0x0 0x05000000 0x0 0x300000>;
42			no-map;
43		};
44
45		linux,cma {
46			compatible = "shared-dma-pool";
47			reusable;
48			size = <0x0 0x10000000>;
49			alignment = <0x0 0x400000>;
50			linux,cma-default;
51		};
52	};
53
54	chosen {
55		#address-cells = <2>;
56		#size-cells = <2>;
57		ranges;
58
59		simplefb_cvbs: framebuffer-cvbs {
60			compatible = "amlogic,simple-framebuffer",
61				     "simple-framebuffer";
62			amlogic,pipeline = "vpu-cvbs";
63			power-domains = <&pwrc_vpu>;
64			status = "disabled";
65		};
66
67		simplefb_hdmi: framebuffer-hdmi {
68			compatible = "amlogic,simple-framebuffer",
69				     "simple-framebuffer";
70			amlogic,pipeline = "vpu-hdmi";
71			power-domains = <&pwrc_vpu>;
72			status = "disabled";
73		};
74	};
75
76	cpus {
77		#address-cells = <0x2>;
78		#size-cells = <0x0>;
79
80		cpu0: cpu@0 {
81			device_type = "cpu";
82			compatible = "arm,cortex-a53";
83			reg = <0x0 0x0>;
84			enable-method = "psci";
85			next-level-cache = <&l2>;
86			clocks = <&scpi_dvfs 0>;
87			#cooling-cells = <2>;
88		};
89
90		cpu1: cpu@1 {
91			device_type = "cpu";
92			compatible = "arm,cortex-a53";
93			reg = <0x0 0x1>;
94			enable-method = "psci";
95			next-level-cache = <&l2>;
96			clocks = <&scpi_dvfs 0>;
97			#cooling-cells = <2>;
98		};
99
100		cpu2: cpu@2 {
101			device_type = "cpu";
102			compatible = "arm,cortex-a53";
103			reg = <0x0 0x2>;
104			enable-method = "psci";
105			next-level-cache = <&l2>;
106			clocks = <&scpi_dvfs 0>;
107			#cooling-cells = <2>;
108		};
109
110		cpu3: cpu@3 {
111			device_type = "cpu";
112			compatible = "arm,cortex-a53";
113			reg = <0x0 0x3>;
114			enable-method = "psci";
115			next-level-cache = <&l2>;
116			clocks = <&scpi_dvfs 0>;
117			#cooling-cells = <2>;
118		};
119
120		l2: l2-cache0 {
121			compatible = "cache";
122		};
123	};
124
125	thermal-zones {
126		cpu-thermal {
127			polling-delay-passive = <250>; /* milliseconds */
128			polling-delay = <1000>; /* milliseconds */
129
130			thermal-sensors = <&scpi_sensors 0>;
131
132			trips {
133				cpu_passive: cpu-passive {
134					temperature = <80000>; /* millicelsius */
135					hysteresis = <2000>; /* millicelsius */
136					type = "passive";
137				};
138
139				cpu_hot: cpu-hot {
140					temperature = <90000>; /* millicelsius */
141					hysteresis = <2000>; /* millicelsius */
142					type = "hot";
143				};
144
145				cpu_critical: cpu-critical {
146					temperature = <110000>; /* millicelsius */
147					hysteresis = <2000>; /* millicelsius */
148					type = "critical";
149				};
150			};
151
152			cpu_cooling_maps: cooling-maps {
153				map0 {
154					trip = <&cpu_passive>;
155					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
156							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
157							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
158							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
159				};
160
161				map1 {
162					trip = <&cpu_hot>;
163					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
164							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
165							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
166							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
167				};
168			};
169		};
170	};
171
172	arm-pmu {
173		compatible = "arm,cortex-a53-pmu";
174		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
175			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
176			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
177			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
178		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
179	};
180
181	psci {
182		compatible = "arm,psci-0.2";
183		method = "smc";
184	};
185
186	timer {
187		compatible = "arm,armv8-timer";
188		interrupts = <GIC_PPI 13
189			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
190			     <GIC_PPI 14
191			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
192			     <GIC_PPI 11
193			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
194			     <GIC_PPI 10
195			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
196	};
197
198	xtal: xtal-clk {
199		compatible = "fixed-clock";
200		clock-frequency = <24000000>;
201		clock-output-names = "xtal";
202		#clock-cells = <0>;
203	};
204
205	firmware {
206		sm: secure-monitor {
207			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
208		};
209	};
210
211	efuse: efuse {
212		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
213		#address-cells = <1>;
214		#size-cells = <1>;
215		read-only;
216		secure-monitor = <&sm>;
217
218		sn: sn@14 {
219			reg = <0x14 0x10>;
220		};
221
222		eth_mac: eth_mac@34 {
223			reg = <0x34 0x10>;
224		};
225
226		bid: bid@46 {
227			reg = <0x46 0x30>;
228		};
229	};
230
231	scpi {
232		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
233		mboxes = <&mailbox 1 &mailbox 2>;
234		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
235
236		scpi_clocks: clocks {
237			compatible = "arm,scpi-clocks";
238
239			scpi_dvfs: scpi_clocks@0 {
240				compatible = "arm,scpi-dvfs-clocks";
241				#clock-cells = <1>;
242				clock-indices = <0>;
243				clock-output-names = "vcpu";
244			};
245		};
246
247		scpi_sensors: sensors {
248			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
249			#thermal-sensor-cells = <1>;
250		};
251	};
252
253	soc {
254		compatible = "simple-bus";
255		#address-cells = <2>;
256		#size-cells = <2>;
257		ranges;
258
259		cbus: bus@c1100000 {
260			compatible = "simple-bus";
261			reg = <0x0 0xc1100000 0x0 0x100000>;
262			#address-cells = <2>;
263			#size-cells = <2>;
264			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
265
266			gpio_intc: interrupt-controller@9880 {
267				compatible = "amlogic,meson-gpio-intc";
268				reg = <0x0 0x9880 0x0 0x10>;
269				interrupt-controller;
270				#interrupt-cells = <2>;
271				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
272				status = "disabled";
273			};
274
275			reset: reset-controller@4404 {
276				compatible = "amlogic,meson-gxbb-reset";
277				reg = <0x0 0x04404 0x0 0x9c>;
278				#reset-cells = <1>;
279			};
280
281			uart_A: serial@84c0 {
282				compatible = "amlogic,meson-gx-uart";
283				reg = <0x0 0x84c0 0x0 0x18>;
284				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
285				status = "disabled";
286			};
287
288			uart_B: serial@84dc {
289				compatible = "amlogic,meson-gx-uart";
290				reg = <0x0 0x84dc 0x0 0x18>;
291				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
292				status = "disabled";
293			};
294
295			i2c_A: i2c@8500 {
296				compatible = "amlogic,meson-gxbb-i2c";
297				reg = <0x0 0x08500 0x0 0x20>;
298				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
299				#address-cells = <1>;
300				#size-cells = <0>;
301				status = "disabled";
302			};
303
304			pwm_ab: pwm@8550 {
305				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
306				reg = <0x0 0x08550 0x0 0x10>;
307				#pwm-cells = <3>;
308				status = "disabled";
309			};
310
311			pwm_cd: pwm@8650 {
312				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
313				reg = <0x0 0x08650 0x0 0x10>;
314				#pwm-cells = <3>;
315				status = "disabled";
316			};
317
318			saradc: adc@8680 {
319				compatible = "amlogic,meson-saradc";
320				reg = <0x0 0x8680 0x0 0x34>;
321				#io-channel-cells = <1>;
322				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
323				status = "disabled";
324			};
325
326			pwm_ef: pwm@86c0 {
327				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
328				reg = <0x0 0x086c0 0x0 0x10>;
329				#pwm-cells = <3>;
330				status = "disabled";
331			};
332
333			uart_C: serial@8700 {
334				compatible = "amlogic,meson-gx-uart";
335				reg = <0x0 0x8700 0x0 0x18>;
336				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
337				status = "disabled";
338			};
339
340			clock-measure@8758 {
341				compatible = "amlogic,meson-gx-clk-measure";
342				reg = <0x0 0x8758 0x0 0x10>;
343			};
344
345			i2c_B: i2c@87c0 {
346				compatible = "amlogic,meson-gxbb-i2c";
347				reg = <0x0 0x087c0 0x0 0x20>;
348				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
349				#address-cells = <1>;
350				#size-cells = <0>;
351				status = "disabled";
352			};
353
354			i2c_C: i2c@87e0 {
355				compatible = "amlogic,meson-gxbb-i2c";
356				reg = <0x0 0x087e0 0x0 0x20>;
357				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
358				#address-cells = <1>;
359				#size-cells = <0>;
360				status = "disabled";
361			};
362
363			spicc: spi@8d80 {
364				compatible = "amlogic,meson-gx-spicc";
365				reg = <0x0 0x08d80 0x0 0x80>;
366				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
367				#address-cells = <1>;
368				#size-cells = <0>;
369				status = "disabled";
370			};
371
372			spifc: spi@8c80 {
373				compatible = "amlogic,meson-gxbb-spifc";
374				reg = <0x0 0x08c80 0x0 0x80>;
375				#address-cells = <1>;
376				#size-cells = <0>;
377				status = "disabled";
378			};
379
380			watchdog@98d0 {
381				compatible = "amlogic,meson-gxbb-wdt";
382				reg = <0x0 0x098d0 0x0 0x10>;
383				clocks = <&xtal>;
384			};
385		};
386
387		gic: interrupt-controller@c4301000 {
388			compatible = "arm,gic-400";
389			reg = <0x0 0xc4301000 0 0x1000>,
390			      <0x0 0xc4302000 0 0x2000>,
391			      <0x0 0xc4304000 0 0x2000>,
392			      <0x0 0xc4306000 0 0x2000>;
393			interrupt-controller;
394			interrupts = <GIC_PPI 9
395				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
396			#interrupt-cells = <3>;
397			#address-cells = <0>;
398		};
399
400		sram: sram@c8000000 {
401			compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
402			reg = <0x0 0xc8000000 0x0 0x14000>;
403
404			#address-cells = <1>;
405			#size-cells = <1>;
406			ranges = <0 0x0 0xc8000000 0x14000>;
407
408			cpu_scp_lpri: scp-shmem@0 {
409				compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
410				reg = <0x13000 0x400>;
411			};
412
413			cpu_scp_hpri: scp-shmem@200 {
414				compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
415				reg = <0x13400 0x400>;
416			};
417		};
418
419		aobus: bus@c8100000 {
420			compatible = "simple-bus";
421			reg = <0x0 0xc8100000 0x0 0x100000>;
422			#address-cells = <2>;
423			#size-cells = <2>;
424			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
425
426			sysctrl_AO: sys-ctrl@0 {
427				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
428				reg =  <0x0 0x0 0x0 0x100>;
429
430				pwrc_vpu: power-controller-vpu {
431					compatible = "amlogic,meson-gx-pwrc-vpu";
432					#power-domain-cells = <0>;
433					amlogic,hhi-sysctrl = <&sysctrl>;
434				};
435
436				clkc_AO: clock-controller {
437					compatible = "amlogic,meson-gx-aoclkc";
438					#clock-cells = <1>;
439					#reset-cells = <1>;
440				};
441			};
442
443			cec_AO: cec@100 {
444				compatible = "amlogic,meson-gx-ao-cec";
445				reg = <0x0 0x00100 0x0 0x14>;
446				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
447				status = "disabled";
448			};
449
450			sec_AO: ao-secure@140 {
451				compatible = "amlogic,meson-gx-ao-secure", "syscon";
452				reg = <0x0 0x140 0x0 0x140>;
453				amlogic,has-chip-id;
454			};
455
456			uart_AO: serial@4c0 {
457				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
458				reg = <0x0 0x004c0 0x0 0x18>;
459				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
460				status = "disabled";
461			};
462
463			uart_AO_B: serial@4e0 {
464				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
465				reg = <0x0 0x004e0 0x0 0x18>;
466				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
467				status = "disabled";
468			};
469
470			i2c_AO: i2c@500 {
471				compatible = "amlogic,meson-gxbb-i2c";
472				reg = <0x0 0x500 0x0 0x20>;
473				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
474				#address-cells = <1>;
475				#size-cells = <0>;
476				status = "disabled";
477			};
478
479			pwm_AO_ab: pwm@550 {
480				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
481				reg = <0x0 0x00550 0x0 0x10>;
482				#pwm-cells = <3>;
483				status = "disabled";
484			};
485
486			ir: ir@580 {
487				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
488				reg = <0x0 0x00580 0x0 0x40>;
489				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
490				status = "disabled";
491			};
492		};
493
494		vdec: video-codec@c8820000 {
495			compatible = "amlogic,gx-vdec";
496			reg = <0x0 0xc8820000 0x0 0x10000>,
497			      <0x0 0xc110a580 0x0 0xe4>;
498			reg-names = "dos", "esparser";
499
500			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
501				     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
502			interrupt-names = "vdec", "esparser";
503
504			amlogic,ao-sysctrl = <&sysctrl_AO>;
505			amlogic,canvas = <&canvas>;
506		};
507
508		periphs: bus@c8834000 {
509			compatible = "simple-bus";
510			reg = <0x0 0xc8834000 0x0 0x2000>;
511			#address-cells = <2>;
512			#size-cells = <2>;
513			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
514
515			hwrng: rng {
516				compatible = "amlogic,meson-rng";
517				reg = <0x0 0x0 0x0 0x4>;
518			};
519		};
520
521		dmcbus: bus@c8838000 {
522			compatible = "simple-bus";
523			reg = <0x0 0xc8838000 0x0 0x400>;
524			#address-cells = <2>;
525			#size-cells = <2>;
526			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
527
528			canvas: video-lut@48 {
529				compatible = "amlogic,canvas";
530				reg = <0x0 0x48 0x0 0x14>;
531			};
532		};
533
534		hiubus: bus@c883c000 {
535			compatible = "simple-bus";
536			reg = <0x0 0xc883c000 0x0 0x2000>;
537			#address-cells = <2>;
538			#size-cells = <2>;
539			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
540
541			sysctrl: system-controller@0 {
542				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
543				reg = <0 0 0 0x400>;
544			};
545
546			mailbox: mailbox@404 {
547				compatible = "amlogic,meson-gxbb-mhu";
548				reg = <0 0x404 0 0x4c>;
549				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
550					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
551					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
552				#mbox-cells = <1>;
553			};
554		};
555
556		ethmac: ethernet@c9410000 {
557			compatible = "amlogic,meson-gxbb-dwmac",
558				     "snps,dwmac-3.70a",
559				     "snps,dwmac";
560			reg = <0x0 0xc9410000 0x0 0x10000>,
561			      <0x0 0xc8834540 0x0 0x4>;
562			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
563			interrupt-names = "macirq";
564			rx-fifo-depth = <4096>;
565			tx-fifo-depth = <2048>;
566			status = "disabled";
567		};
568
569		apb: apb@d0000000 {
570			compatible = "simple-bus";
571			reg = <0x0 0xd0000000 0x0 0x200000>;
572			#address-cells = <2>;
573			#size-cells = <2>;
574			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
575
576			sd_emmc_a: mmc@70000 {
577				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
578				reg = <0x0 0x70000 0x0 0x800>;
579				interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
580				status = "disabled";
581			};
582
583			sd_emmc_b: mmc@72000 {
584				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
585				reg = <0x0 0x72000 0x0 0x800>;
586				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
587				status = "disabled";
588			};
589
590			sd_emmc_c: mmc@74000 {
591				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
592				reg = <0x0 0x74000 0x0 0x800>;
593				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
594				status = "disabled";
595			};
596		};
597
598		vpu: vpu@d0100000 {
599			compatible = "amlogic,meson-gx-vpu";
600			reg = <0x0 0xd0100000 0x0 0x100000>,
601			      <0x0 0xc883c000 0x0 0x1000>;
602			reg-names = "vpu", "hhi";
603			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
604			#address-cells = <1>;
605			#size-cells = <0>;
606			amlogic,canvas = <&canvas>;
607
608			/* CVBS VDAC output port */
609			cvbs_vdac_port: port@0 {
610				reg = <0>;
611			};
612
613			/* HDMI-TX output port */
614			hdmi_tx_port: port@1 {
615				reg = <1>;
616
617				hdmi_tx_out: endpoint {
618					remote-endpoint = <&hdmi_tx_in>;
619				};
620			};
621		};
622
623		hdmi_tx: hdmi-tx@c883a000 {
624			compatible = "amlogic,meson-gx-dw-hdmi";
625			reg = <0x0 0xc883a000 0x0 0x1c>;
626			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
627			#address-cells = <1>;
628			#size-cells = <0>;
629			status = "disabled";
630
631			/* VPU VENC Input */
632			hdmi_tx_venc_port: port@0 {
633				reg = <0>;
634
635				hdmi_tx_in: endpoint {
636					remote-endpoint = <&hdmi_tx_out>;
637				};
638			};
639
640			/* TMDS Output */
641			hdmi_tx_tmds_port: port@1 {
642				reg = <1>;
643			};
644		};
645	};
646};
647