1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-g12-common.dtsi"
8
9/ {
10	compatible = "amlogic,g12b";
11
12	cpus {
13		#address-cells = <0x2>;
14		#size-cells = <0x0>;
15
16		cpu-map {
17			cluster0 {
18				core0 {
19					cpu = <&cpu0>;
20				};
21
22				core1 {
23					cpu = <&cpu1>;
24				};
25			};
26
27			cluster1 {
28				core0 {
29					cpu = <&cpu100>;
30				};
31
32				core1 {
33					cpu = <&cpu101>;
34				};
35
36				core2 {
37					cpu = <&cpu102>;
38				};
39
40				core3 {
41					cpu = <&cpu103>;
42				};
43			};
44		};
45
46		cpu0: cpu@0 {
47			device_type = "cpu";
48			compatible = "arm,cortex-a53";
49			reg = <0x0 0x0>;
50			enable-method = "psci";
51			next-level-cache = <&l2>;
52		};
53
54		cpu1: cpu@1 {
55			device_type = "cpu";
56			compatible = "arm,cortex-a53";
57			reg = <0x0 0x1>;
58			enable-method = "psci";
59			next-level-cache = <&l2>;
60		};
61
62		cpu100: cpu@100 {
63			device_type = "cpu";
64			compatible = "arm,cortex-a73";
65			reg = <0x0 0x100>;
66			enable-method = "psci";
67			next-level-cache = <&l2>;
68		};
69
70		cpu101: cpu@101 {
71			device_type = "cpu";
72			compatible = "arm,cortex-a73";
73			reg = <0x0 0x101>;
74			enable-method = "psci";
75			next-level-cache = <&l2>;
76		};
77
78		cpu102: cpu@102 {
79			device_type = "cpu";
80			compatible = "arm,cortex-a73";
81			reg = <0x0 0x102>;
82			enable-method = "psci";
83			next-level-cache = <&l2>;
84		};
85
86		cpu103: cpu@103 {
87			device_type = "cpu";
88			compatible = "arm,cortex-a73";
89			reg = <0x0 0x103>;
90			enable-method = "psci";
91			next-level-cache = <&l2>;
92		};
93
94		l2: l2-cache0 {
95			compatible = "cache";
96		};
97	};
98
99	cpu_opp_table_0: opp-table-0 {
100		compatible = "operating-points-v2";
101		opp-shared;
102
103		opp-100000000 {
104			opp-hz = /bits/ 64 <100000000>;
105			opp-microvolt = <731000>;
106		};
107
108		opp-250000000 {
109			opp-hz = /bits/ 64 <250000000>;
110			opp-microvolt = <731000>;
111		};
112
113		opp-500000000 {
114			opp-hz = /bits/ 64 <500000000>;
115			opp-microvolt = <731000>;
116		};
117
118		opp-666666666 {
119			opp-hz = /bits/ 64 <666666666>;
120			opp-microvolt = <731000>;
121		};
122
123		opp-1000000000 {
124			opp-hz = /bits/ 64 <1000000000>;
125			opp-microvolt = <731000>;
126		};
127
128		opp-1200000000 {
129			opp-hz = /bits/ 64 <1200000000>;
130			opp-microvolt = <731000>;
131		};
132
133		opp-1398000000 {
134			opp-hz = /bits/ 64 <1398000000>;
135			opp-microvolt = <761000>;
136		};
137
138		opp-1512000000 {
139			opp-hz = /bits/ 64 <1512000000>;
140			opp-microvolt = <791000>;
141		};
142
143		opp-1608000000 {
144			opp-hz = /bits/ 64 <1608000000>;
145			opp-microvolt = <831000>;
146		};
147
148		opp-1704000000 {
149			opp-hz = /bits/ 64 <1704000000>;
150			opp-microvolt = <861000>;
151		};
152
153		opp-1896000000 {
154			opp-hz = /bits/ 64 <1896000000>;
155			opp-microvolt = <981000>;
156		};
157	};
158
159	cpub_opp_table_1: opp-table-1 {
160		compatible = "operating-points-v2";
161		opp-shared;
162
163		opp-100000000 {
164			opp-hz = /bits/ 64 <100000000>;
165			opp-microvolt = <751000>;
166		};
167
168		opp-250000000 {
169			opp-hz = /bits/ 64 <250000000>;
170			opp-microvolt = <751000>;
171		};
172
173		opp-500000000 {
174			opp-hz = /bits/ 64 <500000000>;
175			opp-microvolt = <751000>;
176		};
177
178		opp-666666666 {
179			opp-hz = /bits/ 64 <666666666>;
180			opp-microvolt = <751000>;
181		};
182
183		opp-1000000000 {
184			opp-hz = /bits/ 64 <1000000000>;
185			opp-microvolt = <751000>;
186		};
187
188		opp-1200000000 {
189			opp-hz = /bits/ 64 <1200000000>;
190			opp-microvolt = <771000>;
191		};
192
193		opp-1398000000 {
194			opp-hz = /bits/ 64 <1398000000>;
195			opp-microvolt = <791000>;
196		};
197
198		opp-1512000000 {
199			opp-hz = /bits/ 64 <1512000000>;
200			opp-microvolt = <821000>;
201		};
202
203		opp-1608000000 {
204			opp-hz = /bits/ 64 <1608000000>;
205			opp-microvolt = <861000>;
206		};
207
208		opp-1704000000 {
209			opp-hz = /bits/ 64 <1704000000>;
210			opp-microvolt = <891000>;
211		};
212	};
213};
214
215&clkc {
216	compatible = "amlogic,g12b-clkc";
217};
218
219&sd_emmc_a {
220	amlogic,dram-access-quirk;
221};
222