1*d747e7f7SYuntian Zhang// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*d747e7f7SYuntian Zhang/*
3*d747e7f7SYuntian Zhang * Copyright (c) 2019 BayLibre, SAS
4*d747e7f7SYuntian Zhang * Author: Neil Armstrong <narmstrong@baylibre.com>
5*d747e7f7SYuntian Zhang * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
6*d747e7f7SYuntian Zhang * Copyright (c) 2022 Radxa Limited
7*d747e7f7SYuntian Zhang * Author: Yuntian Zhang <yt@radxa.com>
8*d747e7f7SYuntian Zhang */
9*d747e7f7SYuntian Zhang
10*d747e7f7SYuntian Zhang/dts-v1/;
11*d747e7f7SYuntian Zhang
12*d747e7f7SYuntian Zhang#include "meson-g12b-a311d.dtsi"
13*d747e7f7SYuntian Zhang#include <dt-bindings/input/input.h>
14*d747e7f7SYuntian Zhang#include <dt-bindings/leds/common.h>
15*d747e7f7SYuntian Zhang#include <dt-bindings/gpio/meson-g12a-gpio.h>
16*d747e7f7SYuntian Zhang#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17*d747e7f7SYuntian Zhang
18*d747e7f7SYuntian Zhang/ {
19*d747e7f7SYuntian Zhang	compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
20*d747e7f7SYuntian Zhang	model = "Radxa Zero2";
21*d747e7f7SYuntian Zhang
22*d747e7f7SYuntian Zhang	aliases {
23*d747e7f7SYuntian Zhang		serial0 = &uart_AO;
24*d747e7f7SYuntian Zhang		serial2 = &uart_A;
25*d747e7f7SYuntian Zhang	};
26*d747e7f7SYuntian Zhang
27*d747e7f7SYuntian Zhang	chosen {
28*d747e7f7SYuntian Zhang		stdout-path = "serial0:115200n8";
29*d747e7f7SYuntian Zhang	};
30*d747e7f7SYuntian Zhang
31*d747e7f7SYuntian Zhang	memory@0 {
32*d747e7f7SYuntian Zhang		device_type = "memory";
33*d747e7f7SYuntian Zhang		reg = <0x0 0x0 0x0 0x80000000>;
34*d747e7f7SYuntian Zhang	};
35*d747e7f7SYuntian Zhang
36*d747e7f7SYuntian Zhang	gpio-keys-polled {
37*d747e7f7SYuntian Zhang		compatible = "gpio-keys-polled";
38*d747e7f7SYuntian Zhang		poll-interval = <100>;
39*d747e7f7SYuntian Zhang		power-button {
40*d747e7f7SYuntian Zhang			label = "power";
41*d747e7f7SYuntian Zhang			linux,code = <KEY_POWER>;
42*d747e7f7SYuntian Zhang			gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
43*d747e7f7SYuntian Zhang		};
44*d747e7f7SYuntian Zhang	};
45*d747e7f7SYuntian Zhang
46*d747e7f7SYuntian Zhang	leds {
47*d747e7f7SYuntian Zhang		compatible = "gpio-leds";
48*d747e7f7SYuntian Zhang
49*d747e7f7SYuntian Zhang		led-green {
50*d747e7f7SYuntian Zhang			color = <LED_COLOR_ID_GREEN>;
51*d747e7f7SYuntian Zhang			function = LED_FUNCTION_STATUS;
52*d747e7f7SYuntian Zhang			gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>;
53*d747e7f7SYuntian Zhang			linux,default-trigger = "heartbeat";
54*d747e7f7SYuntian Zhang		};
55*d747e7f7SYuntian Zhang	};
56*d747e7f7SYuntian Zhang
57*d747e7f7SYuntian Zhang	hdmi-connector {
58*d747e7f7SYuntian Zhang		compatible = "hdmi-connector";
59*d747e7f7SYuntian Zhang		type = "a";
60*d747e7f7SYuntian Zhang
61*d747e7f7SYuntian Zhang		port {
62*d747e7f7SYuntian Zhang			hdmi_connector_in: endpoint {
63*d747e7f7SYuntian Zhang				remote-endpoint = <&hdmi_tx_tmds_out>;
64*d747e7f7SYuntian Zhang			};
65*d747e7f7SYuntian Zhang		};
66*d747e7f7SYuntian Zhang	};
67*d747e7f7SYuntian Zhang
68*d747e7f7SYuntian Zhang	emmc_pwrseq: emmc-pwrseq {
69*d747e7f7SYuntian Zhang		compatible = "mmc-pwrseq-emmc";
70*d747e7f7SYuntian Zhang		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
71*d747e7f7SYuntian Zhang	};
72*d747e7f7SYuntian Zhang
73*d747e7f7SYuntian Zhang	sdio_pwrseq: sdio-pwrseq {
74*d747e7f7SYuntian Zhang		compatible = "mmc-pwrseq-simple";
75*d747e7f7SYuntian Zhang		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
76*d747e7f7SYuntian Zhang		clocks = <&wifi32k>;
77*d747e7f7SYuntian Zhang		clock-names = "ext_clock";
78*d747e7f7SYuntian Zhang	};
79*d747e7f7SYuntian Zhang
80*d747e7f7SYuntian Zhang	ao_5v: regulator-ao-5v {
81*d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
82*d747e7f7SYuntian Zhang		regulator-name = "AO_5V";
83*d747e7f7SYuntian Zhang		regulator-min-microvolt = <5000000>;
84*d747e7f7SYuntian Zhang		regulator-max-microvolt = <5000000>;
85*d747e7f7SYuntian Zhang		regulator-always-on;
86*d747e7f7SYuntian Zhang	};
87*d747e7f7SYuntian Zhang
88*d747e7f7SYuntian Zhang	vcc_1v8: regulator-vcc-1v8 {
89*d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
90*d747e7f7SYuntian Zhang		regulator-name = "VCC_1V8";
91*d747e7f7SYuntian Zhang		regulator-min-microvolt = <1800000>;
92*d747e7f7SYuntian Zhang		regulator-max-microvolt = <1800000>;
93*d747e7f7SYuntian Zhang		vin-supply = <&vcc_3v3>;
94*d747e7f7SYuntian Zhang		regulator-always-on;
95*d747e7f7SYuntian Zhang	};
96*d747e7f7SYuntian Zhang
97*d747e7f7SYuntian Zhang	vcc_3v3: regulator-vcc-3v3 {
98*d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
99*d747e7f7SYuntian Zhang		regulator-name = "VCC_3V3";
100*d747e7f7SYuntian Zhang		regulator-min-microvolt = <3300000>;
101*d747e7f7SYuntian Zhang		regulator-max-microvolt = <3300000>;
102*d747e7f7SYuntian Zhang		vin-supply = <&vddao_3v3>;
103*d747e7f7SYuntian Zhang		regulator-always-on;
104*d747e7f7SYuntian Zhang		/* FIXME: actually controlled by VDDCPU_B_EN */
105*d747e7f7SYuntian Zhang	};
106*d747e7f7SYuntian Zhang
107*d747e7f7SYuntian Zhang	vddao_1v8: regulator-vddao-1v8 {
108*d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
109*d747e7f7SYuntian Zhang		regulator-name = "VDDIO_AO1V8";
110*d747e7f7SYuntian Zhang		regulator-min-microvolt = <1800000>;
111*d747e7f7SYuntian Zhang		regulator-max-microvolt = <1800000>;
112*d747e7f7SYuntian Zhang		vin-supply = <&vddao_3v3>;
113*d747e7f7SYuntian Zhang		regulator-always-on;
114*d747e7f7SYuntian Zhang	};
115*d747e7f7SYuntian Zhang
116*d747e7f7SYuntian Zhang	vddao_3v3: regulator-vddao-3v3 {
117*d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
118*d747e7f7SYuntian Zhang		regulator-name = "VDDAO_3V3";
119*d747e7f7SYuntian Zhang		regulator-min-microvolt = <3300000>;
120*d747e7f7SYuntian Zhang		regulator-max-microvolt = <3300000>;
121*d747e7f7SYuntian Zhang		vin-supply = <&ao_5v>;
122*d747e7f7SYuntian Zhang		regulator-always-on;
123*d747e7f7SYuntian Zhang	};
124*d747e7f7SYuntian Zhang
125*d747e7f7SYuntian Zhang	vddcpu_a: regulator-vddcpu-a {
126*d747e7f7SYuntian Zhang		/*
127*d747e7f7SYuntian Zhang		 * MP8756GD Regulator.
128*d747e7f7SYuntian Zhang		 */
129*d747e7f7SYuntian Zhang		compatible = "pwm-regulator";
130*d747e7f7SYuntian Zhang
131*d747e7f7SYuntian Zhang		regulator-name = "VDDCPU_A";
132*d747e7f7SYuntian Zhang		regulator-min-microvolt = <730000>;
133*d747e7f7SYuntian Zhang		regulator-max-microvolt = <1022000>;
134*d747e7f7SYuntian Zhang
135*d747e7f7SYuntian Zhang		pwm-supply = <&ao_5v>;
136*d747e7f7SYuntian Zhang
137*d747e7f7SYuntian Zhang		pwms = <&pwm_ab 0 1250 0>;
138*d747e7f7SYuntian Zhang		pwm-dutycycle-range = <100 0>;
139*d747e7f7SYuntian Zhang
140*d747e7f7SYuntian Zhang		regulator-boot-on;
141*d747e7f7SYuntian Zhang		regulator-always-on;
142*d747e7f7SYuntian Zhang	};
143*d747e7f7SYuntian Zhang
144*d747e7f7SYuntian Zhang	vddcpu_b: regulator-vddcpu-b {
145*d747e7f7SYuntian Zhang		/*
146*d747e7f7SYuntian Zhang		 * Silergy SY8120B1ABC Regulator.
147*d747e7f7SYuntian Zhang		 */
148*d747e7f7SYuntian Zhang		compatible = "pwm-regulator";
149*d747e7f7SYuntian Zhang
150*d747e7f7SYuntian Zhang		regulator-name = "VDDCPU_B";
151*d747e7f7SYuntian Zhang		regulator-min-microvolt = <730000>;
152*d747e7f7SYuntian Zhang		regulator-max-microvolt = <1022000>;
153*d747e7f7SYuntian Zhang
154*d747e7f7SYuntian Zhang		pwm-supply = <&ao_5v>;
155*d747e7f7SYuntian Zhang
156*d747e7f7SYuntian Zhang		pwms = <&pwm_AO_cd 1 1250 0>;
157*d747e7f7SYuntian Zhang		pwm-dutycycle-range = <100 0>;
158*d747e7f7SYuntian Zhang
159*d747e7f7SYuntian Zhang		regulator-boot-on;
160*d747e7f7SYuntian Zhang		regulator-always-on;
161*d747e7f7SYuntian Zhang	};
162*d747e7f7SYuntian Zhang
163*d747e7f7SYuntian Zhang	sound {
164*d747e7f7SYuntian Zhang		compatible = "amlogic,axg-sound-card";
165*d747e7f7SYuntian Zhang		model = "RADXA-ZERO2";
166*d747e7f7SYuntian Zhang		audio-aux-devs = <&tdmout_b>;
167*d747e7f7SYuntian Zhang		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
168*d747e7f7SYuntian Zhang				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
169*d747e7f7SYuntian Zhang				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
170*d747e7f7SYuntian Zhang				"TDM_B Playback", "TDMOUT_B OUT";
171*d747e7f7SYuntian Zhang
172*d747e7f7SYuntian Zhang		assigned-clocks = <&clkc CLKID_MPLL2>,
173*d747e7f7SYuntian Zhang				  <&clkc CLKID_MPLL0>,
174*d747e7f7SYuntian Zhang				  <&clkc CLKID_MPLL1>;
175*d747e7f7SYuntian Zhang		assigned-clock-parents = <0>, <0>, <0>;
176*d747e7f7SYuntian Zhang		assigned-clock-rates = <294912000>,
177*d747e7f7SYuntian Zhang				       <270950400>,
178*d747e7f7SYuntian Zhang				       <393216000>;
179*d747e7f7SYuntian Zhang
180*d747e7f7SYuntian Zhang		dai-link-0 {
181*d747e7f7SYuntian Zhang			sound-dai = <&frddr_a>;
182*d747e7f7SYuntian Zhang		};
183*d747e7f7SYuntian Zhang
184*d747e7f7SYuntian Zhang		dai-link-1 {
185*d747e7f7SYuntian Zhang			sound-dai = <&frddr_b>;
186*d747e7f7SYuntian Zhang		};
187*d747e7f7SYuntian Zhang
188*d747e7f7SYuntian Zhang		dai-link-2 {
189*d747e7f7SYuntian Zhang			sound-dai = <&frddr_c>;
190*d747e7f7SYuntian Zhang		};
191*d747e7f7SYuntian Zhang
192*d747e7f7SYuntian Zhang		/* 8ch hdmi interface */
193*d747e7f7SYuntian Zhang		dai-link-3 {
194*d747e7f7SYuntian Zhang			sound-dai = <&tdmif_b>;
195*d747e7f7SYuntian Zhang			dai-format = "i2s";
196*d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-0 = <1 1>;
197*d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-1 = <1 1>;
198*d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-2 = <1 1>;
199*d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-3 = <1 1>;
200*d747e7f7SYuntian Zhang			mclk-fs = <256>;
201*d747e7f7SYuntian Zhang
202*d747e7f7SYuntian Zhang			codec {
203*d747e7f7SYuntian Zhang				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
204*d747e7f7SYuntian Zhang			};
205*d747e7f7SYuntian Zhang		};
206*d747e7f7SYuntian Zhang
207*d747e7f7SYuntian Zhang		/* hdmi glue */
208*d747e7f7SYuntian Zhang		dai-link-4 {
209*d747e7f7SYuntian Zhang			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
210*d747e7f7SYuntian Zhang
211*d747e7f7SYuntian Zhang			codec {
212*d747e7f7SYuntian Zhang				sound-dai = <&hdmi_tx>;
213*d747e7f7SYuntian Zhang			};
214*d747e7f7SYuntian Zhang		};
215*d747e7f7SYuntian Zhang	};
216*d747e7f7SYuntian Zhang
217*d747e7f7SYuntian Zhang	wifi32k: clock-0 {
218*d747e7f7SYuntian Zhang		compatible = "pwm-clock";
219*d747e7f7SYuntian Zhang		#clock-cells = <0>;
220*d747e7f7SYuntian Zhang		clock-frequency = <32768>;
221*d747e7f7SYuntian Zhang		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
222*d747e7f7SYuntian Zhang	};
223*d747e7f7SYuntian Zhang};
224*d747e7f7SYuntian Zhang
225*d747e7f7SYuntian Zhang&arb {
226*d747e7f7SYuntian Zhang	status = "okay";
227*d747e7f7SYuntian Zhang};
228*d747e7f7SYuntian Zhang
229*d747e7f7SYuntian Zhang&cec_AO {
230*d747e7f7SYuntian Zhang	pinctrl-0 = <&cec_ao_a_h_pins>;
231*d747e7f7SYuntian Zhang	pinctrl-names = "default";
232*d747e7f7SYuntian Zhang	status = "disabled";
233*d747e7f7SYuntian Zhang	hdmi-phandle = <&hdmi_tx>;
234*d747e7f7SYuntian Zhang};
235*d747e7f7SYuntian Zhang
236*d747e7f7SYuntian Zhang&cecb_AO {
237*d747e7f7SYuntian Zhang	pinctrl-0 = <&cec_ao_b_h_pins>;
238*d747e7f7SYuntian Zhang	pinctrl-names = "default";
239*d747e7f7SYuntian Zhang	status = "okay";
240*d747e7f7SYuntian Zhang	hdmi-phandle = <&hdmi_tx>;
241*d747e7f7SYuntian Zhang};
242*d747e7f7SYuntian Zhang
243*d747e7f7SYuntian Zhang&clkc_audio {
244*d747e7f7SYuntian Zhang	status = "okay";
245*d747e7f7SYuntian Zhang};
246*d747e7f7SYuntian Zhang
247*d747e7f7SYuntian Zhang&cpu0 {
248*d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_b>;
249*d747e7f7SYuntian Zhang	operating-points-v2 = <&cpu_opp_table_0>;
250*d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPU_CLK>;
251*d747e7f7SYuntian Zhang	clock-latency = <50000>;
252*d747e7f7SYuntian Zhang};
253*d747e7f7SYuntian Zhang
254*d747e7f7SYuntian Zhang&cpu1 {
255*d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_b>;
256*d747e7f7SYuntian Zhang	operating-points-v2 = <&cpu_opp_table_0>;
257*d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPU_CLK>;
258*d747e7f7SYuntian Zhang	clock-latency = <50000>;
259*d747e7f7SYuntian Zhang};
260*d747e7f7SYuntian Zhang
261*d747e7f7SYuntian Zhang&cpu100 {
262*d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
263*d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
264*d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
265*d747e7f7SYuntian Zhang	clock-latency = <50000>;
266*d747e7f7SYuntian Zhang};
267*d747e7f7SYuntian Zhang
268*d747e7f7SYuntian Zhang&cpu101 {
269*d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
270*d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
271*d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
272*d747e7f7SYuntian Zhang	clock-latency = <50000>;
273*d747e7f7SYuntian Zhang};
274*d747e7f7SYuntian Zhang
275*d747e7f7SYuntian Zhang&cpu102 {
276*d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
277*d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
278*d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
279*d747e7f7SYuntian Zhang	clock-latency = <50000>;
280*d747e7f7SYuntian Zhang};
281*d747e7f7SYuntian Zhang
282*d747e7f7SYuntian Zhang&cpu103 {
283*d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
284*d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
285*d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
286*d747e7f7SYuntian Zhang	clock-latency = <50000>;
287*d747e7f7SYuntian Zhang};
288*d747e7f7SYuntian Zhang
289*d747e7f7SYuntian Zhang&frddr_a {
290*d747e7f7SYuntian Zhang	status = "okay";
291*d747e7f7SYuntian Zhang};
292*d747e7f7SYuntian Zhang
293*d747e7f7SYuntian Zhang&frddr_b {
294*d747e7f7SYuntian Zhang	status = "okay";
295*d747e7f7SYuntian Zhang};
296*d747e7f7SYuntian Zhang
297*d747e7f7SYuntian Zhang&frddr_c {
298*d747e7f7SYuntian Zhang	status = "okay";
299*d747e7f7SYuntian Zhang};
300*d747e7f7SYuntian Zhang
301*d747e7f7SYuntian Zhang&gpio {
302*d747e7f7SYuntian Zhang	gpio-line-names =
303*d747e7f7SYuntian Zhang		/* GPIOZ */
304*d747e7f7SYuntian Zhang		"PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
305*d747e7f7SYuntian Zhang		"", "", "", "", "", "", "", "",
306*d747e7f7SYuntian Zhang		/* GPIOH */
307*d747e7f7SYuntian Zhang		"", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
308*d747e7f7SYuntian Zhang		"",
309*d747e7f7SYuntian Zhang		/* BOOT */
310*d747e7f7SYuntian Zhang		"", "", "", "", "", "", "", "",
311*d747e7f7SYuntian Zhang		"", "", "", "", "EMMC_PWRSEQ", "", "", "",
312*d747e7f7SYuntian Zhang		/* GPIOC */
313*d747e7f7SYuntian Zhang		"", "", "", "", "", "", "SD_CD", "PIN_36",
314*d747e7f7SYuntian Zhang		/* GPIOA */
315*d747e7f7SYuntian Zhang		"PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
316*d747e7f7SYuntian Zhang		"", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
317*d747e7f7SYuntian Zhang		/* GPIOX */
318*d747e7f7SYuntian Zhang		"", "", "", "", "", "", "SDIO_PWRSEQ", "",
319*d747e7f7SYuntian Zhang		"", "", "", "", "", "", "", "",
320*d747e7f7SYuntian Zhang		"", "BT_SHUTDOWN", "", "";
321*d747e7f7SYuntian Zhang};
322*d747e7f7SYuntian Zhang
323*d747e7f7SYuntian Zhang&gpio_ao {
324*d747e7f7SYuntian Zhang	gpio-line-names =
325*d747e7f7SYuntian Zhang		/* GPIOAO */
326*d747e7f7SYuntian Zhang		"PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
327*d747e7f7SYuntian Zhang		"PIN_33", "PIN_37", "FAN", "",
328*d747e7f7SYuntian Zhang		/* GPIOE */
329*d747e7f7SYuntian Zhang		"", "", "";
330*d747e7f7SYuntian Zhang};
331*d747e7f7SYuntian Zhang
332*d747e7f7SYuntian Zhang&hdmi_tx {
333*d747e7f7SYuntian Zhang	status = "okay";
334*d747e7f7SYuntian Zhang	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
335*d747e7f7SYuntian Zhang	pinctrl-names = "default";
336*d747e7f7SYuntian Zhang	hdmi-supply = <&ao_5v>;
337*d747e7f7SYuntian Zhang};
338*d747e7f7SYuntian Zhang
339*d747e7f7SYuntian Zhang&hdmi_tx_tmds_port {
340*d747e7f7SYuntian Zhang	hdmi_tx_tmds_out: endpoint {
341*d747e7f7SYuntian Zhang		remote-endpoint = <&hdmi_connector_in>;
342*d747e7f7SYuntian Zhang	};
343*d747e7f7SYuntian Zhang};
344*d747e7f7SYuntian Zhang
345*d747e7f7SYuntian Zhang&ir {
346*d747e7f7SYuntian Zhang	status = "disabled";
347*d747e7f7SYuntian Zhang	pinctrl-0 = <&remote_input_ao_pins>;
348*d747e7f7SYuntian Zhang	pinctrl-names = "default";
349*d747e7f7SYuntian Zhang};
350*d747e7f7SYuntian Zhang
351*d747e7f7SYuntian Zhang&pwm_ab {
352*d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_a_e_pins>;
353*d747e7f7SYuntian Zhang	pinctrl-names = "default";
354*d747e7f7SYuntian Zhang	clocks = <&xtal>;
355*d747e7f7SYuntian Zhang	clock-names = "clkin0";
356*d747e7f7SYuntian Zhang	status = "okay";
357*d747e7f7SYuntian Zhang};
358*d747e7f7SYuntian Zhang
359*d747e7f7SYuntian Zhang&pwm_ef {
360*d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_e_pins>;
361*d747e7f7SYuntian Zhang	pinctrl-names = "default";
362*d747e7f7SYuntian Zhang	clocks = <&xtal>;
363*d747e7f7SYuntian Zhang	clock-names = "clkin2";
364*d747e7f7SYuntian Zhang	status = "okay";
365*d747e7f7SYuntian Zhang};
366*d747e7f7SYuntian Zhang
367*d747e7f7SYuntian Zhang&pwm_AO_ab {
368*d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_ao_a_pins>;
369*d747e7f7SYuntian Zhang	pinctrl-names = "default";
370*d747e7f7SYuntian Zhang	clocks = <&xtal>;
371*d747e7f7SYuntian Zhang	clock-names = "clkin3";
372*d747e7f7SYuntian Zhang	status = "okay";
373*d747e7f7SYuntian Zhang};
374*d747e7f7SYuntian Zhang
375*d747e7f7SYuntian Zhang&pwm_AO_cd {
376*d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_ao_d_e_pins>;
377*d747e7f7SYuntian Zhang	pinctrl-names = "default";
378*d747e7f7SYuntian Zhang	clocks = <&xtal>;
379*d747e7f7SYuntian Zhang	clock-names = "clkin4";
380*d747e7f7SYuntian Zhang	status = "okay";
381*d747e7f7SYuntian Zhang};
382*d747e7f7SYuntian Zhang
383*d747e7f7SYuntian Zhang&saradc {
384*d747e7f7SYuntian Zhang	status = "okay";
385*d747e7f7SYuntian Zhang	vref-supply = <&vddao_1v8>;
386*d747e7f7SYuntian Zhang};
387*d747e7f7SYuntian Zhang
388*d747e7f7SYuntian Zhang/* SDIO */
389*d747e7f7SYuntian Zhang&sd_emmc_a {
390*d747e7f7SYuntian Zhang	status = "okay";
391*d747e7f7SYuntian Zhang	pinctrl-0 = <&sdio_pins>;
392*d747e7f7SYuntian Zhang	pinctrl-1 = <&sdio_clk_gate_pins>;
393*d747e7f7SYuntian Zhang	pinctrl-names = "default", "clk-gate";
394*d747e7f7SYuntian Zhang	#address-cells = <1>;
395*d747e7f7SYuntian Zhang	#size-cells = <0>;
396*d747e7f7SYuntian Zhang
397*d747e7f7SYuntian Zhang	bus-width = <4>;
398*d747e7f7SYuntian Zhang	cap-sd-highspeed;
399*d747e7f7SYuntian Zhang	max-frequency = <100000000>;
400*d747e7f7SYuntian Zhang
401*d747e7f7SYuntian Zhang	non-removable;
402*d747e7f7SYuntian Zhang	disable-wp;
403*d747e7f7SYuntian Zhang
404*d747e7f7SYuntian Zhang	/* WiFi firmware requires power to be kept while in suspend */
405*d747e7f7SYuntian Zhang	keep-power-in-suspend;
406*d747e7f7SYuntian Zhang
407*d747e7f7SYuntian Zhang	mmc-pwrseq = <&sdio_pwrseq>;
408*d747e7f7SYuntian Zhang
409*d747e7f7SYuntian Zhang	vmmc-supply = <&vddao_3v3>;
410*d747e7f7SYuntian Zhang	vqmmc-supply = <&vddao_1v8>;
411*d747e7f7SYuntian Zhang
412*d747e7f7SYuntian Zhang	brcmf: wifi@1 {
413*d747e7f7SYuntian Zhang		reg = <1>;
414*d747e7f7SYuntian Zhang		compatible = "brcm,bcm4329-fmac";
415*d747e7f7SYuntian Zhang	};
416*d747e7f7SYuntian Zhang};
417*d747e7f7SYuntian Zhang
418*d747e7f7SYuntian Zhang/* SD card */
419*d747e7f7SYuntian Zhang&sd_emmc_b {
420*d747e7f7SYuntian Zhang	status = "okay";
421*d747e7f7SYuntian Zhang	pinctrl-0 = <&sdcard_c_pins>;
422*d747e7f7SYuntian Zhang	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
423*d747e7f7SYuntian Zhang	pinctrl-names = "default", "clk-gate";
424*d747e7f7SYuntian Zhang
425*d747e7f7SYuntian Zhang	bus-width = <4>;
426*d747e7f7SYuntian Zhang	cap-sd-highspeed;
427*d747e7f7SYuntian Zhang	max-frequency = <50000000>;
428*d747e7f7SYuntian Zhang	disable-wp;
429*d747e7f7SYuntian Zhang
430*d747e7f7SYuntian Zhang	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
431*d747e7f7SYuntian Zhang	vmmc-supply = <&vddao_3v3>;
432*d747e7f7SYuntian Zhang	vqmmc-supply = <&vddao_3v3>;
433*d747e7f7SYuntian Zhang};
434*d747e7f7SYuntian Zhang
435*d747e7f7SYuntian Zhang/* eMMC */
436*d747e7f7SYuntian Zhang&sd_emmc_c {
437*d747e7f7SYuntian Zhang	status = "okay";
438*d747e7f7SYuntian Zhang	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
439*d747e7f7SYuntian Zhang	pinctrl-1 = <&emmc_clk_gate_pins>;
440*d747e7f7SYuntian Zhang	pinctrl-names = "default", "clk-gate";
441*d747e7f7SYuntian Zhang
442*d747e7f7SYuntian Zhang	bus-width = <8>;
443*d747e7f7SYuntian Zhang	cap-mmc-highspeed;
444*d747e7f7SYuntian Zhang	mmc-ddr-1_8v;
445*d747e7f7SYuntian Zhang	mmc-hs200-1_8v;
446*d747e7f7SYuntian Zhang	max-frequency = <200000000>;
447*d747e7f7SYuntian Zhang	disable-wp;
448*d747e7f7SYuntian Zhang
449*d747e7f7SYuntian Zhang	mmc-pwrseq = <&emmc_pwrseq>;
450*d747e7f7SYuntian Zhang	vmmc-supply = <&vcc_3v3>;
451*d747e7f7SYuntian Zhang	vqmmc-supply = <&vcc_1v8>;
452*d747e7f7SYuntian Zhang};
453*d747e7f7SYuntian Zhang
454*d747e7f7SYuntian Zhang&tdmif_b {
455*d747e7f7SYuntian Zhang	status = "okay";
456*d747e7f7SYuntian Zhang};
457*d747e7f7SYuntian Zhang
458*d747e7f7SYuntian Zhang&tdmout_b {
459*d747e7f7SYuntian Zhang	status = "okay";
460*d747e7f7SYuntian Zhang};
461*d747e7f7SYuntian Zhang
462*d747e7f7SYuntian Zhang&tohdmitx {
463*d747e7f7SYuntian Zhang	status = "okay";
464*d747e7f7SYuntian Zhang};
465*d747e7f7SYuntian Zhang
466*d747e7f7SYuntian Zhang&uart_A {
467*d747e7f7SYuntian Zhang	status = "okay";
468*d747e7f7SYuntian Zhang	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
469*d747e7f7SYuntian Zhang	pinctrl-names = "default";
470*d747e7f7SYuntian Zhang	uart-has-rtscts;
471*d747e7f7SYuntian Zhang
472*d747e7f7SYuntian Zhang	bluetooth {
473*d747e7f7SYuntian Zhang		compatible = "brcm,bcm43438-bt";
474*d747e7f7SYuntian Zhang		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
475*d747e7f7SYuntian Zhang		max-speed = <2000000>;
476*d747e7f7SYuntian Zhang		clocks = <&wifi32k>;
477*d747e7f7SYuntian Zhang		clock-names = "lpo";
478*d747e7f7SYuntian Zhang	};
479*d747e7f7SYuntian Zhang};
480*d747e7f7SYuntian Zhang
481*d747e7f7SYuntian Zhang&uart_AO {
482*d747e7f7SYuntian Zhang	status = "okay";
483*d747e7f7SYuntian Zhang	pinctrl-0 = <&uart_ao_a_pins>;
484*d747e7f7SYuntian Zhang	pinctrl-names = "default";
485*d747e7f7SYuntian Zhang};
486*d747e7f7SYuntian Zhang
487*d747e7f7SYuntian Zhang&usb {
488*d747e7f7SYuntian Zhang	status = "okay";
489*d747e7f7SYuntian Zhang};
490