1d747e7f7SYuntian Zhang// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2d747e7f7SYuntian Zhang/*
3d747e7f7SYuntian Zhang * Copyright (c) 2019 BayLibre, SAS
4d747e7f7SYuntian Zhang * Author: Neil Armstrong <narmstrong@baylibre.com>
5d747e7f7SYuntian Zhang * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
6d747e7f7SYuntian Zhang * Copyright (c) 2022 Radxa Limited
7d747e7f7SYuntian Zhang * Author: Yuntian Zhang <yt@radxa.com>
8d747e7f7SYuntian Zhang */
9d747e7f7SYuntian Zhang
10d747e7f7SYuntian Zhang/dts-v1/;
11d747e7f7SYuntian Zhang
12d747e7f7SYuntian Zhang#include "meson-g12b-a311d.dtsi"
13d747e7f7SYuntian Zhang#include <dt-bindings/input/input.h>
14d747e7f7SYuntian Zhang#include <dt-bindings/leds/common.h>
15d747e7f7SYuntian Zhang#include <dt-bindings/gpio/meson-g12a-gpio.h>
16d747e7f7SYuntian Zhang#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17d747e7f7SYuntian Zhang
18d747e7f7SYuntian Zhang/ {
19d747e7f7SYuntian Zhang	compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
20d747e7f7SYuntian Zhang	model = "Radxa Zero2";
21d747e7f7SYuntian Zhang
22d747e7f7SYuntian Zhang	aliases {
23d747e7f7SYuntian Zhang		serial0 = &uart_AO;
24d747e7f7SYuntian Zhang		serial2 = &uart_A;
25d747e7f7SYuntian Zhang	};
26d747e7f7SYuntian Zhang
27d747e7f7SYuntian Zhang	chosen {
28d747e7f7SYuntian Zhang		stdout-path = "serial0:115200n8";
29d747e7f7SYuntian Zhang	};
30d747e7f7SYuntian Zhang
31d747e7f7SYuntian Zhang	memory@0 {
32d747e7f7SYuntian Zhang		device_type = "memory";
33d747e7f7SYuntian Zhang		reg = <0x0 0x0 0x0 0x80000000>;
34d747e7f7SYuntian Zhang	};
35d747e7f7SYuntian Zhang
36d747e7f7SYuntian Zhang	gpio-keys-polled {
37d747e7f7SYuntian Zhang		compatible = "gpio-keys-polled";
38d747e7f7SYuntian Zhang		poll-interval = <100>;
39d747e7f7SYuntian Zhang		power-button {
40d747e7f7SYuntian Zhang			label = "power";
41d747e7f7SYuntian Zhang			linux,code = <KEY_POWER>;
42d747e7f7SYuntian Zhang			gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
43d747e7f7SYuntian Zhang		};
44d747e7f7SYuntian Zhang	};
45d747e7f7SYuntian Zhang
46d747e7f7SYuntian Zhang	leds {
47d747e7f7SYuntian Zhang		compatible = "gpio-leds";
48d747e7f7SYuntian Zhang
49d747e7f7SYuntian Zhang		led-green {
50d747e7f7SYuntian Zhang			color = <LED_COLOR_ID_GREEN>;
51d747e7f7SYuntian Zhang			function = LED_FUNCTION_STATUS;
52d747e7f7SYuntian Zhang			gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>;
53d747e7f7SYuntian Zhang			linux,default-trigger = "heartbeat";
54d747e7f7SYuntian Zhang		};
55d747e7f7SYuntian Zhang	};
56d747e7f7SYuntian Zhang
57d747e7f7SYuntian Zhang	hdmi-connector {
58d747e7f7SYuntian Zhang		compatible = "hdmi-connector";
59d747e7f7SYuntian Zhang		type = "a";
60d747e7f7SYuntian Zhang
61d747e7f7SYuntian Zhang		port {
62d747e7f7SYuntian Zhang			hdmi_connector_in: endpoint {
63d747e7f7SYuntian Zhang				remote-endpoint = <&hdmi_tx_tmds_out>;
64d747e7f7SYuntian Zhang			};
65d747e7f7SYuntian Zhang		};
66d747e7f7SYuntian Zhang	};
67d747e7f7SYuntian Zhang
68d747e7f7SYuntian Zhang	emmc_pwrseq: emmc-pwrseq {
69d747e7f7SYuntian Zhang		compatible = "mmc-pwrseq-emmc";
70d747e7f7SYuntian Zhang		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
71d747e7f7SYuntian Zhang	};
72d747e7f7SYuntian Zhang
73d747e7f7SYuntian Zhang	sdio_pwrseq: sdio-pwrseq {
74d747e7f7SYuntian Zhang		compatible = "mmc-pwrseq-simple";
75d747e7f7SYuntian Zhang		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
76d747e7f7SYuntian Zhang		clocks = <&wifi32k>;
77d747e7f7SYuntian Zhang		clock-names = "ext_clock";
78d747e7f7SYuntian Zhang	};
79d747e7f7SYuntian Zhang
80d747e7f7SYuntian Zhang	ao_5v: regulator-ao-5v {
81d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
82d747e7f7SYuntian Zhang		regulator-name = "AO_5V";
83d747e7f7SYuntian Zhang		regulator-min-microvolt = <5000000>;
84d747e7f7SYuntian Zhang		regulator-max-microvolt = <5000000>;
85d747e7f7SYuntian Zhang		regulator-always-on;
86d747e7f7SYuntian Zhang	};
87d747e7f7SYuntian Zhang
88d747e7f7SYuntian Zhang	vcc_1v8: regulator-vcc-1v8 {
89d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
90d747e7f7SYuntian Zhang		regulator-name = "VCC_1V8";
91d747e7f7SYuntian Zhang		regulator-min-microvolt = <1800000>;
92d747e7f7SYuntian Zhang		regulator-max-microvolt = <1800000>;
93d747e7f7SYuntian Zhang		vin-supply = <&vcc_3v3>;
94d747e7f7SYuntian Zhang		regulator-always-on;
95d747e7f7SYuntian Zhang	};
96d747e7f7SYuntian Zhang
97d747e7f7SYuntian Zhang	vcc_3v3: regulator-vcc-3v3 {
98d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
99d747e7f7SYuntian Zhang		regulator-name = "VCC_3V3";
100d747e7f7SYuntian Zhang		regulator-min-microvolt = <3300000>;
101d747e7f7SYuntian Zhang		regulator-max-microvolt = <3300000>;
102d747e7f7SYuntian Zhang		vin-supply = <&vddao_3v3>;
103d747e7f7SYuntian Zhang		regulator-always-on;
104d747e7f7SYuntian Zhang		/* FIXME: actually controlled by VDDCPU_B_EN */
105d747e7f7SYuntian Zhang	};
106d747e7f7SYuntian Zhang
107d747e7f7SYuntian Zhang	vddao_1v8: regulator-vddao-1v8 {
108d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
109d747e7f7SYuntian Zhang		regulator-name = "VDDIO_AO1V8";
110d747e7f7SYuntian Zhang		regulator-min-microvolt = <1800000>;
111d747e7f7SYuntian Zhang		regulator-max-microvolt = <1800000>;
112d747e7f7SYuntian Zhang		vin-supply = <&vddao_3v3>;
113d747e7f7SYuntian Zhang		regulator-always-on;
114d747e7f7SYuntian Zhang	};
115d747e7f7SYuntian Zhang
116d747e7f7SYuntian Zhang	vddao_3v3: regulator-vddao-3v3 {
117d747e7f7SYuntian Zhang		compatible = "regulator-fixed";
118d747e7f7SYuntian Zhang		regulator-name = "VDDAO_3V3";
119d747e7f7SYuntian Zhang		regulator-min-microvolt = <3300000>;
120d747e7f7SYuntian Zhang		regulator-max-microvolt = <3300000>;
121d747e7f7SYuntian Zhang		vin-supply = <&ao_5v>;
122d747e7f7SYuntian Zhang		regulator-always-on;
123d747e7f7SYuntian Zhang	};
124d747e7f7SYuntian Zhang
125d747e7f7SYuntian Zhang	vddcpu_a: regulator-vddcpu-a {
126d747e7f7SYuntian Zhang		/*
127d747e7f7SYuntian Zhang		 * MP8756GD Regulator.
128d747e7f7SYuntian Zhang		 */
129d747e7f7SYuntian Zhang		compatible = "pwm-regulator";
130d747e7f7SYuntian Zhang
131d747e7f7SYuntian Zhang		regulator-name = "VDDCPU_A";
132d747e7f7SYuntian Zhang		regulator-min-microvolt = <730000>;
133d747e7f7SYuntian Zhang		regulator-max-microvolt = <1022000>;
134d747e7f7SYuntian Zhang
135d747e7f7SYuntian Zhang		pwm-supply = <&ao_5v>;
136d747e7f7SYuntian Zhang
137d747e7f7SYuntian Zhang		pwms = <&pwm_ab 0 1250 0>;
138d747e7f7SYuntian Zhang		pwm-dutycycle-range = <100 0>;
139d747e7f7SYuntian Zhang
140d747e7f7SYuntian Zhang		regulator-boot-on;
141d747e7f7SYuntian Zhang		regulator-always-on;
142d747e7f7SYuntian Zhang	};
143d747e7f7SYuntian Zhang
144d747e7f7SYuntian Zhang	vddcpu_b: regulator-vddcpu-b {
145d747e7f7SYuntian Zhang		/*
146d747e7f7SYuntian Zhang		 * Silergy SY8120B1ABC Regulator.
147d747e7f7SYuntian Zhang		 */
148d747e7f7SYuntian Zhang		compatible = "pwm-regulator";
149d747e7f7SYuntian Zhang
150d747e7f7SYuntian Zhang		regulator-name = "VDDCPU_B";
151d747e7f7SYuntian Zhang		regulator-min-microvolt = <730000>;
152d747e7f7SYuntian Zhang		regulator-max-microvolt = <1022000>;
153d747e7f7SYuntian Zhang
154d747e7f7SYuntian Zhang		pwm-supply = <&ao_5v>;
155d747e7f7SYuntian Zhang
156d747e7f7SYuntian Zhang		pwms = <&pwm_AO_cd 1 1250 0>;
157d747e7f7SYuntian Zhang		pwm-dutycycle-range = <100 0>;
158d747e7f7SYuntian Zhang
159d747e7f7SYuntian Zhang		regulator-boot-on;
160d747e7f7SYuntian Zhang		regulator-always-on;
161d747e7f7SYuntian Zhang	};
162d747e7f7SYuntian Zhang
163d747e7f7SYuntian Zhang	sound {
164d747e7f7SYuntian Zhang		compatible = "amlogic,axg-sound-card";
165d747e7f7SYuntian Zhang		model = "RADXA-ZERO2";
166d747e7f7SYuntian Zhang		audio-aux-devs = <&tdmout_b>;
167d747e7f7SYuntian Zhang		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
168d747e7f7SYuntian Zhang				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
169d747e7f7SYuntian Zhang				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
170d747e7f7SYuntian Zhang				"TDM_B Playback", "TDMOUT_B OUT";
171d747e7f7SYuntian Zhang
172d747e7f7SYuntian Zhang		assigned-clocks = <&clkc CLKID_MPLL2>,
173d747e7f7SYuntian Zhang				  <&clkc CLKID_MPLL0>,
174d747e7f7SYuntian Zhang				  <&clkc CLKID_MPLL1>;
175d747e7f7SYuntian Zhang		assigned-clock-parents = <0>, <0>, <0>;
176d747e7f7SYuntian Zhang		assigned-clock-rates = <294912000>,
177d747e7f7SYuntian Zhang				       <270950400>,
178d747e7f7SYuntian Zhang				       <393216000>;
179d747e7f7SYuntian Zhang
180d747e7f7SYuntian Zhang		dai-link-0 {
181d747e7f7SYuntian Zhang			sound-dai = <&frddr_a>;
182d747e7f7SYuntian Zhang		};
183d747e7f7SYuntian Zhang
184d747e7f7SYuntian Zhang		dai-link-1 {
185d747e7f7SYuntian Zhang			sound-dai = <&frddr_b>;
186d747e7f7SYuntian Zhang		};
187d747e7f7SYuntian Zhang
188d747e7f7SYuntian Zhang		dai-link-2 {
189d747e7f7SYuntian Zhang			sound-dai = <&frddr_c>;
190d747e7f7SYuntian Zhang		};
191d747e7f7SYuntian Zhang
192d747e7f7SYuntian Zhang		/* 8ch hdmi interface */
193d747e7f7SYuntian Zhang		dai-link-3 {
194d747e7f7SYuntian Zhang			sound-dai = <&tdmif_b>;
195d747e7f7SYuntian Zhang			dai-format = "i2s";
196d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-0 = <1 1>;
197d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-1 = <1 1>;
198d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-2 = <1 1>;
199d747e7f7SYuntian Zhang			dai-tdm-slot-tx-mask-3 = <1 1>;
200d747e7f7SYuntian Zhang			mclk-fs = <256>;
201d747e7f7SYuntian Zhang
202d747e7f7SYuntian Zhang			codec {
203d747e7f7SYuntian Zhang				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
204d747e7f7SYuntian Zhang			};
205d747e7f7SYuntian Zhang		};
206d747e7f7SYuntian Zhang
207d747e7f7SYuntian Zhang		/* hdmi glue */
208d747e7f7SYuntian Zhang		dai-link-4 {
209d747e7f7SYuntian Zhang			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
210d747e7f7SYuntian Zhang
211d747e7f7SYuntian Zhang			codec {
212d747e7f7SYuntian Zhang				sound-dai = <&hdmi_tx>;
213d747e7f7SYuntian Zhang			};
214d747e7f7SYuntian Zhang		};
215d747e7f7SYuntian Zhang	};
216d747e7f7SYuntian Zhang
217d747e7f7SYuntian Zhang	wifi32k: clock-0 {
218d747e7f7SYuntian Zhang		compatible = "pwm-clock";
219d747e7f7SYuntian Zhang		#clock-cells = <0>;
220d747e7f7SYuntian Zhang		clock-frequency = <32768>;
221d747e7f7SYuntian Zhang		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
222d747e7f7SYuntian Zhang	};
223d747e7f7SYuntian Zhang};
224d747e7f7SYuntian Zhang
225d747e7f7SYuntian Zhang&arb {
226d747e7f7SYuntian Zhang	status = "okay";
227d747e7f7SYuntian Zhang};
228d747e7f7SYuntian Zhang
229d747e7f7SYuntian Zhang&cec_AO {
230d747e7f7SYuntian Zhang	pinctrl-0 = <&cec_ao_a_h_pins>;
231d747e7f7SYuntian Zhang	pinctrl-names = "default";
232d747e7f7SYuntian Zhang	status = "disabled";
233d747e7f7SYuntian Zhang	hdmi-phandle = <&hdmi_tx>;
234d747e7f7SYuntian Zhang};
235d747e7f7SYuntian Zhang
236d747e7f7SYuntian Zhang&cecb_AO {
237d747e7f7SYuntian Zhang	pinctrl-0 = <&cec_ao_b_h_pins>;
238d747e7f7SYuntian Zhang	pinctrl-names = "default";
239d747e7f7SYuntian Zhang	status = "okay";
240d747e7f7SYuntian Zhang	hdmi-phandle = <&hdmi_tx>;
241d747e7f7SYuntian Zhang};
242d747e7f7SYuntian Zhang
243d747e7f7SYuntian Zhang&clkc_audio {
244d747e7f7SYuntian Zhang	status = "okay";
245d747e7f7SYuntian Zhang};
246d747e7f7SYuntian Zhang
247d747e7f7SYuntian Zhang&cpu0 {
248d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_b>;
249d747e7f7SYuntian Zhang	operating-points-v2 = <&cpu_opp_table_0>;
250d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPU_CLK>;
251d747e7f7SYuntian Zhang	clock-latency = <50000>;
252d747e7f7SYuntian Zhang};
253d747e7f7SYuntian Zhang
254d747e7f7SYuntian Zhang&cpu1 {
255d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_b>;
256d747e7f7SYuntian Zhang	operating-points-v2 = <&cpu_opp_table_0>;
257d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPU_CLK>;
258d747e7f7SYuntian Zhang	clock-latency = <50000>;
259d747e7f7SYuntian Zhang};
260d747e7f7SYuntian Zhang
261d747e7f7SYuntian Zhang&cpu100 {
262d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
263d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
264d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
265d747e7f7SYuntian Zhang	clock-latency = <50000>;
266d747e7f7SYuntian Zhang};
267d747e7f7SYuntian Zhang
268d747e7f7SYuntian Zhang&cpu101 {
269d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
270d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
271d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
272d747e7f7SYuntian Zhang	clock-latency = <50000>;
273d747e7f7SYuntian Zhang};
274d747e7f7SYuntian Zhang
275d747e7f7SYuntian Zhang&cpu102 {
276d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
277d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
278d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
279d747e7f7SYuntian Zhang	clock-latency = <50000>;
280d747e7f7SYuntian Zhang};
281d747e7f7SYuntian Zhang
282d747e7f7SYuntian Zhang&cpu103 {
283d747e7f7SYuntian Zhang	cpu-supply = <&vddcpu_a>;
284d747e7f7SYuntian Zhang	operating-points-v2 = <&cpub_opp_table_1>;
285d747e7f7SYuntian Zhang	clocks = <&clkc CLKID_CPUB_CLK>;
286d747e7f7SYuntian Zhang	clock-latency = <50000>;
287d747e7f7SYuntian Zhang};
288d747e7f7SYuntian Zhang
289d747e7f7SYuntian Zhang&frddr_a {
290d747e7f7SYuntian Zhang	status = "okay";
291d747e7f7SYuntian Zhang};
292d747e7f7SYuntian Zhang
293d747e7f7SYuntian Zhang&frddr_b {
294d747e7f7SYuntian Zhang	status = "okay";
295d747e7f7SYuntian Zhang};
296d747e7f7SYuntian Zhang
297d747e7f7SYuntian Zhang&frddr_c {
298d747e7f7SYuntian Zhang	status = "okay";
299d747e7f7SYuntian Zhang};
300d747e7f7SYuntian Zhang
301d747e7f7SYuntian Zhang&gpio {
302d747e7f7SYuntian Zhang	gpio-line-names =
303d747e7f7SYuntian Zhang		/* GPIOZ */
304d747e7f7SYuntian Zhang		"PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
305d747e7f7SYuntian Zhang		"", "", "", "", "", "", "", "",
306d747e7f7SYuntian Zhang		/* GPIOH */
307d747e7f7SYuntian Zhang		"", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
308d747e7f7SYuntian Zhang		"",
309d747e7f7SYuntian Zhang		/* BOOT */
310d747e7f7SYuntian Zhang		"", "", "", "", "", "", "", "",
311d747e7f7SYuntian Zhang		"", "", "", "", "EMMC_PWRSEQ", "", "", "",
312d747e7f7SYuntian Zhang		/* GPIOC */
313d747e7f7SYuntian Zhang		"", "", "", "", "", "", "SD_CD", "PIN_36",
314d747e7f7SYuntian Zhang		/* GPIOA */
315d747e7f7SYuntian Zhang		"PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
316d747e7f7SYuntian Zhang		"", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
317d747e7f7SYuntian Zhang		/* GPIOX */
318d747e7f7SYuntian Zhang		"", "", "", "", "", "", "SDIO_PWRSEQ", "",
319d747e7f7SYuntian Zhang		"", "", "", "", "", "", "", "",
320d747e7f7SYuntian Zhang		"", "BT_SHUTDOWN", "", "";
321d747e7f7SYuntian Zhang};
322d747e7f7SYuntian Zhang
323d747e7f7SYuntian Zhang&gpio_ao {
324d747e7f7SYuntian Zhang	gpio-line-names =
325d747e7f7SYuntian Zhang		/* GPIOAO */
326d747e7f7SYuntian Zhang		"PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
327d747e7f7SYuntian Zhang		"PIN_33", "PIN_37", "FAN", "",
328d747e7f7SYuntian Zhang		/* GPIOE */
329d747e7f7SYuntian Zhang		"", "", "";
330d747e7f7SYuntian Zhang};
331d747e7f7SYuntian Zhang
332d747e7f7SYuntian Zhang&hdmi_tx {
333d747e7f7SYuntian Zhang	status = "okay";
334d747e7f7SYuntian Zhang	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
335d747e7f7SYuntian Zhang	pinctrl-names = "default";
336d747e7f7SYuntian Zhang	hdmi-supply = <&ao_5v>;
337d747e7f7SYuntian Zhang};
338d747e7f7SYuntian Zhang
339d747e7f7SYuntian Zhang&hdmi_tx_tmds_port {
340d747e7f7SYuntian Zhang	hdmi_tx_tmds_out: endpoint {
341d747e7f7SYuntian Zhang		remote-endpoint = <&hdmi_connector_in>;
342d747e7f7SYuntian Zhang	};
343d747e7f7SYuntian Zhang};
344d747e7f7SYuntian Zhang
345d747e7f7SYuntian Zhang&ir {
346d747e7f7SYuntian Zhang	status = "disabled";
347d747e7f7SYuntian Zhang	pinctrl-0 = <&remote_input_ao_pins>;
348d747e7f7SYuntian Zhang	pinctrl-names = "default";
349d747e7f7SYuntian Zhang};
350d747e7f7SYuntian Zhang
351d747e7f7SYuntian Zhang&pwm_ab {
352d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_a_e_pins>;
353d747e7f7SYuntian Zhang	pinctrl-names = "default";
354d747e7f7SYuntian Zhang	clocks = <&xtal>;
355d747e7f7SYuntian Zhang	clock-names = "clkin0";
356d747e7f7SYuntian Zhang	status = "okay";
357d747e7f7SYuntian Zhang};
358d747e7f7SYuntian Zhang
359d747e7f7SYuntian Zhang&pwm_ef {
360d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_e_pins>;
361d747e7f7SYuntian Zhang	pinctrl-names = "default";
362d747e7f7SYuntian Zhang	clocks = <&xtal>;
363*db217e84SNeil Armstrong	clock-names = "clkin0";
364d747e7f7SYuntian Zhang	status = "okay";
365d747e7f7SYuntian Zhang};
366d747e7f7SYuntian Zhang
367d747e7f7SYuntian Zhang&pwm_AO_ab {
368d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_ao_a_pins>;
369d747e7f7SYuntian Zhang	pinctrl-names = "default";
370d747e7f7SYuntian Zhang	clocks = <&xtal>;
371*db217e84SNeil Armstrong	clock-names = "clkin0";
372d747e7f7SYuntian Zhang	status = "okay";
373d747e7f7SYuntian Zhang};
374d747e7f7SYuntian Zhang
375d747e7f7SYuntian Zhang&pwm_AO_cd {
376d747e7f7SYuntian Zhang	pinctrl-0 = <&pwm_ao_d_e_pins>;
377d747e7f7SYuntian Zhang	pinctrl-names = "default";
378d747e7f7SYuntian Zhang	clocks = <&xtal>;
379*db217e84SNeil Armstrong	clock-names = "clkin1";
380d747e7f7SYuntian Zhang	status = "okay";
381d747e7f7SYuntian Zhang};
382d747e7f7SYuntian Zhang
383d747e7f7SYuntian Zhang&saradc {
384d747e7f7SYuntian Zhang	status = "okay";
385d747e7f7SYuntian Zhang	vref-supply = <&vddao_1v8>;
386d747e7f7SYuntian Zhang};
387d747e7f7SYuntian Zhang
388d747e7f7SYuntian Zhang/* SDIO */
389d747e7f7SYuntian Zhang&sd_emmc_a {
390d747e7f7SYuntian Zhang	status = "okay";
391d747e7f7SYuntian Zhang	pinctrl-0 = <&sdio_pins>;
392d747e7f7SYuntian Zhang	pinctrl-1 = <&sdio_clk_gate_pins>;
393d747e7f7SYuntian Zhang	pinctrl-names = "default", "clk-gate";
394d747e7f7SYuntian Zhang	#address-cells = <1>;
395d747e7f7SYuntian Zhang	#size-cells = <0>;
396d747e7f7SYuntian Zhang
397d747e7f7SYuntian Zhang	bus-width = <4>;
398d747e7f7SYuntian Zhang	cap-sd-highspeed;
399d747e7f7SYuntian Zhang	max-frequency = <100000000>;
400d747e7f7SYuntian Zhang
401d747e7f7SYuntian Zhang	non-removable;
402d747e7f7SYuntian Zhang	disable-wp;
403d747e7f7SYuntian Zhang
404d747e7f7SYuntian Zhang	/* WiFi firmware requires power to be kept while in suspend */
405d747e7f7SYuntian Zhang	keep-power-in-suspend;
406d747e7f7SYuntian Zhang
407d747e7f7SYuntian Zhang	mmc-pwrseq = <&sdio_pwrseq>;
408d747e7f7SYuntian Zhang
409d747e7f7SYuntian Zhang	vmmc-supply = <&vddao_3v3>;
410d747e7f7SYuntian Zhang	vqmmc-supply = <&vddao_1v8>;
411d747e7f7SYuntian Zhang
412d747e7f7SYuntian Zhang	brcmf: wifi@1 {
413d747e7f7SYuntian Zhang		reg = <1>;
414d747e7f7SYuntian Zhang		compatible = "brcm,bcm4329-fmac";
415d747e7f7SYuntian Zhang	};
416d747e7f7SYuntian Zhang};
417d747e7f7SYuntian Zhang
418d747e7f7SYuntian Zhang/* SD card */
419d747e7f7SYuntian Zhang&sd_emmc_b {
420d747e7f7SYuntian Zhang	status = "okay";
421d747e7f7SYuntian Zhang	pinctrl-0 = <&sdcard_c_pins>;
422d747e7f7SYuntian Zhang	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
423d747e7f7SYuntian Zhang	pinctrl-names = "default", "clk-gate";
424d747e7f7SYuntian Zhang
425d747e7f7SYuntian Zhang	bus-width = <4>;
426d747e7f7SYuntian Zhang	cap-sd-highspeed;
427d747e7f7SYuntian Zhang	max-frequency = <50000000>;
428d747e7f7SYuntian Zhang	disable-wp;
429d747e7f7SYuntian Zhang
430d747e7f7SYuntian Zhang	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
431d747e7f7SYuntian Zhang	vmmc-supply = <&vddao_3v3>;
432d747e7f7SYuntian Zhang	vqmmc-supply = <&vddao_3v3>;
433d747e7f7SYuntian Zhang};
434d747e7f7SYuntian Zhang
435d747e7f7SYuntian Zhang/* eMMC */
436d747e7f7SYuntian Zhang&sd_emmc_c {
437d747e7f7SYuntian Zhang	status = "okay";
438d747e7f7SYuntian Zhang	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
439d747e7f7SYuntian Zhang	pinctrl-1 = <&emmc_clk_gate_pins>;
440d747e7f7SYuntian Zhang	pinctrl-names = "default", "clk-gate";
441d747e7f7SYuntian Zhang
442d747e7f7SYuntian Zhang	bus-width = <8>;
443d747e7f7SYuntian Zhang	cap-mmc-highspeed;
444d747e7f7SYuntian Zhang	mmc-ddr-1_8v;
445d747e7f7SYuntian Zhang	mmc-hs200-1_8v;
446d747e7f7SYuntian Zhang	max-frequency = <200000000>;
447d747e7f7SYuntian Zhang	disable-wp;
448d747e7f7SYuntian Zhang
449d747e7f7SYuntian Zhang	mmc-pwrseq = <&emmc_pwrseq>;
450d747e7f7SYuntian Zhang	vmmc-supply = <&vcc_3v3>;
451d747e7f7SYuntian Zhang	vqmmc-supply = <&vcc_1v8>;
452d747e7f7SYuntian Zhang};
453d747e7f7SYuntian Zhang
454d747e7f7SYuntian Zhang&tdmif_b {
455d747e7f7SYuntian Zhang	status = "okay";
456d747e7f7SYuntian Zhang};
457d747e7f7SYuntian Zhang
458d747e7f7SYuntian Zhang&tdmout_b {
459d747e7f7SYuntian Zhang	status = "okay";
460d747e7f7SYuntian Zhang};
461d747e7f7SYuntian Zhang
462d747e7f7SYuntian Zhang&tohdmitx {
463d747e7f7SYuntian Zhang	status = "okay";
464d747e7f7SYuntian Zhang};
465d747e7f7SYuntian Zhang
466d747e7f7SYuntian Zhang&uart_A {
467d747e7f7SYuntian Zhang	status = "okay";
468d747e7f7SYuntian Zhang	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
469d747e7f7SYuntian Zhang	pinctrl-names = "default";
470d747e7f7SYuntian Zhang	uart-has-rtscts;
471d747e7f7SYuntian Zhang
472d747e7f7SYuntian Zhang	bluetooth {
473d747e7f7SYuntian Zhang		compatible = "brcm,bcm43438-bt";
474d747e7f7SYuntian Zhang		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
475d747e7f7SYuntian Zhang		max-speed = <2000000>;
476d747e7f7SYuntian Zhang		clocks = <&wifi32k>;
477d747e7f7SYuntian Zhang		clock-names = "lpo";
478d747e7f7SYuntian Zhang	};
479d747e7f7SYuntian Zhang};
480d747e7f7SYuntian Zhang
481d747e7f7SYuntian Zhang&uart_AO {
482d747e7f7SYuntian Zhang	status = "okay";
483d747e7f7SYuntian Zhang	pinctrl-0 = <&uart_ao_a_pins>;
484d747e7f7SYuntian Zhang	pinctrl-names = "default";
485d747e7f7SYuntian Zhang};
486d747e7f7SYuntian Zhang
487d747e7f7SYuntian Zhang&usb {
488d747e7f7SYuntian Zhang	status = "okay";
489d747e7f7SYuntian Zhang};
490