19c8c52f7SJianxin Pan// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 29c8c52f7SJianxin Pan/* 39c8c52f7SJianxin Pan * Copyright (c) 2018 Amlogic, Inc. All rights reserved. 49c8c52f7SJianxin Pan */ 59c8c52f7SJianxin Pan 69baf7d6bSNeil Armstrong#include <dt-bindings/phy/phy.h> 79c8c52f7SJianxin Pan#include <dt-bindings/gpio/gpio.h> 85dc0f28fSJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h> 9965c827aSJerome Brunet#include <dt-bindings/clock/g12a-clkc.h> 10820873cfSNeil Armstrong#include <dt-bindings/clock/g12a-aoclkc.h> 119c8c52f7SJianxin Pan#include <dt-bindings/interrupt-controller/irq.h> 129c8c52f7SJianxin Pan#include <dt-bindings/interrupt-controller/arm-gic.h> 13c59b7fe5SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 149baf7d6bSNeil Armstrong#include <dt-bindings/reset/amlogic,meson-g12a-reset.h> 159c8c52f7SJianxin Pan 169c8c52f7SJianxin Pan/ { 179c8c52f7SJianxin Pan compatible = "amlogic,g12a"; 189c8c52f7SJianxin Pan 199c8c52f7SJianxin Pan interrupt-parent = <&gic>; 209c8c52f7SJianxin Pan #address-cells = <2>; 219c8c52f7SJianxin Pan #size-cells = <2>; 229c8c52f7SJianxin Pan 231ff38c86SJerome Brunet tdmif_a: audio-controller-0 { 241ff38c86SJerome Brunet compatible = "amlogic,axg-tdm-iface"; 251ff38c86SJerome Brunet #sound-dai-cells = <0>; 261ff38c86SJerome Brunet sound-name-prefix = "TDM_A"; 271ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, 281ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_MST_A_SCLK>, 291ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_MST_A_LRCLK>; 301ff38c86SJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 311ff38c86SJerome Brunet status = "disabled"; 321ff38c86SJerome Brunet }; 331ff38c86SJerome Brunet 341ff38c86SJerome Brunet tdmif_b: audio-controller-1 { 351ff38c86SJerome Brunet compatible = "amlogic,axg-tdm-iface"; 361ff38c86SJerome Brunet #sound-dai-cells = <0>; 371ff38c86SJerome Brunet sound-name-prefix = "TDM_B"; 381ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, 391ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_MST_B_SCLK>, 401ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_MST_B_LRCLK>; 411ff38c86SJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 421ff38c86SJerome Brunet status = "disabled"; 431ff38c86SJerome Brunet }; 441ff38c86SJerome Brunet 451ff38c86SJerome Brunet tdmif_c: audio-controller-2 { 461ff38c86SJerome Brunet compatible = "amlogic,axg-tdm-iface"; 471ff38c86SJerome Brunet #sound-dai-cells = <0>; 481ff38c86SJerome Brunet sound-name-prefix = "TDM_C"; 491ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, 501ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_MST_C_SCLK>, 511ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_MST_C_LRCLK>; 521ff38c86SJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 531ff38c86SJerome Brunet status = "disabled"; 541ff38c86SJerome Brunet }; 551ff38c86SJerome Brunet 569c8c52f7SJianxin Pan cpus { 579c8c52f7SJianxin Pan #address-cells = <0x2>; 589c8c52f7SJianxin Pan #size-cells = <0x0>; 599c8c52f7SJianxin Pan 609c8c52f7SJianxin Pan cpu0: cpu@0 { 619c8c52f7SJianxin Pan device_type = "cpu"; 6231af04cdSRob Herring compatible = "arm,cortex-a53"; 639c8c52f7SJianxin Pan reg = <0x0 0x0>; 649c8c52f7SJianxin Pan enable-method = "psci"; 659c8c52f7SJianxin Pan next-level-cache = <&l2>; 669c8c52f7SJianxin Pan }; 679c8c52f7SJianxin Pan 689c8c52f7SJianxin Pan cpu1: cpu@1 { 699c8c52f7SJianxin Pan device_type = "cpu"; 7031af04cdSRob Herring compatible = "arm,cortex-a53"; 719c8c52f7SJianxin Pan reg = <0x0 0x1>; 729c8c52f7SJianxin Pan enable-method = "psci"; 739c8c52f7SJianxin Pan next-level-cache = <&l2>; 749c8c52f7SJianxin Pan }; 759c8c52f7SJianxin Pan 769c8c52f7SJianxin Pan cpu2: cpu@2 { 779c8c52f7SJianxin Pan device_type = "cpu"; 7831af04cdSRob Herring compatible = "arm,cortex-a53"; 799c8c52f7SJianxin Pan reg = <0x0 0x2>; 809c8c52f7SJianxin Pan enable-method = "psci"; 819c8c52f7SJianxin Pan next-level-cache = <&l2>; 829c8c52f7SJianxin Pan }; 839c8c52f7SJianxin Pan 849c8c52f7SJianxin Pan cpu3: cpu@3 { 859c8c52f7SJianxin Pan device_type = "cpu"; 8631af04cdSRob Herring compatible = "arm,cortex-a53"; 879c8c52f7SJianxin Pan reg = <0x0 0x3>; 889c8c52f7SJianxin Pan enable-method = "psci"; 899c8c52f7SJianxin Pan next-level-cache = <&l2>; 909c8c52f7SJianxin Pan }; 919c8c52f7SJianxin Pan 929c8c52f7SJianxin Pan l2: l2-cache0 { 939c8c52f7SJianxin Pan compatible = "cache"; 949c8c52f7SJianxin Pan }; 959c8c52f7SJianxin Pan }; 969c8c52f7SJianxin Pan 97965c827aSJerome Brunet efuse: efuse { 98965c827aSJerome Brunet compatible = "amlogic,meson-gxbb-efuse"; 99965c827aSJerome Brunet clocks = <&clkc CLKID_EFUSE>; 100965c827aSJerome Brunet #address-cells = <1>; 101965c827aSJerome Brunet #size-cells = <1>; 102965c827aSJerome Brunet read-only; 103965c827aSJerome Brunet }; 104965c827aSJerome Brunet 1059c8c52f7SJianxin Pan psci { 1069c8c52f7SJianxin Pan compatible = "arm,psci-1.0"; 1079c8c52f7SJianxin Pan method = "smc"; 1089c8c52f7SJianxin Pan }; 1099c8c52f7SJianxin Pan 1109c8c52f7SJianxin Pan reserved-memory { 1119c8c52f7SJianxin Pan #address-cells = <2>; 1129c8c52f7SJianxin Pan #size-cells = <2>; 1139c8c52f7SJianxin Pan ranges; 1149c8c52f7SJianxin Pan 1159c8c52f7SJianxin Pan /* 3 MiB reserved for ARM Trusted Firmware (BL31) */ 1169c8c52f7SJianxin Pan secmon_reserved: secmon@5000000 { 1179c8c52f7SJianxin Pan reg = <0x0 0x05000000 0x0 0x300000>; 1189c8c52f7SJianxin Pan no-map; 1199c8c52f7SJianxin Pan }; 120e2cffeb3SNeil Armstrong 121e2cffeb3SNeil Armstrong linux,cma { 122e2cffeb3SNeil Armstrong compatible = "shared-dma-pool"; 123e2cffeb3SNeil Armstrong reusable; 124e2cffeb3SNeil Armstrong size = <0x0 0x10000000>; 125e2cffeb3SNeil Armstrong alignment = <0x0 0x400000>; 126e2cffeb3SNeil Armstrong linux,cma-default; 127e2cffeb3SNeil Armstrong }; 1289c8c52f7SJianxin Pan }; 1299c8c52f7SJianxin Pan 130bd395152SJerome Brunet sm: secure-monitor { 131bd395152SJerome Brunet compatible = "amlogic,meson-gxbb-sm"; 132bd395152SJerome Brunet }; 133bd395152SJerome Brunet 1349c8c52f7SJianxin Pan soc { 1359c8c52f7SJianxin Pan compatible = "simple-bus"; 1369c8c52f7SJianxin Pan #address-cells = <2>; 1379c8c52f7SJianxin Pan #size-cells = <2>; 1389c8c52f7SJianxin Pan ranges; 1399c8c52f7SJianxin Pan 140503f5fedSJerome Brunet apb: bus@ff600000 { 1419c8c52f7SJianxin Pan compatible = "simple-bus"; 142503f5fedSJerome Brunet reg = <0x0 0xff600000 0x0 0x200000>; 1439c8c52f7SJianxin Pan #address-cells = <2>; 1449c8c52f7SJianxin Pan #size-cells = <2>; 145503f5fedSJerome Brunet ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>; 146503f5fedSJerome Brunet 147083feecdSNeil Armstrong hdmi_tx: hdmi-tx@0 { 148083feecdSNeil Armstrong compatible = "amlogic,meson-g12a-dw-hdmi"; 149083feecdSNeil Armstrong reg = <0x0 0x0 0x0 0x10000>; 150083feecdSNeil Armstrong interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; 151083feecdSNeil Armstrong resets = <&reset RESET_HDMITX_CAPB3>, 152083feecdSNeil Armstrong <&reset RESET_HDMITX_PHY>, 153083feecdSNeil Armstrong <&reset RESET_HDMITX>; 154083feecdSNeil Armstrong reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; 155083feecdSNeil Armstrong clocks = <&clkc CLKID_HDMI>, 156083feecdSNeil Armstrong <&clkc CLKID_HTX_PCLK>, 157083feecdSNeil Armstrong <&clkc CLKID_VPU_INTR>; 158083feecdSNeil Armstrong clock-names = "isfr", "iahb", "venci"; 159083feecdSNeil Armstrong #address-cells = <1>; 160083feecdSNeil Armstrong #size-cells = <0>; 161083feecdSNeil Armstrong status = "disabled"; 162083feecdSNeil Armstrong 163083feecdSNeil Armstrong /* VPU VENC Input */ 164083feecdSNeil Armstrong hdmi_tx_venc_port: port@0 { 165083feecdSNeil Armstrong reg = <0>; 166083feecdSNeil Armstrong 167083feecdSNeil Armstrong hdmi_tx_in: endpoint { 168083feecdSNeil Armstrong remote-endpoint = <&hdmi_tx_out>; 169083feecdSNeil Armstrong }; 170083feecdSNeil Armstrong }; 171083feecdSNeil Armstrong 172083feecdSNeil Armstrong /* TMDS Output */ 173083feecdSNeil Armstrong hdmi_tx_tmds_port: port@1 { 174083feecdSNeil Armstrong reg = <1>; 175083feecdSNeil Armstrong }; 176083feecdSNeil Armstrong }; 177083feecdSNeil Armstrong 178503f5fedSJerome Brunet periphs: bus@34400 { 179503f5fedSJerome Brunet compatible = "simple-bus"; 180503f5fedSJerome Brunet reg = <0x0 0x34400 0x0 0x400>; 181503f5fedSJerome Brunet #address-cells = <2>; 182503f5fedSJerome Brunet #size-cells = <2>; 183503f5fedSJerome Brunet ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>; 18411a7bea1SJerome Brunet 18511a7bea1SJerome Brunet periphs_pinctrl: pinctrl@40 { 18611a7bea1SJerome Brunet compatible = "amlogic,meson-g12a-periphs-pinctrl"; 18711a7bea1SJerome Brunet #address-cells = <2>; 18811a7bea1SJerome Brunet #size-cells = <2>; 18911a7bea1SJerome Brunet ranges; 19011a7bea1SJerome Brunet 19111a7bea1SJerome Brunet gpio: bank@40 { 19211a7bea1SJerome Brunet reg = <0x0 0x40 0x0 0x4c>, 19311a7bea1SJerome Brunet <0x0 0xe8 0x0 0x18>, 19411a7bea1SJerome Brunet <0x0 0x120 0x0 0x18>, 19511a7bea1SJerome Brunet <0x0 0x2c0 0x0 0x40>, 19611a7bea1SJerome Brunet <0x0 0x340 0x0 0x1c>; 19711a7bea1SJerome Brunet reg-names = "gpio", 19811a7bea1SJerome Brunet "pull", 19911a7bea1SJerome Brunet "pull-enable", 20011a7bea1SJerome Brunet "mux", 20111a7bea1SJerome Brunet "ds"; 20211a7bea1SJerome Brunet gpio-controller; 20311a7bea1SJerome Brunet #gpio-cells = <2>; 20411a7bea1SJerome Brunet gpio-ranges = <&periphs_pinctrl 0 0 86>; 20511a7bea1SJerome Brunet }; 206ff4f8b6cSNeil Armstrong 20791516e54SNeil Armstrong cec_ao_a_h_pins: cec_ao_a_h { 20891516e54SNeil Armstrong mux { 20991516e54SNeil Armstrong groups = "cec_ao_a_h"; 21091516e54SNeil Armstrong function = "cec_ao_a_h"; 21191516e54SNeil Armstrong bias-disable; 21291516e54SNeil Armstrong }; 21391516e54SNeil Armstrong }; 21491516e54SNeil Armstrong 21591516e54SNeil Armstrong cec_ao_b_h_pins: cec_ao_b_h { 21691516e54SNeil Armstrong mux { 21791516e54SNeil Armstrong groups = "cec_ao_b_h"; 21891516e54SNeil Armstrong function = "cec_ao_b_h"; 21991516e54SNeil Armstrong bias-disable; 22091516e54SNeil Armstrong }; 22191516e54SNeil Armstrong }; 22291516e54SNeil Armstrong 2234759fd87SJerome Brunet emmc_pins: emmc { 2244759fd87SJerome Brunet mux-0 { 2254759fd87SJerome Brunet groups = "emmc_nand_d0", 2264759fd87SJerome Brunet "emmc_nand_d1", 2274759fd87SJerome Brunet "emmc_nand_d2", 2284759fd87SJerome Brunet "emmc_nand_d3", 2294759fd87SJerome Brunet "emmc_nand_d4", 2304759fd87SJerome Brunet "emmc_nand_d5", 2314759fd87SJerome Brunet "emmc_nand_d6", 2324759fd87SJerome Brunet "emmc_nand_d7", 2334759fd87SJerome Brunet "emmc_cmd"; 2344759fd87SJerome Brunet function = "emmc"; 2354759fd87SJerome Brunet bias-pull-up; 2364759fd87SJerome Brunet drive-strength-microamp = <4000>; 2374759fd87SJerome Brunet }; 2384759fd87SJerome Brunet 2394759fd87SJerome Brunet mux-1 { 2404759fd87SJerome Brunet groups = "emmc_clk"; 2414759fd87SJerome Brunet function = "emmc"; 2424759fd87SJerome Brunet bias-disable; 2434759fd87SJerome Brunet drive-strength-microamp = <4000>; 2444759fd87SJerome Brunet }; 2454759fd87SJerome Brunet }; 2464759fd87SJerome Brunet 2474759fd87SJerome Brunet emmc_ds_pins: emmc-ds { 2484759fd87SJerome Brunet mux { 2494759fd87SJerome Brunet groups = "emmc_nand_ds"; 2504759fd87SJerome Brunet function = "emmc"; 2514759fd87SJerome Brunet bias-pull-down; 2524759fd87SJerome Brunet drive-strength-microamp = <4000>; 2534759fd87SJerome Brunet }; 2544759fd87SJerome Brunet }; 2554759fd87SJerome Brunet 2564759fd87SJerome Brunet emmc_clk_gate_pins: emmc_clk_gate { 2574759fd87SJerome Brunet mux { 2584759fd87SJerome Brunet groups = "BOOT_8"; 2594759fd87SJerome Brunet function = "gpio_periphs"; 2604759fd87SJerome Brunet bias-pull-down; 2614759fd87SJerome Brunet drive-strength-microamp = <4000>; 2624759fd87SJerome Brunet }; 2634759fd87SJerome Brunet }; 2644759fd87SJerome Brunet 265083feecdSNeil Armstrong hdmitx_ddc_pins: hdmitx_ddc { 266083feecdSNeil Armstrong mux { 267083feecdSNeil Armstrong groups = "hdmitx_sda", 268083feecdSNeil Armstrong "hdmitx_sck"; 269083feecdSNeil Armstrong function = "hdmitx"; 270083feecdSNeil Armstrong bias-disable; 271083feecdSNeil Armstrong }; 272083feecdSNeil Armstrong }; 273083feecdSNeil Armstrong 274083feecdSNeil Armstrong hdmitx_hpd_pins: hdmitx_hpd { 275083feecdSNeil Armstrong mux { 276083feecdSNeil Armstrong groups = "hdmitx_hpd_in"; 277083feecdSNeil Armstrong function = "hdmitx"; 278083feecdSNeil Armstrong bias-disable; 279083feecdSNeil Armstrong }; 280083feecdSNeil Armstrong }; 281083feecdSNeil Armstrong 2829951aca6SGuillaume La Roque 2839951aca6SGuillaume La Roque i2c0_sda_c_pins: i2c0-sda-c { 2849951aca6SGuillaume La Roque mux { 2859951aca6SGuillaume La Roque groups = "i2c0_sda_c"; 2869951aca6SGuillaume La Roque function = "i2c0"; 2879951aca6SGuillaume La Roque bias-disable; 2889951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 2899951aca6SGuillaume La Roque 2909951aca6SGuillaume La Roque }; 2919951aca6SGuillaume La Roque }; 2929951aca6SGuillaume La Roque 2939951aca6SGuillaume La Roque i2c0_sck_c_pins: i2c0-sck-c { 2949951aca6SGuillaume La Roque mux { 2959951aca6SGuillaume La Roque groups = "i2c0_sck_c"; 2969951aca6SGuillaume La Roque function = "i2c0"; 2979951aca6SGuillaume La Roque bias-disable; 2989951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 2999951aca6SGuillaume La Roque }; 3009951aca6SGuillaume La Roque }; 3019951aca6SGuillaume La Roque 3029951aca6SGuillaume La Roque i2c0_sda_z0_pins: i2c0-sda-z0 { 3039951aca6SGuillaume La Roque mux { 3049951aca6SGuillaume La Roque groups = "i2c0_sda_z0"; 3059951aca6SGuillaume La Roque function = "i2c0"; 3069951aca6SGuillaume La Roque bias-disable; 3079951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3089951aca6SGuillaume La Roque }; 3099951aca6SGuillaume La Roque }; 3109951aca6SGuillaume La Roque 3119951aca6SGuillaume La Roque i2c0_sck_z1_pins: i2c0-sck-z1 { 3129951aca6SGuillaume La Roque mux { 3139951aca6SGuillaume La Roque groups = "i2c0_sck_z1"; 3149951aca6SGuillaume La Roque function = "i2c0"; 3159951aca6SGuillaume La Roque bias-disable; 3169951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3179951aca6SGuillaume La Roque }; 3189951aca6SGuillaume La Roque }; 3199951aca6SGuillaume La Roque 3209951aca6SGuillaume La Roque i2c0_sda_z7_pins: i2c0-sda-z7 { 3219951aca6SGuillaume La Roque mux { 3229951aca6SGuillaume La Roque groups = "i2c0_sda_z7"; 3239951aca6SGuillaume La Roque function = "i2c0"; 3249951aca6SGuillaume La Roque bias-disable; 3259951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3269951aca6SGuillaume La Roque }; 3279951aca6SGuillaume La Roque }; 3289951aca6SGuillaume La Roque 3299951aca6SGuillaume La Roque i2c0_sda_z8_pins: i2c0-sda-z8 { 3309951aca6SGuillaume La Roque mux { 3319951aca6SGuillaume La Roque groups = "i2c0_sda_z8"; 3329951aca6SGuillaume La Roque function = "i2c0"; 3339951aca6SGuillaume La Roque bias-disable; 3349951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3359951aca6SGuillaume La Roque }; 3369951aca6SGuillaume La Roque }; 3379951aca6SGuillaume La Roque 3389951aca6SGuillaume La Roque i2c1_sda_x_pins: i2c1-sda-x { 3399951aca6SGuillaume La Roque mux { 3409951aca6SGuillaume La Roque groups = "i2c1_sda_x"; 3419951aca6SGuillaume La Roque function = "i2c1"; 3429951aca6SGuillaume La Roque bias-disable; 3439951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3449951aca6SGuillaume La Roque }; 3459951aca6SGuillaume La Roque }; 3469951aca6SGuillaume La Roque 3479951aca6SGuillaume La Roque i2c1_sck_x_pins: i2c1-sck-x { 3489951aca6SGuillaume La Roque mux { 3499951aca6SGuillaume La Roque groups = "i2c1_sck_x"; 3509951aca6SGuillaume La Roque function = "i2c1"; 3519951aca6SGuillaume La Roque bias-disable; 3529951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3539951aca6SGuillaume La Roque }; 3549951aca6SGuillaume La Roque }; 3559951aca6SGuillaume La Roque 3569951aca6SGuillaume La Roque i2c1_sda_h2_pins: i2c1-sda-h2 { 3579951aca6SGuillaume La Roque mux { 3589951aca6SGuillaume La Roque groups = "i2c1_sda_h2"; 3599951aca6SGuillaume La Roque function = "i2c1"; 3609951aca6SGuillaume La Roque bias-disable; 3619951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3629951aca6SGuillaume La Roque }; 3639951aca6SGuillaume La Roque }; 3649951aca6SGuillaume La Roque 3659951aca6SGuillaume La Roque i2c1_sck_h3_pins: i2c1-sck-h3 { 3669951aca6SGuillaume La Roque mux { 3679951aca6SGuillaume La Roque groups = "i2c1_sck_h3"; 3689951aca6SGuillaume La Roque function = "i2c1"; 3699951aca6SGuillaume La Roque bias-disable; 3709951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3719951aca6SGuillaume La Roque }; 3729951aca6SGuillaume La Roque }; 3739951aca6SGuillaume La Roque 3749951aca6SGuillaume La Roque i2c1_sda_h6_pins: i2c1-sda-h6 { 3759951aca6SGuillaume La Roque mux { 3769951aca6SGuillaume La Roque groups = "i2c1_sda_h6"; 3779951aca6SGuillaume La Roque function = "i2c1"; 3789951aca6SGuillaume La Roque bias-disable; 3799951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3809951aca6SGuillaume La Roque }; 3819951aca6SGuillaume La Roque }; 3829951aca6SGuillaume La Roque 3839951aca6SGuillaume La Roque i2c1_sck_h7_pins: i2c1-sck-h7 { 3849951aca6SGuillaume La Roque mux { 3859951aca6SGuillaume La Roque groups = "i2c1_sck_h7"; 3869951aca6SGuillaume La Roque function = "i2c1"; 3879951aca6SGuillaume La Roque bias-disable; 3889951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3899951aca6SGuillaume La Roque }; 3909951aca6SGuillaume La Roque }; 3919951aca6SGuillaume La Roque 3929951aca6SGuillaume La Roque i2c2_sda_x_pins: i2c2-sda-x { 3939951aca6SGuillaume La Roque mux { 3949951aca6SGuillaume La Roque groups = "i2c2_sda_x"; 3959951aca6SGuillaume La Roque function = "i2c2"; 3969951aca6SGuillaume La Roque bias-disable; 3979951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 3989951aca6SGuillaume La Roque }; 3999951aca6SGuillaume La Roque }; 4009951aca6SGuillaume La Roque 4019951aca6SGuillaume La Roque i2c2_sck_x_pins: i2c2-sck-x { 4029951aca6SGuillaume La Roque mux { 4039951aca6SGuillaume La Roque groups = "i2c2_sck_x"; 4049951aca6SGuillaume La Roque function = "i2c2"; 4059951aca6SGuillaume La Roque bias-disable; 4069951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4079951aca6SGuillaume La Roque }; 4089951aca6SGuillaume La Roque }; 4099951aca6SGuillaume La Roque 4109951aca6SGuillaume La Roque i2c2_sda_z_pins: i2c2-sda-z { 4119951aca6SGuillaume La Roque mux { 4129951aca6SGuillaume La Roque groups = "i2c2_sda_z"; 4139951aca6SGuillaume La Roque function = "i2c2"; 4149951aca6SGuillaume La Roque bias-disable; 4159951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4169951aca6SGuillaume La Roque }; 4179951aca6SGuillaume La Roque }; 4189951aca6SGuillaume La Roque 4199951aca6SGuillaume La Roque i2c2_sck_z_pins: i2c2-sck-z { 4209951aca6SGuillaume La Roque mux { 4219951aca6SGuillaume La Roque groups = "i2c2_sck_z"; 4229951aca6SGuillaume La Roque function = "i2c2"; 4239951aca6SGuillaume La Roque bias-disable; 4249951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4259951aca6SGuillaume La Roque }; 4269951aca6SGuillaume La Roque }; 4279951aca6SGuillaume La Roque 4289951aca6SGuillaume La Roque i2c3_sda_h_pins: i2c3-sda-h { 4299951aca6SGuillaume La Roque mux { 4309951aca6SGuillaume La Roque groups = "i2c3_sda_h"; 4319951aca6SGuillaume La Roque function = "i2c3"; 4329951aca6SGuillaume La Roque bias-disable; 4339951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4349951aca6SGuillaume La Roque }; 4359951aca6SGuillaume La Roque }; 4369951aca6SGuillaume La Roque 4379951aca6SGuillaume La Roque i2c3_sck_h_pins: i2c3-sck-h { 4389951aca6SGuillaume La Roque mux { 4399951aca6SGuillaume La Roque groups = "i2c3_sck_h"; 4409951aca6SGuillaume La Roque function = "i2c3"; 4419951aca6SGuillaume La Roque bias-disable; 4429951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4439951aca6SGuillaume La Roque }; 4449951aca6SGuillaume La Roque }; 4459951aca6SGuillaume La Roque 4469951aca6SGuillaume La Roque i2c3_sda_a_pins: i2c3-sda-a { 4479951aca6SGuillaume La Roque mux { 4489951aca6SGuillaume La Roque groups = "i2c3_sda_a"; 4499951aca6SGuillaume La Roque function = "i2c3"; 4509951aca6SGuillaume La Roque bias-disable; 4519951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4529951aca6SGuillaume La Roque }; 4539951aca6SGuillaume La Roque }; 4549951aca6SGuillaume La Roque 4559951aca6SGuillaume La Roque i2c3_sck_a_pins: i2c3-sck-a { 4569951aca6SGuillaume La Roque mux { 4579951aca6SGuillaume La Roque groups = "i2c3_sck_a"; 4589951aca6SGuillaume La Roque function = "i2c3"; 4599951aca6SGuillaume La Roque bias-disable; 4609951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 4619951aca6SGuillaume La Roque }; 4629951aca6SGuillaume La Roque }; 4639951aca6SGuillaume La Roque 4641ff38c86SJerome Brunet mclk0_a_pins: mclk0-a { 4651ff38c86SJerome Brunet mux { 4661ff38c86SJerome Brunet groups = "mclk0_a"; 4671ff38c86SJerome Brunet function = "mclk0"; 4681ff38c86SJerome Brunet bias-disable; 4691ff38c86SJerome Brunet drive-strength-microamp = <3000>; 4701ff38c86SJerome Brunet }; 4711ff38c86SJerome Brunet }; 4721ff38c86SJerome Brunet 4731ff38c86SJerome Brunet mclk1_a_pins: mclk1-a { 4741ff38c86SJerome Brunet mux { 4751ff38c86SJerome Brunet groups = "mclk1_a"; 4761ff38c86SJerome Brunet function = "mclk1"; 4771ff38c86SJerome Brunet bias-disable; 4781ff38c86SJerome Brunet drive-strength-microamp = <3000>; 4791ff38c86SJerome Brunet }; 4801ff38c86SJerome Brunet }; 4811ff38c86SJerome Brunet 4821ff38c86SJerome Brunet mclk1_x_pins: mclk1-x { 4831ff38c86SJerome Brunet mux { 4841ff38c86SJerome Brunet groups = "mclk1_x"; 4851ff38c86SJerome Brunet function = "mclk1"; 4861ff38c86SJerome Brunet bias-disable; 4871ff38c86SJerome Brunet drive-strength-microamp = <3000>; 4881ff38c86SJerome Brunet }; 4891ff38c86SJerome Brunet }; 4901ff38c86SJerome Brunet 4911ff38c86SJerome Brunet mclk1_z_pins: mclk1-z { 4921ff38c86SJerome Brunet mux { 4931ff38c86SJerome Brunet groups = "mclk1_z"; 4941ff38c86SJerome Brunet function = "mclk1"; 4951ff38c86SJerome Brunet bias-disable; 4961ff38c86SJerome Brunet drive-strength-microamp = <3000>; 4971ff38c86SJerome Brunet }; 4981ff38c86SJerome Brunet }; 4991ff38c86SJerome Brunet 500bb23b125SNeil Armstrong pwm_a_pins: pwm-a { 501bb23b125SNeil Armstrong mux { 502bb23b125SNeil Armstrong groups = "pwm_a"; 503bb23b125SNeil Armstrong function = "pwm_a"; 504bb23b125SNeil Armstrong bias-disable; 505bb23b125SNeil Armstrong }; 506bb23b125SNeil Armstrong }; 507bb23b125SNeil Armstrong 508bb23b125SNeil Armstrong pwm_b_x7_pins: pwm-b-x7 { 509bb23b125SNeil Armstrong mux { 510bb23b125SNeil Armstrong groups = "pwm_b_x7"; 511bb23b125SNeil Armstrong function = "pwm_b"; 512bb23b125SNeil Armstrong bias-disable; 513bb23b125SNeil Armstrong }; 514bb23b125SNeil Armstrong }; 515bb23b125SNeil Armstrong 516bb23b125SNeil Armstrong pwm_b_x19_pins: pwm-b-x19 { 517bb23b125SNeil Armstrong mux { 518bb23b125SNeil Armstrong groups = "pwm_b_x19"; 519bb23b125SNeil Armstrong function = "pwm_b"; 520bb23b125SNeil Armstrong bias-disable; 521bb23b125SNeil Armstrong }; 522bb23b125SNeil Armstrong }; 523bb23b125SNeil Armstrong 524bb23b125SNeil Armstrong pwm_c_c_pins: pwm-c-c { 525bb23b125SNeil Armstrong mux { 526bb23b125SNeil Armstrong groups = "pwm_c_c"; 527bb23b125SNeil Armstrong function = "pwm_c"; 528bb23b125SNeil Armstrong bias-disable; 529bb23b125SNeil Armstrong }; 530bb23b125SNeil Armstrong }; 531bb23b125SNeil Armstrong 532bb23b125SNeil Armstrong pwm_c_x5_pins: pwm-c-x5 { 533bb23b125SNeil Armstrong mux { 534bb23b125SNeil Armstrong groups = "pwm_c_x5"; 535bb23b125SNeil Armstrong function = "pwm_c"; 536bb23b125SNeil Armstrong bias-disable; 537bb23b125SNeil Armstrong }; 538bb23b125SNeil Armstrong }; 539bb23b125SNeil Armstrong 540bb23b125SNeil Armstrong pwm_c_x8_pins: pwm-c-x8 { 541bb23b125SNeil Armstrong mux { 542bb23b125SNeil Armstrong groups = "pwm_c_x8"; 543bb23b125SNeil Armstrong function = "pwm_c"; 544bb23b125SNeil Armstrong bias-disable; 545bb23b125SNeil Armstrong }; 546bb23b125SNeil Armstrong }; 547bb23b125SNeil Armstrong 548bb23b125SNeil Armstrong pwm_d_x3_pins: pwm-d-x3 { 549bb23b125SNeil Armstrong mux { 550bb23b125SNeil Armstrong groups = "pwm_d_x3"; 551bb23b125SNeil Armstrong function = "pwm_d"; 552bb23b125SNeil Armstrong bias-disable; 553bb23b125SNeil Armstrong }; 554bb23b125SNeil Armstrong }; 555bb23b125SNeil Armstrong 556bb23b125SNeil Armstrong pwm_d_x6_pins: pwm-d-x6 { 557bb23b125SNeil Armstrong mux { 558bb23b125SNeil Armstrong groups = "pwm_d_x6"; 559bb23b125SNeil Armstrong function = "pwm_d"; 560bb23b125SNeil Armstrong bias-disable; 561bb23b125SNeil Armstrong }; 562bb23b125SNeil Armstrong }; 563bb23b125SNeil Armstrong 564bb23b125SNeil Armstrong pwm_e_pins: pwm-e { 565bb23b125SNeil Armstrong mux { 566bb23b125SNeil Armstrong groups = "pwm_e"; 567bb23b125SNeil Armstrong function = "pwm_e"; 568bb23b125SNeil Armstrong bias-disable; 569bb23b125SNeil Armstrong }; 570bb23b125SNeil Armstrong }; 571bb23b125SNeil Armstrong 572bb23b125SNeil Armstrong pwm_f_x_pins: pwm-f-x { 573bb23b125SNeil Armstrong mux { 574bb23b125SNeil Armstrong groups = "pwm_f_x"; 575bb23b125SNeil Armstrong function = "pwm_f"; 576bb23b125SNeil Armstrong bias-disable; 577bb23b125SNeil Armstrong }; 578bb23b125SNeil Armstrong }; 579bb23b125SNeil Armstrong 580bb23b125SNeil Armstrong pwm_f_h_pins: pwm-f-h { 581bb23b125SNeil Armstrong mux { 582bb23b125SNeil Armstrong groups = "pwm_f_h"; 583bb23b125SNeil Armstrong function = "pwm_f"; 584bb23b125SNeil Armstrong bias-disable; 585bb23b125SNeil Armstrong }; 586bb23b125SNeil Armstrong }; 587bb23b125SNeil Armstrong 5884759fd87SJerome Brunet sdcard_c_pins: sdcard_c { 5894759fd87SJerome Brunet mux-0 { 5904759fd87SJerome Brunet groups = "sdcard_d0_c", 5914759fd87SJerome Brunet "sdcard_d1_c", 5924759fd87SJerome Brunet "sdcard_d2_c", 5934759fd87SJerome Brunet "sdcard_d3_c", 5944759fd87SJerome Brunet "sdcard_cmd_c"; 5954759fd87SJerome Brunet function = "sdcard"; 5964759fd87SJerome Brunet bias-pull-up; 5974759fd87SJerome Brunet drive-strength-microamp = <4000>; 5984759fd87SJerome Brunet }; 5994759fd87SJerome Brunet 6004759fd87SJerome Brunet mux-1 { 6014759fd87SJerome Brunet groups = "sdcard_clk_c"; 6024759fd87SJerome Brunet function = "sdcard"; 6034759fd87SJerome Brunet bias-disable; 6044759fd87SJerome Brunet drive-strength-microamp = <4000>; 6054759fd87SJerome Brunet }; 6064759fd87SJerome Brunet }; 6074759fd87SJerome Brunet 6084759fd87SJerome Brunet sdcard_clk_gate_c_pins: sdcard_clk_gate_c { 6094759fd87SJerome Brunet mux { 6104759fd87SJerome Brunet groups = "GPIOC_4"; 6114759fd87SJerome Brunet function = "gpio_periphs"; 6124759fd87SJerome Brunet bias-pull-down; 6134759fd87SJerome Brunet drive-strength-microamp = <4000>; 6144759fd87SJerome Brunet }; 6154759fd87SJerome Brunet }; 6164759fd87SJerome Brunet 6174759fd87SJerome Brunet sdcard_z_pins: sdcard_z { 6184759fd87SJerome Brunet mux-0 { 6194759fd87SJerome Brunet groups = "sdcard_d0_z", 6204759fd87SJerome Brunet "sdcard_d1_z", 6214759fd87SJerome Brunet "sdcard_d2_z", 6224759fd87SJerome Brunet "sdcard_d3_z", 6234759fd87SJerome Brunet "sdcard_cmd_z"; 6244759fd87SJerome Brunet function = "sdcard"; 6254759fd87SJerome Brunet bias-pull-up; 6264759fd87SJerome Brunet drive-strength-microamp = <4000>; 6274759fd87SJerome Brunet }; 6284759fd87SJerome Brunet 6294759fd87SJerome Brunet mux-1 { 6304759fd87SJerome Brunet groups = "sdcard_clk_z"; 6314759fd87SJerome Brunet function = "sdcard"; 6324759fd87SJerome Brunet bias-disable; 6334759fd87SJerome Brunet drive-strength-microamp = <4000>; 6344759fd87SJerome Brunet }; 6354759fd87SJerome Brunet }; 6364759fd87SJerome Brunet 6374759fd87SJerome Brunet sdcard_clk_gate_z_pins: sdcard_clk_gate_z { 6384759fd87SJerome Brunet mux { 6394759fd87SJerome Brunet groups = "GPIOZ_6"; 6404759fd87SJerome Brunet function = "gpio_periphs"; 6414759fd87SJerome Brunet bias-pull-down; 6424759fd87SJerome Brunet drive-strength-microamp = <4000>; 6434759fd87SJerome Brunet }; 6444759fd87SJerome Brunet }; 6454759fd87SJerome Brunet 6461ff38c86SJerome Brunet tdm_a_din0_pins: tdm-a-din0 { 6471ff38c86SJerome Brunet mux { 6481ff38c86SJerome Brunet groups = "tdm_a_din0"; 6491ff38c86SJerome Brunet function = "tdm_a"; 6501ff38c86SJerome Brunet bias-disable; 6511ff38c86SJerome Brunet }; 6521ff38c86SJerome Brunet }; 6531ff38c86SJerome Brunet 6541ff38c86SJerome Brunet 6551ff38c86SJerome Brunet tdm_a_din1_pins: tdm-a-din1 { 6561ff38c86SJerome Brunet mux { 6571ff38c86SJerome Brunet groups = "tdm_a_din1"; 6581ff38c86SJerome Brunet function = "tdm_a"; 6591ff38c86SJerome Brunet bias-disable; 6601ff38c86SJerome Brunet }; 6611ff38c86SJerome Brunet }; 6621ff38c86SJerome Brunet 6631ff38c86SJerome Brunet tdm_a_dout0_pins: tdm-a-dout0 { 6641ff38c86SJerome Brunet mux { 6651ff38c86SJerome Brunet groups = "tdm_a_dout0"; 6661ff38c86SJerome Brunet function = "tdm_a"; 6671ff38c86SJerome Brunet bias-disable; 6681ff38c86SJerome Brunet drive-strength-microamp = <3000>; 6691ff38c86SJerome Brunet }; 6701ff38c86SJerome Brunet }; 6711ff38c86SJerome Brunet 6721ff38c86SJerome Brunet tdm_a_dout1_pins: tdm-a-dout1 { 6731ff38c86SJerome Brunet mux { 6741ff38c86SJerome Brunet groups = "tdm_a_dout1"; 6751ff38c86SJerome Brunet function = "tdm_a"; 6761ff38c86SJerome Brunet bias-disable; 6771ff38c86SJerome Brunet drive-strength-microamp = <3000>; 6781ff38c86SJerome Brunet }; 6791ff38c86SJerome Brunet }; 6801ff38c86SJerome Brunet 6811ff38c86SJerome Brunet tdm_a_fs_pins: tdm-a-fs { 6821ff38c86SJerome Brunet mux { 6831ff38c86SJerome Brunet groups = "tdm_a_fs"; 6841ff38c86SJerome Brunet function = "tdm_a"; 6851ff38c86SJerome Brunet bias-disable; 6861ff38c86SJerome Brunet drive-strength-microamp = <3000>; 6871ff38c86SJerome Brunet }; 6881ff38c86SJerome Brunet }; 6891ff38c86SJerome Brunet 6901ff38c86SJerome Brunet tdm_a_sclk_pins: tdm-a-sclk { 6911ff38c86SJerome Brunet mux { 6921ff38c86SJerome Brunet groups = "tdm_a_sclk"; 6931ff38c86SJerome Brunet function = "tdm_a"; 6941ff38c86SJerome Brunet bias-disable; 6951ff38c86SJerome Brunet drive-strength-microamp = <3000>; 6961ff38c86SJerome Brunet }; 6971ff38c86SJerome Brunet }; 6981ff38c86SJerome Brunet 6991ff38c86SJerome Brunet tdm_a_slv_fs_pins: tdm-a-slv-fs { 7001ff38c86SJerome Brunet mux { 7011ff38c86SJerome Brunet groups = "tdm_a_slv_fs"; 7021ff38c86SJerome Brunet function = "tdm_a"; 7031ff38c86SJerome Brunet bias-disable; 7041ff38c86SJerome Brunet }; 7051ff38c86SJerome Brunet }; 7061ff38c86SJerome Brunet 7071ff38c86SJerome Brunet 7081ff38c86SJerome Brunet tdm_a_slv_sclk_pins: tdm-a-slv-sclk { 7091ff38c86SJerome Brunet mux { 7101ff38c86SJerome Brunet groups = "tdm_a_slv_sclk"; 7111ff38c86SJerome Brunet function = "tdm_a"; 7121ff38c86SJerome Brunet bias-disable; 7131ff38c86SJerome Brunet }; 7141ff38c86SJerome Brunet }; 7151ff38c86SJerome Brunet 7161ff38c86SJerome Brunet tdm_b_din0_pins: tdm-b-din0 { 7171ff38c86SJerome Brunet mux { 7181ff38c86SJerome Brunet groups = "tdm_b_din0"; 7191ff38c86SJerome Brunet function = "tdm_b"; 7201ff38c86SJerome Brunet bias-disable; 7211ff38c86SJerome Brunet }; 7221ff38c86SJerome Brunet }; 7231ff38c86SJerome Brunet 7241ff38c86SJerome Brunet tdm_b_din1_pins: tdm-b-din1 { 7251ff38c86SJerome Brunet mux { 7261ff38c86SJerome Brunet groups = "tdm_b_din1"; 7271ff38c86SJerome Brunet function = "tdm_b"; 7281ff38c86SJerome Brunet bias-disable; 7291ff38c86SJerome Brunet }; 7301ff38c86SJerome Brunet }; 7311ff38c86SJerome Brunet 7321ff38c86SJerome Brunet tdm_b_din2_pins: tdm-b-din2 { 7331ff38c86SJerome Brunet mux { 7341ff38c86SJerome Brunet groups = "tdm_b_din2"; 7351ff38c86SJerome Brunet function = "tdm_b"; 7361ff38c86SJerome Brunet bias-disable; 7371ff38c86SJerome Brunet }; 7381ff38c86SJerome Brunet }; 7391ff38c86SJerome Brunet 7401ff38c86SJerome Brunet tdm_b_din3_a_pins: tdm-b-din3-a { 7411ff38c86SJerome Brunet mux { 7421ff38c86SJerome Brunet groups = "tdm_b_din3_a"; 7431ff38c86SJerome Brunet function = "tdm_b"; 7441ff38c86SJerome Brunet bias-disable; 7451ff38c86SJerome Brunet }; 7461ff38c86SJerome Brunet }; 7471ff38c86SJerome Brunet 7481ff38c86SJerome Brunet tdm_b_din3_h_pins: tdm-b-din3-h { 7491ff38c86SJerome Brunet mux { 7501ff38c86SJerome Brunet groups = "tdm_b_din3_h"; 7511ff38c86SJerome Brunet function = "tdm_b"; 7521ff38c86SJerome Brunet bias-disable; 7531ff38c86SJerome Brunet }; 7541ff38c86SJerome Brunet }; 7551ff38c86SJerome Brunet 7561ff38c86SJerome Brunet tdm_b_dout0_pins: tdm-b-dout0 { 7571ff38c86SJerome Brunet mux { 7581ff38c86SJerome Brunet groups = "tdm_b_dout0"; 7591ff38c86SJerome Brunet function = "tdm_b"; 7601ff38c86SJerome Brunet bias-disable; 7611ff38c86SJerome Brunet drive-strength-microamp = <3000>; 7621ff38c86SJerome Brunet }; 7631ff38c86SJerome Brunet }; 7641ff38c86SJerome Brunet 7651ff38c86SJerome Brunet tdm_b_dout1_pins: tdm-b-dout1 { 7661ff38c86SJerome Brunet mux { 7671ff38c86SJerome Brunet groups = "tdm_b_dout1"; 7681ff38c86SJerome Brunet function = "tdm_b"; 7691ff38c86SJerome Brunet bias-disable; 7701ff38c86SJerome Brunet drive-strength-microamp = <3000>; 7711ff38c86SJerome Brunet }; 7721ff38c86SJerome Brunet }; 7731ff38c86SJerome Brunet 7741ff38c86SJerome Brunet tdm_b_dout2_pins: tdm-b-dout2 { 7751ff38c86SJerome Brunet mux { 7761ff38c86SJerome Brunet groups = "tdm_b_dout2"; 7771ff38c86SJerome Brunet function = "tdm_b"; 7781ff38c86SJerome Brunet bias-disable; 7791ff38c86SJerome Brunet drive-strength-microamp = <3000>; 7801ff38c86SJerome Brunet }; 7811ff38c86SJerome Brunet }; 7821ff38c86SJerome Brunet 7831ff38c86SJerome Brunet tdm_b_dout3_a_pins: tdm-b-dout3-a { 7841ff38c86SJerome Brunet mux { 7851ff38c86SJerome Brunet groups = "tdm_b_dout3_a"; 7861ff38c86SJerome Brunet function = "tdm_b"; 7871ff38c86SJerome Brunet bias-disable; 7881ff38c86SJerome Brunet drive-strength-microamp = <3000>; 7891ff38c86SJerome Brunet }; 7901ff38c86SJerome Brunet }; 7911ff38c86SJerome Brunet 7921ff38c86SJerome Brunet tdm_b_dout3_h_pins: tdm-b-dout3-h { 7931ff38c86SJerome Brunet mux { 7941ff38c86SJerome Brunet groups = "tdm_b_dout3_h"; 7951ff38c86SJerome Brunet function = "tdm_b"; 7961ff38c86SJerome Brunet bias-disable; 7971ff38c86SJerome Brunet drive-strength-microamp = <3000>; 7981ff38c86SJerome Brunet }; 7991ff38c86SJerome Brunet }; 8001ff38c86SJerome Brunet 8011ff38c86SJerome Brunet tdm_b_fs_pins: tdm-b-fs { 8021ff38c86SJerome Brunet mux { 8031ff38c86SJerome Brunet groups = "tdm_b_fs"; 8041ff38c86SJerome Brunet function = "tdm_b"; 8051ff38c86SJerome Brunet bias-disable; 8061ff38c86SJerome Brunet drive-strength-microamp = <3000>; 8071ff38c86SJerome Brunet }; 8081ff38c86SJerome Brunet }; 8091ff38c86SJerome Brunet 8101ff38c86SJerome Brunet tdm_b_sclk_pins: tdm-b-sclk { 8111ff38c86SJerome Brunet mux { 8121ff38c86SJerome Brunet groups = "tdm_b_sclk"; 8131ff38c86SJerome Brunet function = "tdm_b"; 8141ff38c86SJerome Brunet bias-disable; 8151ff38c86SJerome Brunet drive-strength-microamp = <3000>; 8161ff38c86SJerome Brunet }; 8171ff38c86SJerome Brunet }; 8181ff38c86SJerome Brunet 8191ff38c86SJerome Brunet tdm_b_slv_fs_pins: tdm-b-slv-fs { 8201ff38c86SJerome Brunet mux { 8211ff38c86SJerome Brunet groups = "tdm_b_slv_fs"; 8221ff38c86SJerome Brunet function = "tdm_b"; 8231ff38c86SJerome Brunet bias-disable; 8241ff38c86SJerome Brunet }; 8251ff38c86SJerome Brunet }; 8261ff38c86SJerome Brunet 8271ff38c86SJerome Brunet tdm_b_slv_sclk_pins: tdm-b-slv-sclk { 8281ff38c86SJerome Brunet mux { 8291ff38c86SJerome Brunet groups = "tdm_b_slv_sclk"; 8301ff38c86SJerome Brunet function = "tdm_b"; 8311ff38c86SJerome Brunet bias-disable; 8321ff38c86SJerome Brunet }; 8331ff38c86SJerome Brunet }; 8341ff38c86SJerome Brunet 8351ff38c86SJerome Brunet tdm_c_din0_a_pins: tdm-c-din0-a { 8361ff38c86SJerome Brunet mux { 8371ff38c86SJerome Brunet groups = "tdm_c_din0_a"; 8381ff38c86SJerome Brunet function = "tdm_c"; 8391ff38c86SJerome Brunet bias-disable; 8401ff38c86SJerome Brunet }; 8411ff38c86SJerome Brunet }; 8421ff38c86SJerome Brunet 8431ff38c86SJerome Brunet tdm_c_din0_z_pins: tdm-c-din0-z { 8441ff38c86SJerome Brunet mux { 8451ff38c86SJerome Brunet groups = "tdm_c_din0_z"; 8461ff38c86SJerome Brunet function = "tdm_c"; 8471ff38c86SJerome Brunet bias-disable; 8481ff38c86SJerome Brunet }; 8491ff38c86SJerome Brunet }; 8501ff38c86SJerome Brunet 8511ff38c86SJerome Brunet tdm_c_din1_a_pins: tdm-c-din1-a { 8521ff38c86SJerome Brunet mux { 8531ff38c86SJerome Brunet groups = "tdm_c_din1_a"; 8541ff38c86SJerome Brunet function = "tdm_c"; 8551ff38c86SJerome Brunet bias-disable; 8561ff38c86SJerome Brunet }; 8571ff38c86SJerome Brunet }; 8581ff38c86SJerome Brunet 8591ff38c86SJerome Brunet tdm_c_din1_z_pins: tdm-c-din1-z { 8601ff38c86SJerome Brunet mux { 8611ff38c86SJerome Brunet groups = "tdm_c_din1_z"; 8621ff38c86SJerome Brunet function = "tdm_c"; 8631ff38c86SJerome Brunet bias-disable; 8641ff38c86SJerome Brunet }; 8651ff38c86SJerome Brunet }; 8661ff38c86SJerome Brunet 8671ff38c86SJerome Brunet tdm_c_din2_a_pins: tdm-c-din2-a { 8681ff38c86SJerome Brunet mux { 8691ff38c86SJerome Brunet groups = "tdm_c_din2_a"; 8701ff38c86SJerome Brunet function = "tdm_c"; 8711ff38c86SJerome Brunet bias-disable; 8721ff38c86SJerome Brunet }; 8731ff38c86SJerome Brunet }; 8741ff38c86SJerome Brunet 8751ff38c86SJerome Brunet tdm_c_din2_z_pins: tdm-c-din2-z { 8761ff38c86SJerome Brunet mux { 8771ff38c86SJerome Brunet groups = "tdm_c_din2_z"; 8781ff38c86SJerome Brunet function = "tdm_c"; 8791ff38c86SJerome Brunet bias-disable; 8801ff38c86SJerome Brunet }; 8811ff38c86SJerome Brunet }; 8821ff38c86SJerome Brunet 8831ff38c86SJerome Brunet tdm_c_din3_a_pins: tdm-c-din3-a { 8841ff38c86SJerome Brunet mux { 8851ff38c86SJerome Brunet groups = "tdm_c_din3_a"; 8861ff38c86SJerome Brunet function = "tdm_c"; 8871ff38c86SJerome Brunet bias-disable; 8881ff38c86SJerome Brunet }; 8891ff38c86SJerome Brunet }; 8901ff38c86SJerome Brunet 8911ff38c86SJerome Brunet tdm_c_din3_z_pins: tdm-c-din3-z { 8921ff38c86SJerome Brunet mux { 8931ff38c86SJerome Brunet groups = "tdm_c_din3_z"; 8941ff38c86SJerome Brunet function = "tdm_c"; 8951ff38c86SJerome Brunet bias-disable; 8961ff38c86SJerome Brunet }; 8971ff38c86SJerome Brunet }; 8981ff38c86SJerome Brunet 8991ff38c86SJerome Brunet tdm_c_dout0_a_pins: tdm-c-dout0-a { 9001ff38c86SJerome Brunet mux { 9011ff38c86SJerome Brunet groups = "tdm_c_dout0_a"; 9021ff38c86SJerome Brunet function = "tdm_c"; 9031ff38c86SJerome Brunet bias-disable; 9041ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9051ff38c86SJerome Brunet }; 9061ff38c86SJerome Brunet }; 9071ff38c86SJerome Brunet 9081ff38c86SJerome Brunet tdm_c_dout0_z_pins: tdm-c-dout0-z { 9091ff38c86SJerome Brunet mux { 9101ff38c86SJerome Brunet groups = "tdm_c_dout0_z"; 9111ff38c86SJerome Brunet function = "tdm_c"; 9121ff38c86SJerome Brunet bias-disable; 9131ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9141ff38c86SJerome Brunet }; 9151ff38c86SJerome Brunet }; 9161ff38c86SJerome Brunet 9171ff38c86SJerome Brunet tdm_c_dout1_a_pins: tdm-c-dout1-a { 9181ff38c86SJerome Brunet mux { 9191ff38c86SJerome Brunet groups = "tdm_c_dout1_a"; 9201ff38c86SJerome Brunet function = "tdm_c"; 9211ff38c86SJerome Brunet bias-disable; 9221ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9231ff38c86SJerome Brunet }; 9241ff38c86SJerome Brunet }; 9251ff38c86SJerome Brunet 9261ff38c86SJerome Brunet tdm_c_dout1_z_pins: tdm-c-dout1-z { 9271ff38c86SJerome Brunet mux { 9281ff38c86SJerome Brunet groups = "tdm_c_dout1_z"; 9291ff38c86SJerome Brunet function = "tdm_c"; 9301ff38c86SJerome Brunet bias-disable; 9311ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9321ff38c86SJerome Brunet }; 9331ff38c86SJerome Brunet }; 9341ff38c86SJerome Brunet 9351ff38c86SJerome Brunet tdm_c_dout2_a_pins: tdm-c-dout2-a { 9361ff38c86SJerome Brunet mux { 9371ff38c86SJerome Brunet groups = "tdm_c_dout2_a"; 9381ff38c86SJerome Brunet function = "tdm_c"; 9391ff38c86SJerome Brunet bias-disable; 9401ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9411ff38c86SJerome Brunet }; 9421ff38c86SJerome Brunet }; 9431ff38c86SJerome Brunet 9441ff38c86SJerome Brunet tdm_c_dout2_z_pins: tdm-c-dout2-z { 9451ff38c86SJerome Brunet mux { 9461ff38c86SJerome Brunet groups = "tdm_c_dout2_z"; 9471ff38c86SJerome Brunet function = "tdm_c"; 9481ff38c86SJerome Brunet bias-disable; 9491ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9501ff38c86SJerome Brunet }; 9511ff38c86SJerome Brunet }; 9521ff38c86SJerome Brunet 9531ff38c86SJerome Brunet tdm_c_dout3_a_pins: tdm-c-dout3-a { 9541ff38c86SJerome Brunet mux { 9551ff38c86SJerome Brunet groups = "tdm_c_dout3_a"; 9561ff38c86SJerome Brunet function = "tdm_c"; 9571ff38c86SJerome Brunet bias-disable; 9581ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9591ff38c86SJerome Brunet }; 9601ff38c86SJerome Brunet }; 9611ff38c86SJerome Brunet 9621ff38c86SJerome Brunet tdm_c_dout3_z_pins: tdm-c-dout3-z { 9631ff38c86SJerome Brunet mux { 9641ff38c86SJerome Brunet groups = "tdm_c_dout3_z"; 9651ff38c86SJerome Brunet function = "tdm_c"; 9661ff38c86SJerome Brunet bias-disable; 9671ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9681ff38c86SJerome Brunet }; 9691ff38c86SJerome Brunet }; 9701ff38c86SJerome Brunet 9711ff38c86SJerome Brunet tdm_c_fs_a_pins: tdm-c-fs-a { 9721ff38c86SJerome Brunet mux { 9731ff38c86SJerome Brunet groups = "tdm_c_fs_a"; 9741ff38c86SJerome Brunet function = "tdm_c"; 9751ff38c86SJerome Brunet bias-disable; 9761ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9771ff38c86SJerome Brunet }; 9781ff38c86SJerome Brunet }; 9791ff38c86SJerome Brunet 9801ff38c86SJerome Brunet tdm_c_fs_z_pins: tdm-c-fs-z { 9811ff38c86SJerome Brunet mux { 9821ff38c86SJerome Brunet groups = "tdm_c_fs_z"; 9831ff38c86SJerome Brunet function = "tdm_c"; 9841ff38c86SJerome Brunet bias-disable; 9851ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9861ff38c86SJerome Brunet }; 9871ff38c86SJerome Brunet }; 9881ff38c86SJerome Brunet 9891ff38c86SJerome Brunet tdm_c_sclk_a_pins: tdm-c-sclk-a { 9901ff38c86SJerome Brunet mux { 9911ff38c86SJerome Brunet groups = "tdm_c_sclk_a"; 9921ff38c86SJerome Brunet function = "tdm_c"; 9931ff38c86SJerome Brunet bias-disable; 9941ff38c86SJerome Brunet drive-strength-microamp = <3000>; 9951ff38c86SJerome Brunet }; 9961ff38c86SJerome Brunet }; 9971ff38c86SJerome Brunet 9981ff38c86SJerome Brunet tdm_c_sclk_z_pins: tdm-c-sclk-z { 9991ff38c86SJerome Brunet mux { 10001ff38c86SJerome Brunet groups = "tdm_c_sclk_z"; 10011ff38c86SJerome Brunet function = "tdm_c"; 10021ff38c86SJerome Brunet bias-disable; 10031ff38c86SJerome Brunet drive-strength-microamp = <3000>; 10041ff38c86SJerome Brunet }; 10051ff38c86SJerome Brunet }; 10061ff38c86SJerome Brunet 10071ff38c86SJerome Brunet tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a { 10081ff38c86SJerome Brunet mux { 10091ff38c86SJerome Brunet groups = "tdm_c_slv_fs_a"; 10101ff38c86SJerome Brunet function = "tdm_c"; 10111ff38c86SJerome Brunet bias-disable; 10121ff38c86SJerome Brunet }; 10131ff38c86SJerome Brunet }; 10141ff38c86SJerome Brunet 10151ff38c86SJerome Brunet tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z { 10161ff38c86SJerome Brunet mux { 10171ff38c86SJerome Brunet groups = "tdm_c_slv_fs_z"; 10181ff38c86SJerome Brunet function = "tdm_c"; 10191ff38c86SJerome Brunet bias-disable; 10201ff38c86SJerome Brunet }; 10211ff38c86SJerome Brunet }; 10221ff38c86SJerome Brunet 10231ff38c86SJerome Brunet tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a { 10241ff38c86SJerome Brunet mux { 10251ff38c86SJerome Brunet groups = "tdm_c_slv_sclk_a"; 10261ff38c86SJerome Brunet function = "tdm_c"; 10271ff38c86SJerome Brunet bias-disable; 10281ff38c86SJerome Brunet }; 10291ff38c86SJerome Brunet }; 10301ff38c86SJerome Brunet 10311ff38c86SJerome Brunet tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z { 10321ff38c86SJerome Brunet mux { 10331ff38c86SJerome Brunet groups = "tdm_c_slv_sclk_z"; 10341ff38c86SJerome Brunet function = "tdm_c"; 10351ff38c86SJerome Brunet bias-disable; 10361ff38c86SJerome Brunet }; 10371ff38c86SJerome Brunet }; 10381ff38c86SJerome Brunet 1039ff4f8b6cSNeil Armstrong uart_a_pins: uart-a { 1040ff4f8b6cSNeil Armstrong mux { 1041ff4f8b6cSNeil Armstrong groups = "uart_a_tx", 1042ff4f8b6cSNeil Armstrong "uart_a_rx"; 1043ff4f8b6cSNeil Armstrong function = "uart_a"; 1044ff4f8b6cSNeil Armstrong bias-disable; 1045ff4f8b6cSNeil Armstrong }; 1046ff4f8b6cSNeil Armstrong }; 1047ff4f8b6cSNeil Armstrong 1048ff4f8b6cSNeil Armstrong uart_a_cts_rts_pins: uart-a-cts-rts { 1049ff4f8b6cSNeil Armstrong mux { 1050ff4f8b6cSNeil Armstrong groups = "uart_a_cts", 1051ff4f8b6cSNeil Armstrong "uart_a_rts"; 1052ff4f8b6cSNeil Armstrong function = "uart_a"; 1053ff4f8b6cSNeil Armstrong bias-disable; 1054ff4f8b6cSNeil Armstrong }; 1055ff4f8b6cSNeil Armstrong }; 1056ff4f8b6cSNeil Armstrong 1057ff4f8b6cSNeil Armstrong uart_b_pins: uart-b { 1058ff4f8b6cSNeil Armstrong mux { 1059ff4f8b6cSNeil Armstrong groups = "uart_b_tx", 1060ff4f8b6cSNeil Armstrong "uart_b_rx"; 1061ff4f8b6cSNeil Armstrong function = "uart_b"; 1062ff4f8b6cSNeil Armstrong bias-disable; 1063ff4f8b6cSNeil Armstrong }; 1064ff4f8b6cSNeil Armstrong }; 1065ff4f8b6cSNeil Armstrong 1066ff4f8b6cSNeil Armstrong uart_c_pins: uart-c { 1067ff4f8b6cSNeil Armstrong mux { 1068ff4f8b6cSNeil Armstrong groups = "uart_c_tx", 1069ff4f8b6cSNeil Armstrong "uart_c_rx"; 1070ff4f8b6cSNeil Armstrong function = "uart_c"; 1071ff4f8b6cSNeil Armstrong bias-disable; 1072ff4f8b6cSNeil Armstrong }; 1073ff4f8b6cSNeil Armstrong }; 1074ff4f8b6cSNeil Armstrong 1075ff4f8b6cSNeil Armstrong uart_c_cts_rts_pins: uart-c-cts-rts { 1076ff4f8b6cSNeil Armstrong mux { 1077ff4f8b6cSNeil Armstrong groups = "uart_c_cts", 1078ff4f8b6cSNeil Armstrong "uart_c_rts"; 1079ff4f8b6cSNeil Armstrong function = "uart_c"; 1080ff4f8b6cSNeil Armstrong bias-disable; 1081ff4f8b6cSNeil Armstrong }; 1082ff4f8b6cSNeil Armstrong }; 108311a7bea1SJerome Brunet }; 10849c8c52f7SJianxin Pan }; 10859c8c52f7SJianxin Pan 10869baf7d6bSNeil Armstrong usb2_phy0: phy@36000 { 10879baf7d6bSNeil Armstrong compatible = "amlogic,g12a-usb2-phy"; 10889baf7d6bSNeil Armstrong reg = <0x0 0x36000 0x0 0x2000>; 10899baf7d6bSNeil Armstrong clocks = <&xtal>; 10909baf7d6bSNeil Armstrong clock-names = "xtal"; 10919baf7d6bSNeil Armstrong resets = <&reset RESET_USB_PHY20>; 10929baf7d6bSNeil Armstrong reset-names = "phy"; 10939baf7d6bSNeil Armstrong #phy-cells = <0>; 10949baf7d6bSNeil Armstrong }; 10959baf7d6bSNeil Armstrong 1096083feecdSNeil Armstrong dmc: bus@38000 { 1097083feecdSNeil Armstrong compatible = "simple-bus"; 1098083feecdSNeil Armstrong reg = <0x0 0x38000 0x0 0x400>; 1099083feecdSNeil Armstrong #address-cells = <2>; 1100083feecdSNeil Armstrong #size-cells = <2>; 1101083feecdSNeil Armstrong ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>; 1102083feecdSNeil Armstrong 1103083feecdSNeil Armstrong canvas: video-lut@48 { 1104083feecdSNeil Armstrong compatible = "amlogic,canvas"; 1105083feecdSNeil Armstrong reg = <0x0 0x48 0x0 0x14>; 1106083feecdSNeil Armstrong }; 1107083feecdSNeil Armstrong }; 1108083feecdSNeil Armstrong 11099baf7d6bSNeil Armstrong usb2_phy1: phy@3a000 { 11109baf7d6bSNeil Armstrong compatible = "amlogic,g12a-usb2-phy"; 11119baf7d6bSNeil Armstrong reg = <0x0 0x3a000 0x0 0x2000>; 11129baf7d6bSNeil Armstrong clocks = <&xtal>; 11139baf7d6bSNeil Armstrong clock-names = "xtal"; 11149baf7d6bSNeil Armstrong resets = <&reset RESET_USB_PHY21>; 11159baf7d6bSNeil Armstrong reset-names = "phy"; 11169baf7d6bSNeil Armstrong #phy-cells = <0>; 11179baf7d6bSNeil Armstrong }; 11189baf7d6bSNeil Armstrong 1119503f5fedSJerome Brunet hiu: bus@3c000 { 11209c8c52f7SJianxin Pan compatible = "simple-bus"; 1121503f5fedSJerome Brunet reg = <0x0 0x3c000 0x0 0x1400>; 11229c8c52f7SJianxin Pan #address-cells = <2>; 11239c8c52f7SJianxin Pan #size-cells = <2>; 1124503f5fedSJerome Brunet ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>; 1125785fb434SJerome Brunet 1126785fb434SJerome Brunet hhi: system-controller@0 { 1127785fb434SJerome Brunet compatible = "amlogic,meson-gx-hhi-sysctrl", 1128785fb434SJerome Brunet "simple-mfd", "syscon"; 1129785fb434SJerome Brunet reg = <0 0 0 0x400>; 1130785fb434SJerome Brunet 1131785fb434SJerome Brunet clkc: clock-controller { 1132785fb434SJerome Brunet compatible = "amlogic,g12a-clkc"; 1133785fb434SJerome Brunet #clock-cells = <1>; 1134785fb434SJerome Brunet clocks = <&xtal>; 1135785fb434SJerome Brunet clock-names = "xtal"; 1136785fb434SJerome Brunet }; 1137785fb434SJerome Brunet }; 1138503f5fedSJerome Brunet }; 11399baf7d6bSNeil Armstrong 114003c3f08cSJerome Brunet audio: bus@42000 { 114103c3f08cSJerome Brunet compatible = "simple-bus"; 114203c3f08cSJerome Brunet reg = <0x0 0x42000 0x0 0x2000>; 114303c3f08cSJerome Brunet #address-cells = <2>; 114403c3f08cSJerome Brunet #size-cells = <2>; 114503c3f08cSJerome Brunet ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>; 114603c3f08cSJerome Brunet 114703c3f08cSJerome Brunet clkc_audio: clock-controller@0 { 114803c3f08cSJerome Brunet status = "disabled"; 114903c3f08cSJerome Brunet compatible = "amlogic,g12a-audio-clkc"; 115003c3f08cSJerome Brunet reg = <0x0 0x0 0x0 0xb4>; 115103c3f08cSJerome Brunet #clock-cells = <1>; 115203c3f08cSJerome Brunet 115303c3f08cSJerome Brunet clocks = <&clkc CLKID_AUDIO>, 115403c3f08cSJerome Brunet <&clkc CLKID_MPLL0>, 115503c3f08cSJerome Brunet <&clkc CLKID_MPLL1>, 115603c3f08cSJerome Brunet <&clkc CLKID_MPLL2>, 115703c3f08cSJerome Brunet <&clkc CLKID_MPLL3>, 115803c3f08cSJerome Brunet <&clkc CLKID_HIFI_PLL>, 115903c3f08cSJerome Brunet <&clkc CLKID_FCLK_DIV3>, 116003c3f08cSJerome Brunet <&clkc CLKID_FCLK_DIV4>, 116103c3f08cSJerome Brunet <&clkc CLKID_GP0_PLL>; 116203c3f08cSJerome Brunet clock-names = "pclk", 116303c3f08cSJerome Brunet "mst_in0", 116403c3f08cSJerome Brunet "mst_in1", 116503c3f08cSJerome Brunet "mst_in2", 116603c3f08cSJerome Brunet "mst_in3", 116703c3f08cSJerome Brunet "mst_in4", 116803c3f08cSJerome Brunet "mst_in5", 116903c3f08cSJerome Brunet "mst_in6", 117003c3f08cSJerome Brunet "mst_in7"; 117103c3f08cSJerome Brunet 117203c3f08cSJerome Brunet resets = <&reset RESET_AUDIO>; 117303c3f08cSJerome Brunet }; 11745dc0f28fSJerome Brunet 1175c59b7fe5SJerome Brunet toddr_a: audio-controller@100 { 1176c59b7fe5SJerome Brunet compatible = "amlogic,g12a-toddr", 1177c59b7fe5SJerome Brunet "amlogic,axg-toddr"; 1178c59b7fe5SJerome Brunet reg = <0x0 0x100 0x0 0x1c>; 1179c59b7fe5SJerome Brunet #sound-dai-cells = <0>; 1180c59b7fe5SJerome Brunet sound-name-prefix = "TODDR_A"; 1181c59b7fe5SJerome Brunet interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>; 1182c59b7fe5SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_A>; 1183c59b7fe5SJerome Brunet resets = <&arb AXG_ARB_TODDR_A>; 1184c59b7fe5SJerome Brunet status = "disabled"; 1185c59b7fe5SJerome Brunet }; 1186c59b7fe5SJerome Brunet 1187c59b7fe5SJerome Brunet toddr_b: audio-controller@140 { 1188c59b7fe5SJerome Brunet compatible = "amlogic,g12a-toddr", 1189c59b7fe5SJerome Brunet "amlogic,axg-toddr"; 1190c59b7fe5SJerome Brunet reg = <0x0 0x140 0x0 0x1c>; 1191c59b7fe5SJerome Brunet #sound-dai-cells = <0>; 1192c59b7fe5SJerome Brunet sound-name-prefix = "TODDR_B"; 1193c59b7fe5SJerome Brunet interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>; 1194c59b7fe5SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_B>; 1195c59b7fe5SJerome Brunet resets = <&arb AXG_ARB_TODDR_B>; 1196c59b7fe5SJerome Brunet status = "disabled"; 1197c59b7fe5SJerome Brunet }; 1198c59b7fe5SJerome Brunet 1199c59b7fe5SJerome Brunet toddr_c: audio-controller@180 { 1200c59b7fe5SJerome Brunet compatible = "amlogic,g12a-toddr", 1201c59b7fe5SJerome Brunet "amlogic,axg-toddr"; 1202c59b7fe5SJerome Brunet reg = <0x0 0x180 0x0 0x1c>; 1203c59b7fe5SJerome Brunet #sound-dai-cells = <0>; 1204c59b7fe5SJerome Brunet sound-name-prefix = "TODDR_C"; 1205c59b7fe5SJerome Brunet interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>; 1206c59b7fe5SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_C>; 1207c59b7fe5SJerome Brunet resets = <&arb AXG_ARB_TODDR_C>; 1208c59b7fe5SJerome Brunet status = "disabled"; 1209c59b7fe5SJerome Brunet }; 1210c59b7fe5SJerome Brunet 1211c59b7fe5SJerome Brunet frddr_a: audio-controller@1c0 { 1212c59b7fe5SJerome Brunet compatible = "amlogic,g12a-frddr", 1213c59b7fe5SJerome Brunet "amlogic,axg-frddr"; 1214c59b7fe5SJerome Brunet reg = <0x0 0x1c0 0x0 0x1c>; 1215c59b7fe5SJerome Brunet #sound-dai-cells = <0>; 1216c59b7fe5SJerome Brunet sound-name-prefix = "FRDDR_A"; 1217c59b7fe5SJerome Brunet interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; 1218c59b7fe5SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 1219c59b7fe5SJerome Brunet resets = <&arb AXG_ARB_FRDDR_A>; 1220c59b7fe5SJerome Brunet status = "disabled"; 1221c59b7fe5SJerome Brunet }; 1222c59b7fe5SJerome Brunet 1223c59b7fe5SJerome Brunet frddr_b: audio-controller@200 { 1224c59b7fe5SJerome Brunet compatible = "amlogic,g12a-frddr", 1225c59b7fe5SJerome Brunet "amlogic,axg-frddr"; 1226c59b7fe5SJerome Brunet reg = <0x0 0x200 0x0 0x1c>; 1227c59b7fe5SJerome Brunet #sound-dai-cells = <0>; 1228c59b7fe5SJerome Brunet sound-name-prefix = "FRDDR_B"; 1229c59b7fe5SJerome Brunet interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>; 1230c59b7fe5SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; 1231c59b7fe5SJerome Brunet resets = <&arb AXG_ARB_FRDDR_B>; 1232c59b7fe5SJerome Brunet status = "disabled"; 1233c59b7fe5SJerome Brunet }; 1234c59b7fe5SJerome Brunet 1235c59b7fe5SJerome Brunet frddr_c: audio-controller@240 { 1236c59b7fe5SJerome Brunet compatible = "amlogic,g12a-frddr", 1237c59b7fe5SJerome Brunet "amlogic,axg-frddr"; 1238c59b7fe5SJerome Brunet reg = <0x0 0x240 0x0 0x1c>; 1239c59b7fe5SJerome Brunet #sound-dai-cells = <0>; 1240c59b7fe5SJerome Brunet sound-name-prefix = "FRDDR_C"; 1241c59b7fe5SJerome Brunet interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>; 1242c59b7fe5SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; 1243c59b7fe5SJerome Brunet resets = <&arb AXG_ARB_FRDDR_C>; 1244c59b7fe5SJerome Brunet status = "disabled"; 1245c59b7fe5SJerome Brunet }; 1246c59b7fe5SJerome Brunet 12475dc0f28fSJerome Brunet arb: reset-controller@280 { 12485dc0f28fSJerome Brunet status = "disabled"; 12495dc0f28fSJerome Brunet compatible = "amlogic,meson-axg-audio-arb"; 12505dc0f28fSJerome Brunet reg = <0x0 0x280 0x0 0x4>; 12515dc0f28fSJerome Brunet #reset-cells = <1>; 12525dc0f28fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 12535dc0f28fSJerome Brunet }; 12541ff38c86SJerome Brunet 12551ff38c86SJerome Brunet tdmin_a: audio-controller@300 { 12561ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmin", 12571ff38c86SJerome Brunet "amlogic,axg-tdmin"; 12581ff38c86SJerome Brunet reg = <0x0 0x300 0x0 0x40>; 12591ff38c86SJerome Brunet sound-name-prefix = "TDMIN_A"; 12601ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 12611ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 12621ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 12631ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 12641ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 12651ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 12661ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 12671ff38c86SJerome Brunet status = "disabled"; 12681ff38c86SJerome Brunet }; 12691ff38c86SJerome Brunet 12701ff38c86SJerome Brunet tdmin_b: audio-controller@340 { 12711ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmin", 12721ff38c86SJerome Brunet "amlogic,axg-tdmin"; 12731ff38c86SJerome Brunet reg = <0x0 0x340 0x0 0x40>; 12741ff38c86SJerome Brunet sound-name-prefix = "TDMIN_B"; 12751ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 12761ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 12771ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 12781ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 12791ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 12801ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 12811ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 12821ff38c86SJerome Brunet status = "disabled"; 12831ff38c86SJerome Brunet }; 12841ff38c86SJerome Brunet 12851ff38c86SJerome Brunet tdmin_c: audio-controller@380 { 12861ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmin", 12871ff38c86SJerome Brunet "amlogic,axg-tdmin"; 12881ff38c86SJerome Brunet reg = <0x0 0x380 0x0 0x40>; 12891ff38c86SJerome Brunet sound-name-prefix = "TDMIN_C"; 12901ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 12911ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 12921ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 12931ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 12941ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 12951ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 12961ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 12971ff38c86SJerome Brunet status = "disabled"; 12981ff38c86SJerome Brunet }; 12991ff38c86SJerome Brunet 13001ff38c86SJerome Brunet tdmin_lb: audio-controller@3c0 { 13011ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmin", 13021ff38c86SJerome Brunet "amlogic,axg-tdmin"; 13031ff38c86SJerome Brunet reg = <0x0 0x3c0 0x0 0x40>; 13041ff38c86SJerome Brunet sound-name-prefix = "TDMIN_LB"; 13051ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 13061ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 13071ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 13081ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 13091ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 13101ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 13111ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 13121ff38c86SJerome Brunet status = "disabled"; 13131ff38c86SJerome Brunet }; 13141ff38c86SJerome Brunet 13151ff38c86SJerome Brunet tdmout_a: audio-controller@500 { 13161ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmout"; 13171ff38c86SJerome Brunet reg = <0x0 0x500 0x0 0x40>; 13181ff38c86SJerome Brunet sound-name-prefix = "TDMOUT_A"; 13191ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, 13201ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, 13211ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, 13221ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, 13231ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; 13241ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 13251ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 13261ff38c86SJerome Brunet status = "disabled"; 13271ff38c86SJerome Brunet }; 13281ff38c86SJerome Brunet 13291ff38c86SJerome Brunet tdmout_b: audio-controller@540 { 13301ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmout"; 13311ff38c86SJerome Brunet reg = <0x0 0x540 0x0 0x40>; 13321ff38c86SJerome Brunet sound-name-prefix = "TDMOUT_B"; 13331ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, 13341ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, 13351ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, 13361ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, 13371ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; 13381ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 13391ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 13401ff38c86SJerome Brunet status = "disabled"; 13411ff38c86SJerome Brunet }; 13421ff38c86SJerome Brunet 13431ff38c86SJerome Brunet tdmout_c: audio-controller@580 { 13441ff38c86SJerome Brunet compatible = "amlogic,g12a-tdmout"; 13451ff38c86SJerome Brunet reg = <0x0 0x580 0x0 0x40>; 13461ff38c86SJerome Brunet sound-name-prefix = "TDMOUT_C"; 13471ff38c86SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, 13481ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, 13491ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, 13501ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, 13511ff38c86SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; 13521ff38c86SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 13531ff38c86SJerome Brunet "lrclk", "lrclk_sel"; 13541ff38c86SJerome Brunet status = "disabled"; 13551ff38c86SJerome Brunet }; 135603c3f08cSJerome Brunet }; 135703c3f08cSJerome Brunet 13589baf7d6bSNeil Armstrong usb3_pcie_phy: phy@46000 { 13599baf7d6bSNeil Armstrong compatible = "amlogic,g12a-usb3-pcie-phy"; 13609baf7d6bSNeil Armstrong reg = <0x0 0x46000 0x0 0x2000>; 13619baf7d6bSNeil Armstrong clocks = <&clkc CLKID_PCIE_PLL>; 13629baf7d6bSNeil Armstrong clock-names = "ref_clk"; 13639baf7d6bSNeil Armstrong resets = <&reset RESET_PCIE_PHY>; 13649baf7d6bSNeil Armstrong reset-names = "phy"; 13659baf7d6bSNeil Armstrong assigned-clocks = <&clkc CLKID_PCIE_PLL>; 13669baf7d6bSNeil Armstrong assigned-clock-rates = <100000000>; 13679baf7d6bSNeil Armstrong #phy-cells = <1>; 13689baf7d6bSNeil Armstrong }; 13699c8c52f7SJianxin Pan }; 13709c8c52f7SJianxin Pan 13719c8c52f7SJianxin Pan aobus: bus@ff800000 { 13729c8c52f7SJianxin Pan compatible = "simple-bus"; 13739c8c52f7SJianxin Pan reg = <0x0 0xff800000 0x0 0x100000>; 13749c8c52f7SJianxin Pan #address-cells = <2>; 13759c8c52f7SJianxin Pan #size-cells = <2>; 13769c8c52f7SJianxin Pan ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; 13779c8c52f7SJianxin Pan 1378b019f4a4SNeil Armstrong rti: sys-ctrl@0 { 1379b019f4a4SNeil Armstrong compatible = "amlogic,meson-gx-ao-sysctrl", 1380b019f4a4SNeil Armstrong "simple-mfd", "syscon"; 1381b019f4a4SNeil Armstrong reg = <0x0 0x0 0x0 0x100>; 1382b019f4a4SNeil Armstrong #address-cells = <2>; 1383b019f4a4SNeil Armstrong #size-cells = <2>; 1384b019f4a4SNeil Armstrong ranges = <0x0 0x0 0x0 0x0 0x0 0x100>; 1385b019f4a4SNeil Armstrong 1386b019f4a4SNeil Armstrong clkc_AO: clock-controller { 1387b019f4a4SNeil Armstrong compatible = "amlogic,meson-g12a-aoclkc"; 1388b019f4a4SNeil Armstrong #clock-cells = <1>; 1389b019f4a4SNeil Armstrong #reset-cells = <1>; 1390b019f4a4SNeil Armstrong clocks = <&xtal>, <&clkc CLKID_CLK81>; 1391b019f4a4SNeil Armstrong clock-names = "xtal", "mpeg-clk"; 1392b019f4a4SNeil Armstrong }; 139311a7bea1SJerome Brunet 1394083feecdSNeil Armstrong pwrc_vpu: power-controller-vpu { 1395083feecdSNeil Armstrong compatible = "amlogic,meson-g12a-pwrc-vpu"; 1396083feecdSNeil Armstrong #power-domain-cells = <0>; 1397083feecdSNeil Armstrong amlogic,hhi-sysctrl = <&hhi>; 1398083feecdSNeil Armstrong resets = <&reset RESET_VIU>, 1399083feecdSNeil Armstrong <&reset RESET_VENC>, 1400083feecdSNeil Armstrong <&reset RESET_VCBUS>, 1401083feecdSNeil Armstrong <&reset RESET_BT656>, 1402083feecdSNeil Armstrong <&reset RESET_RDMA>, 1403083feecdSNeil Armstrong <&reset RESET_VENCI>, 1404083feecdSNeil Armstrong <&reset RESET_VENCP>, 1405083feecdSNeil Armstrong <&reset RESET_VDAC>, 1406083feecdSNeil Armstrong <&reset RESET_VDI6>, 1407083feecdSNeil Armstrong <&reset RESET_VENCL>, 1408083feecdSNeil Armstrong <&reset RESET_VID_LOCK>; 1409083feecdSNeil Armstrong clocks = <&clkc CLKID_VPU>, 1410083feecdSNeil Armstrong <&clkc CLKID_VAPB>; 1411083feecdSNeil Armstrong clock-names = "vpu", "vapb"; 1412083feecdSNeil Armstrong /* 1413083feecdSNeil Armstrong * VPU clocking is provided by two identical clock paths 1414083feecdSNeil Armstrong * VPU_0 and VPU_1 muxed to a single clock by a glitch 1415083feecdSNeil Armstrong * free mux to safely change frequency while running. 1416083feecdSNeil Armstrong * Same for VAPB but with a final gate after the glitch free mux. 1417083feecdSNeil Armstrong */ 1418083feecdSNeil Armstrong assigned-clocks = <&clkc CLKID_VPU_0_SEL>, 1419083feecdSNeil Armstrong <&clkc CLKID_VPU_0>, 1420083feecdSNeil Armstrong <&clkc CLKID_VPU>, /* Glitch free mux */ 1421083feecdSNeil Armstrong <&clkc CLKID_VAPB_0_SEL>, 1422083feecdSNeil Armstrong <&clkc CLKID_VAPB_0>, 1423083feecdSNeil Armstrong <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ 1424083feecdSNeil Armstrong assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, 1425083feecdSNeil Armstrong <0>, /* Do Nothing */ 1426083feecdSNeil Armstrong <&clkc CLKID_VPU_0>, 1427083feecdSNeil Armstrong <&clkc CLKID_FCLK_DIV4>, 1428083feecdSNeil Armstrong <0>, /* Do Nothing */ 1429083feecdSNeil Armstrong <&clkc CLKID_VAPB_0>; 1430083feecdSNeil Armstrong assigned-clock-rates = <0>, /* Do Nothing */ 1431083feecdSNeil Armstrong <666666666>, 1432083feecdSNeil Armstrong <0>, /* Do Nothing */ 1433083feecdSNeil Armstrong <0>, /* Do Nothing */ 1434083feecdSNeil Armstrong <250000000>, 1435083feecdSNeil Armstrong <0>; /* Do Nothing */ 1436083feecdSNeil Armstrong }; 1437083feecdSNeil Armstrong 143811a7bea1SJerome Brunet ao_pinctrl: pinctrl@14 { 143911a7bea1SJerome Brunet compatible = "amlogic,meson-g12a-aobus-pinctrl"; 144011a7bea1SJerome Brunet #address-cells = <2>; 144111a7bea1SJerome Brunet #size-cells = <2>; 144211a7bea1SJerome Brunet ranges; 144311a7bea1SJerome Brunet 144411a7bea1SJerome Brunet gpio_ao: bank@14 { 144511a7bea1SJerome Brunet reg = <0x0 0x14 0x0 0x8>, 144611a7bea1SJerome Brunet <0x0 0x1c 0x0 0x8>, 144711a7bea1SJerome Brunet <0x0 0x24 0x0 0x14>; 144811a7bea1SJerome Brunet reg-names = "mux", 144911a7bea1SJerome Brunet "ds", 145011a7bea1SJerome Brunet "gpio"; 145111a7bea1SJerome Brunet gpio-controller; 145211a7bea1SJerome Brunet #gpio-cells = <2>; 145311a7bea1SJerome Brunet gpio-ranges = <&ao_pinctrl 0 0 15>; 145411a7bea1SJerome Brunet }; 1455e92546c2SJerome Brunet 14569951aca6SGuillaume La Roque i2c_ao_sck_pins: i2c_ao_sck_pins { 14579951aca6SGuillaume La Roque mux { 14589951aca6SGuillaume La Roque groups = "i2c_ao_sck"; 14599951aca6SGuillaume La Roque function = "i2c_ao"; 14609951aca6SGuillaume La Roque bias-disable; 14619951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 14629951aca6SGuillaume La Roque }; 14639951aca6SGuillaume La Roque }; 14649951aca6SGuillaume La Roque 14659951aca6SGuillaume La Roque i2c_ao_sda_pins: i2c_ao_sda { 14669951aca6SGuillaume La Roque mux { 14679951aca6SGuillaume La Roque groups = "i2c_ao_sda"; 14689951aca6SGuillaume La Roque function = "i2c_ao"; 14699951aca6SGuillaume La Roque bias-disable; 14709951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 14719951aca6SGuillaume La Roque }; 14729951aca6SGuillaume La Roque }; 14739951aca6SGuillaume La Roque 14749951aca6SGuillaume La Roque i2c_ao_sck_e_pins: i2c_ao_sck_e { 14759951aca6SGuillaume La Roque mux { 14769951aca6SGuillaume La Roque groups = "i2c_ao_sck_e"; 14779951aca6SGuillaume La Roque function = "i2c_ao"; 14789951aca6SGuillaume La Roque bias-disable; 14799951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 14809951aca6SGuillaume La Roque }; 14819951aca6SGuillaume La Roque }; 14829951aca6SGuillaume La Roque 14839951aca6SGuillaume La Roque i2c_ao_sda_e_pins: i2c_ao_sda_e { 14849951aca6SGuillaume La Roque mux { 14859951aca6SGuillaume La Roque groups = "i2c_ao_sda_e"; 14869951aca6SGuillaume La Roque function = "i2c_ao"; 14879951aca6SGuillaume La Roque bias-disable; 14889951aca6SGuillaume La Roque drive-strength-microamp = <3000>; 14899951aca6SGuillaume La Roque }; 14909951aca6SGuillaume La Roque }; 14919951aca6SGuillaume La Roque 14921ff38c86SJerome Brunet mclk0_ao_pins: mclk0-ao { 14931ff38c86SJerome Brunet mux { 14941ff38c86SJerome Brunet groups = "mclk0_ao"; 14951ff38c86SJerome Brunet function = "mclk0_ao"; 14961ff38c86SJerome Brunet bias-disable; 14971ff38c86SJerome Brunet drive-strength-microamp = <3000>; 14981ff38c86SJerome Brunet }; 14991ff38c86SJerome Brunet }; 15001ff38c86SJerome Brunet 15011ff38c86SJerome Brunet tdm_ao_b_din0_pins: tdm-ao-b-din0 { 15021ff38c86SJerome Brunet mux { 15031ff38c86SJerome Brunet groups = "tdm_ao_b_din0"; 15041ff38c86SJerome Brunet function = "tdm_ao_b"; 15051ff38c86SJerome Brunet bias-disable; 15061ff38c86SJerome Brunet }; 15071ff38c86SJerome Brunet }; 15081ff38c86SJerome Brunet 15091ff38c86SJerome Brunet tdm_ao_b_din1_pins: tdm-ao-b-din1 { 15101ff38c86SJerome Brunet mux { 15111ff38c86SJerome Brunet groups = "tdm_ao_b_din1"; 15121ff38c86SJerome Brunet function = "tdm_ao_b"; 15131ff38c86SJerome Brunet bias-disable; 15141ff38c86SJerome Brunet }; 15151ff38c86SJerome Brunet }; 15161ff38c86SJerome Brunet 15171ff38c86SJerome Brunet tdm_ao_b_din2_pins: tdm-ao-b-din2 { 15181ff38c86SJerome Brunet mux { 15191ff38c86SJerome Brunet groups = "tdm_ao_b_din2"; 15201ff38c86SJerome Brunet function = "tdm_ao_b"; 15211ff38c86SJerome Brunet bias-disable; 15221ff38c86SJerome Brunet }; 15231ff38c86SJerome Brunet }; 15241ff38c86SJerome Brunet 15251ff38c86SJerome Brunet tdm_ao_b_dout0_pins: tdm-ao-b-dout0 { 15261ff38c86SJerome Brunet mux { 15271ff38c86SJerome Brunet groups = "tdm_ao_b_dout0"; 15281ff38c86SJerome Brunet function = "tdm_ao_b"; 15291ff38c86SJerome Brunet bias-disable; 15301ff38c86SJerome Brunet drive-strength-microamp = <3000>; 15311ff38c86SJerome Brunet }; 15321ff38c86SJerome Brunet }; 15331ff38c86SJerome Brunet 15341ff38c86SJerome Brunet tdm_ao_b_dout1_pins: tdm-ao-b-dout1 { 15351ff38c86SJerome Brunet mux { 15361ff38c86SJerome Brunet groups = "tdm_ao_b_dout1"; 15371ff38c86SJerome Brunet function = "tdm_ao_b"; 15381ff38c86SJerome Brunet bias-disable; 15391ff38c86SJerome Brunet drive-strength-microamp = <3000>; 15401ff38c86SJerome Brunet }; 15411ff38c86SJerome Brunet }; 15421ff38c86SJerome Brunet 15431ff38c86SJerome Brunet tdm_ao_b_dout2_pins: tdm-ao-b-dout2 { 15441ff38c86SJerome Brunet mux { 15451ff38c86SJerome Brunet groups = "tdm_ao_b_dout2"; 15461ff38c86SJerome Brunet function = "tdm_ao_b"; 15471ff38c86SJerome Brunet bias-disable; 15481ff38c86SJerome Brunet drive-strength-microamp = <3000>; 15491ff38c86SJerome Brunet }; 15501ff38c86SJerome Brunet }; 15511ff38c86SJerome Brunet 15521ff38c86SJerome Brunet tdm_ao_b_fs_pins: tdm-ao-b-fs { 15531ff38c86SJerome Brunet mux { 15541ff38c86SJerome Brunet groups = "tdm_ao_b_fs"; 15551ff38c86SJerome Brunet function = "tdm_ao_b"; 15561ff38c86SJerome Brunet bias-disable; 15571ff38c86SJerome Brunet drive-strength-microamp = <3000>; 15581ff38c86SJerome Brunet }; 15591ff38c86SJerome Brunet }; 15601ff38c86SJerome Brunet 15611ff38c86SJerome Brunet tdm_ao_b_sclk_pins: tdm-ao-b-sclk { 15621ff38c86SJerome Brunet mux { 15631ff38c86SJerome Brunet groups = "tdm_ao_b_sclk"; 15641ff38c86SJerome Brunet function = "tdm_ao_b"; 15651ff38c86SJerome Brunet bias-disable; 15661ff38c86SJerome Brunet drive-strength-microamp = <3000>; 15671ff38c86SJerome Brunet }; 15681ff38c86SJerome Brunet }; 15691ff38c86SJerome Brunet 15701ff38c86SJerome Brunet tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs { 15711ff38c86SJerome Brunet mux { 15721ff38c86SJerome Brunet groups = "tdm_ao_b_slv_fs"; 15731ff38c86SJerome Brunet function = "tdm_ao_b"; 15741ff38c86SJerome Brunet bias-disable; 15751ff38c86SJerome Brunet }; 15761ff38c86SJerome Brunet }; 15771ff38c86SJerome Brunet 15781ff38c86SJerome Brunet tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk { 15791ff38c86SJerome Brunet mux { 15801ff38c86SJerome Brunet groups = "tdm_ao_b_slv_sclk"; 15811ff38c86SJerome Brunet function = "tdm_ao_b"; 15821ff38c86SJerome Brunet bias-disable; 15831ff38c86SJerome Brunet }; 15841ff38c86SJerome Brunet }; 15851ff38c86SJerome Brunet 1586e92546c2SJerome Brunet uart_ao_a_pins: uart-a-ao { 1587e92546c2SJerome Brunet mux { 1588e92546c2SJerome Brunet groups = "uart_ao_a_tx", 1589e92546c2SJerome Brunet "uart_ao_a_rx"; 1590e92546c2SJerome Brunet function = "uart_ao_a"; 1591e92546c2SJerome Brunet bias-disable; 1592e92546c2SJerome Brunet }; 1593e92546c2SJerome Brunet }; 1594e92546c2SJerome Brunet 1595e92546c2SJerome Brunet uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts { 1596e92546c2SJerome Brunet mux { 1597e92546c2SJerome Brunet groups = "uart_ao_a_cts", 1598e92546c2SJerome Brunet "uart_ao_a_rts"; 1599e92546c2SJerome Brunet function = "uart_ao_a"; 1600e92546c2SJerome Brunet bias-disable; 1601e92546c2SJerome Brunet }; 1602e92546c2SJerome Brunet }; 1603bb23b125SNeil Armstrong 1604bb23b125SNeil Armstrong pwm_ao_a_pins: pwm-ao-a { 1605bb23b125SNeil Armstrong mux { 1606bb23b125SNeil Armstrong groups = "pwm_ao_a"; 1607bb23b125SNeil Armstrong function = "pwm_ao_a"; 1608bb23b125SNeil Armstrong bias-disable; 1609bb23b125SNeil Armstrong }; 1610bb23b125SNeil Armstrong }; 1611bb23b125SNeil Armstrong 1612bb23b125SNeil Armstrong pwm_ao_b_pins: pwm-ao-b { 1613bb23b125SNeil Armstrong mux { 1614bb23b125SNeil Armstrong groups = "pwm_ao_b"; 1615bb23b125SNeil Armstrong function = "pwm_ao_b"; 1616bb23b125SNeil Armstrong bias-disable; 1617bb23b125SNeil Armstrong }; 1618bb23b125SNeil Armstrong }; 1619bb23b125SNeil Armstrong 1620bb23b125SNeil Armstrong pwm_ao_c_4_pins: pwm-ao-c-4 { 1621bb23b125SNeil Armstrong mux { 1622bb23b125SNeil Armstrong groups = "pwm_ao_c_4"; 1623bb23b125SNeil Armstrong function = "pwm_ao_c"; 1624bb23b125SNeil Armstrong bias-disable; 1625bb23b125SNeil Armstrong }; 1626bb23b125SNeil Armstrong }; 1627bb23b125SNeil Armstrong 1628bb23b125SNeil Armstrong pwm_ao_c_6_pins: pwm-ao-c-6 { 1629bb23b125SNeil Armstrong mux { 1630bb23b125SNeil Armstrong groups = "pwm_ao_c_6"; 1631bb23b125SNeil Armstrong function = "pwm_ao_c"; 1632bb23b125SNeil Armstrong bias-disable; 1633bb23b125SNeil Armstrong }; 1634bb23b125SNeil Armstrong }; 1635bb23b125SNeil Armstrong 1636bb23b125SNeil Armstrong pwm_ao_d_5_pins: pwm-ao-d-5 { 1637bb23b125SNeil Armstrong mux { 1638bb23b125SNeil Armstrong groups = "pwm_ao_d_5"; 1639bb23b125SNeil Armstrong function = "pwm_ao_d"; 1640bb23b125SNeil Armstrong bias-disable; 1641bb23b125SNeil Armstrong }; 1642bb23b125SNeil Armstrong }; 1643bb23b125SNeil Armstrong 1644bb23b125SNeil Armstrong pwm_ao_d_10_pins: pwm-ao-d-10 { 1645bb23b125SNeil Armstrong mux { 1646bb23b125SNeil Armstrong groups = "pwm_ao_d_10"; 1647bb23b125SNeil Armstrong function = "pwm_ao_d"; 1648bb23b125SNeil Armstrong bias-disable; 1649bb23b125SNeil Armstrong }; 1650bb23b125SNeil Armstrong }; 1651bb23b125SNeil Armstrong 1652bb23b125SNeil Armstrong pwm_ao_d_e_pins: pwm-ao-d-e { 1653bb23b125SNeil Armstrong mux { 1654bb23b125SNeil Armstrong groups = "pwm_ao_d_e"; 1655bb23b125SNeil Armstrong function = "pwm_ao_d"; 16562bfe8412SNeil Armstrong }; 16572bfe8412SNeil Armstrong }; 16582bfe8412SNeil Armstrong 16592bfe8412SNeil Armstrong remote_input_ao_pins: remote-input-ao { 16602bfe8412SNeil Armstrong mux { 16612bfe8412SNeil Armstrong groups = "remote_ao_input"; 16622bfe8412SNeil Armstrong function = "remote_ao_input"; 1663bb23b125SNeil Armstrong bias-disable; 1664bb23b125SNeil Armstrong }; 1665bb23b125SNeil Armstrong }; 166611a7bea1SJerome Brunet }; 1667b019f4a4SNeil Armstrong }; 1668b019f4a4SNeil Armstrong 166991516e54SNeil Armstrong cec_AO: cec@100 { 167091516e54SNeil Armstrong compatible = "amlogic,meson-gx-ao-cec"; 167191516e54SNeil Armstrong reg = <0x0 0x00100 0x0 0x14>; 167291516e54SNeil Armstrong interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>; 167391516e54SNeil Armstrong clocks = <&clkc_AO CLKID_AO_CEC>; 167491516e54SNeil Armstrong clock-names = "core"; 167591516e54SNeil Armstrong status = "disabled"; 167691516e54SNeil Armstrong }; 167791516e54SNeil Armstrong 16780fa724c5SNeil Armstrong sec_AO: ao-secure@140 { 16790fa724c5SNeil Armstrong compatible = "amlogic,meson-gx-ao-secure", "syscon"; 16800fa724c5SNeil Armstrong reg = <0x0 0x140 0x0 0x140>; 16810fa724c5SNeil Armstrong amlogic,has-chip-id; 16820fa724c5SNeil Armstrong }; 16830fa724c5SNeil Armstrong 168491516e54SNeil Armstrong cecb_AO: cec@280 { 168591516e54SNeil Armstrong compatible = "amlogic,meson-g12a-ao-cec"; 168691516e54SNeil Armstrong reg = <0x0 0x00280 0x0 0x1c>; 168791516e54SNeil Armstrong interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>; 168891516e54SNeil Armstrong clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>; 168991516e54SNeil Armstrong clock-names = "oscin"; 169091516e54SNeil Armstrong status = "disabled"; 169191516e54SNeil Armstrong }; 169291516e54SNeil Armstrong 1693bb23b125SNeil Armstrong pwm_AO_cd: pwm@2000 { 1694bb23b125SNeil Armstrong compatible = "amlogic,meson-g12a-ao-pwm-cd"; 1695bb23b125SNeil Armstrong reg = <0x0 0x2000 0x0 0x20>; 1696bb23b125SNeil Armstrong #pwm-cells = <3>; 1697bb23b125SNeil Armstrong status = "disabled"; 1698bb23b125SNeil Armstrong }; 1699bb23b125SNeil Armstrong 17009c8c52f7SJianxin Pan uart_AO: serial@3000 { 1701503f5fedSJerome Brunet compatible = "amlogic,meson-gx-uart", 1702503f5fedSJerome Brunet "amlogic,meson-ao-uart"; 17039c8c52f7SJianxin Pan reg = <0x0 0x3000 0x0 0x18>; 17049c8c52f7SJianxin Pan interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 17059a690907SJerome Brunet clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>; 17069c8c52f7SJianxin Pan clock-names = "xtal", "pclk", "baud"; 17079c8c52f7SJianxin Pan status = "disabled"; 17089c8c52f7SJianxin Pan }; 17099c8c52f7SJianxin Pan 17109c8c52f7SJianxin Pan uart_AO_B: serial@4000 { 1711503f5fedSJerome Brunet compatible = "amlogic,meson-gx-uart", 1712503f5fedSJerome Brunet "amlogic,meson-ao-uart"; 17139c8c52f7SJianxin Pan reg = <0x0 0x4000 0x0 0x18>; 17149c8c52f7SJianxin Pan interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 17159a690907SJerome Brunet clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; 17169c8c52f7SJianxin Pan clock-names = "xtal", "pclk", "baud"; 17179c8c52f7SJianxin Pan status = "disabled"; 17189c8c52f7SJianxin Pan }; 1719820873cfSNeil Armstrong 17209951aca6SGuillaume La Roque i2c_AO: i2c@5000 { 17219951aca6SGuillaume La Roque compatible = "amlogic,meson-axg-i2c"; 17229951aca6SGuillaume La Roque status = "disabled"; 17239951aca6SGuillaume La Roque reg = <0x0 0x05000 0x0 0x20>; 17249951aca6SGuillaume La Roque interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 17259951aca6SGuillaume La Roque #address-cells = <1>; 17269951aca6SGuillaume La Roque #size-cells = <0>; 17279951aca6SGuillaume La Roque clocks = <&clkc CLKID_I2C>; 17289951aca6SGuillaume La Roque }; 17299951aca6SGuillaume La Roque 1730bb23b125SNeil Armstrong pwm_AO_ab: pwm@7000 { 1731bb23b125SNeil Armstrong compatible = "amlogic,meson-g12a-ao-pwm-ab"; 1732bb23b125SNeil Armstrong reg = <0x0 0x7000 0x0 0x20>; 1733bb23b125SNeil Armstrong #pwm-cells = <3>; 1734bb23b125SNeil Armstrong status = "disabled"; 1735bb23b125SNeil Armstrong }; 1736bb23b125SNeil Armstrong 17372bfe8412SNeil Armstrong ir: ir@8000 { 17382bfe8412SNeil Armstrong compatible = "amlogic,meson-gxbb-ir"; 17392bfe8412SNeil Armstrong reg = <0x0 0x8000 0x0 0x20>; 17402bfe8412SNeil Armstrong interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 17412bfe8412SNeil Armstrong status = "disabled"; 17422bfe8412SNeil Armstrong }; 17432bfe8412SNeil Armstrong 1744820873cfSNeil Armstrong saradc: adc@9000 { 1745820873cfSNeil Armstrong compatible = "amlogic,meson-g12a-saradc", 1746820873cfSNeil Armstrong "amlogic,meson-saradc"; 1747820873cfSNeil Armstrong reg = <0x0 0x9000 0x0 0x48>; 1748820873cfSNeil Armstrong #io-channel-cells = <1>; 1749820873cfSNeil Armstrong interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>; 1750820873cfSNeil Armstrong clocks = <&xtal>, 1751820873cfSNeil Armstrong <&clkc_AO CLKID_AO_SAR_ADC>, 1752820873cfSNeil Armstrong <&clkc_AO CLKID_AO_SAR_ADC_CLK>, 1753820873cfSNeil Armstrong <&clkc_AO CLKID_AO_SAR_ADC_SEL>; 1754820873cfSNeil Armstrong clock-names = "clkin", "core", "adc_clk", "adc_sel"; 1755820873cfSNeil Armstrong status = "disabled"; 1756820873cfSNeil Armstrong }; 17579c8c52f7SJianxin Pan }; 17589c8c52f7SJianxin Pan 1759083feecdSNeil Armstrong vpu: vpu@ff900000 { 1760083feecdSNeil Armstrong compatible = "amlogic,meson-g12a-vpu"; 1761083feecdSNeil Armstrong reg = <0x0 0xff900000 0x0 0x100000>, 1762083feecdSNeil Armstrong <0x0 0xff63c000 0x0 0x1000>; 1763083feecdSNeil Armstrong reg-names = "vpu", "hhi"; 1764083feecdSNeil Armstrong interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; 1765083feecdSNeil Armstrong #address-cells = <1>; 1766083feecdSNeil Armstrong #size-cells = <0>; 1767083feecdSNeil Armstrong amlogic,canvas = <&canvas>; 1768083feecdSNeil Armstrong power-domains = <&pwrc_vpu>; 1769083feecdSNeil Armstrong 1770083feecdSNeil Armstrong /* CVBS VDAC output port */ 1771083feecdSNeil Armstrong cvbs_vdac_port: port@0 { 1772083feecdSNeil Armstrong reg = <0>; 1773083feecdSNeil Armstrong }; 1774083feecdSNeil Armstrong 1775083feecdSNeil Armstrong /* HDMI-TX output port */ 1776083feecdSNeil Armstrong hdmi_tx_port: port@1 { 1777083feecdSNeil Armstrong reg = <1>; 1778083feecdSNeil Armstrong 1779083feecdSNeil Armstrong hdmi_tx_out: endpoint { 1780083feecdSNeil Armstrong remote-endpoint = <&hdmi_tx_in>; 1781083feecdSNeil Armstrong }; 1782083feecdSNeil Armstrong }; 1783083feecdSNeil Armstrong }; 1784083feecdSNeil Armstrong 17859c8c52f7SJianxin Pan gic: interrupt-controller@ffc01000 { 17869c8c52f7SJianxin Pan compatible = "arm,gic-400"; 17879c8c52f7SJianxin Pan reg = <0x0 0xffc01000 0 0x1000>, 17889c8c52f7SJianxin Pan <0x0 0xffc02000 0 0x2000>, 17899c8c52f7SJianxin Pan <0x0 0xffc04000 0 0x2000>, 17909c8c52f7SJianxin Pan <0x0 0xffc06000 0 0x2000>; 17919c8c52f7SJianxin Pan interrupt-controller; 17929c8c52f7SJianxin Pan interrupts = <GIC_PPI 9 17939c8c52f7SJianxin Pan (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 17949c8c52f7SJianxin Pan #interrupt-cells = <3>; 17959c8c52f7SJianxin Pan #address-cells = <0>; 17969c8c52f7SJianxin Pan }; 17979c8c52f7SJianxin Pan 17989c8c52f7SJianxin Pan cbus: bus@ffd00000 { 17999c8c52f7SJianxin Pan compatible = "simple-bus"; 1800503f5fedSJerome Brunet reg = <0x0 0xffd00000 0x0 0x100000>; 18019c8c52f7SJianxin Pan #address-cells = <2>; 18029c8c52f7SJianxin Pan #size-cells = <2>; 1803503f5fedSJerome Brunet ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>; 18049c8c52f7SJianxin Pan 18057ab41c47SJerome Brunet reset: reset-controller@1004 { 18067ab41c47SJerome Brunet compatible = "amlogic,meson-g12a-reset", 18077ab41c47SJerome Brunet "amlogic,meson-axg-reset"; 18087ab41c47SJerome Brunet reg = <0x0 0x1004 0x0 0x9c>; 18097ab41c47SJerome Brunet #reset-cells = <1>; 18107ab41c47SJerome Brunet }; 18117ab41c47SJerome Brunet 1812bb23b125SNeil Armstrong pwm_ef: pwm@19000 { 1813bb23b125SNeil Armstrong compatible = "amlogic,meson-g12a-ee-pwm"; 1814bb23b125SNeil Armstrong reg = <0x0 0x19000 0x0 0x20>; 1815bb23b125SNeil Armstrong #pwm-cells = <3>; 1816bb23b125SNeil Armstrong status = "disabled"; 1817bb23b125SNeil Armstrong }; 1818bb23b125SNeil Armstrong 1819bb23b125SNeil Armstrong pwm_cd: pwm@1a000 { 1820bb23b125SNeil Armstrong compatible = "amlogic,meson-g12a-ee-pwm"; 1821bb23b125SNeil Armstrong reg = <0x0 0x1a000 0x0 0x20>; 1822bb23b125SNeil Armstrong #pwm-cells = <3>; 1823bb23b125SNeil Armstrong status = "disabled"; 1824bb23b125SNeil Armstrong }; 1825bb23b125SNeil Armstrong 1826bb23b125SNeil Armstrong pwm_ab: pwm@1b000 { 1827bb23b125SNeil Armstrong compatible = "amlogic,meson-g12a-ee-pwm"; 1828bb23b125SNeil Armstrong reg = <0x0 0x1b000 0x0 0x20>; 1829bb23b125SNeil Armstrong #pwm-cells = <3>; 1830bb23b125SNeil Armstrong status = "disabled"; 1831bb23b125SNeil Armstrong }; 1832bb23b125SNeil Armstrong 18339951aca6SGuillaume La Roque i2c3: i2c@1c000 { 18349951aca6SGuillaume La Roque compatible = "amlogic,meson-axg-i2c"; 18359951aca6SGuillaume La Roque status = "disabled"; 18369951aca6SGuillaume La Roque reg = <0x0 0x1c000 0x0 0x20>; 18379951aca6SGuillaume La Roque interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; 18389951aca6SGuillaume La Roque #address-cells = <1>; 18399951aca6SGuillaume La Roque #size-cells = <0>; 18409951aca6SGuillaume La Roque clocks = <&clkc CLKID_I2C>; 18419951aca6SGuillaume La Roque }; 18429951aca6SGuillaume La Roque 18439951aca6SGuillaume La Roque i2c2: i2c@1d000 { 18449951aca6SGuillaume La Roque compatible = "amlogic,meson-axg-i2c"; 18459951aca6SGuillaume La Roque status = "disabled"; 18469951aca6SGuillaume La Roque reg = <0x0 0x1d000 0x0 0x20>; 18479951aca6SGuillaume La Roque interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 18489951aca6SGuillaume La Roque #address-cells = <1>; 18499951aca6SGuillaume La Roque #size-cells = <0>; 18509951aca6SGuillaume La Roque clocks = <&clkc CLKID_I2C>; 18519951aca6SGuillaume La Roque }; 18529951aca6SGuillaume La Roque 18539951aca6SGuillaume La Roque i2c1: i2c@1e000 { 18549951aca6SGuillaume La Roque compatible = "amlogic,meson-axg-i2c"; 18559951aca6SGuillaume La Roque status = "disabled"; 18569951aca6SGuillaume La Roque reg = <0x0 0x1e000 0x0 0x20>; 18579951aca6SGuillaume La Roque interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 18589951aca6SGuillaume La Roque #address-cells = <1>; 18599951aca6SGuillaume La Roque #size-cells = <0>; 18609951aca6SGuillaume La Roque clocks = <&clkc CLKID_I2C>; 18619951aca6SGuillaume La Roque }; 18629951aca6SGuillaume La Roque 18639951aca6SGuillaume La Roque i2c0: i2c@1f000 { 18649951aca6SGuillaume La Roque compatible = "amlogic,meson-axg-i2c"; 18659951aca6SGuillaume La Roque status = "disabled"; 18669951aca6SGuillaume La Roque reg = <0x0 0x1f000 0x0 0x20>; 18679951aca6SGuillaume La Roque interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 18689951aca6SGuillaume La Roque #address-cells = <1>; 18699951aca6SGuillaume La Roque #size-cells = <0>; 18709951aca6SGuillaume La Roque clocks = <&clkc CLKID_I2C>; 18719951aca6SGuillaume La Roque }; 18729951aca6SGuillaume La Roque 187360d4fdb8SJerome Brunet clk_msr: clock-measure@18000 { 187460d4fdb8SJerome Brunet compatible = "amlogic,meson-g12a-clk-measure"; 187560d4fdb8SJerome Brunet reg = <0x0 0x18000 0x0 0x10>; 187660d4fdb8SJerome Brunet }; 1877ff4f8b6cSNeil Armstrong 1878ff4f8b6cSNeil Armstrong uart_C: serial@22000 { 1879ff4f8b6cSNeil Armstrong compatible = "amlogic,meson-gx-uart"; 1880ff4f8b6cSNeil Armstrong reg = <0x0 0x22000 0x0 0x18>; 1881ff4f8b6cSNeil Armstrong interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; 1882ff4f8b6cSNeil Armstrong clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; 1883ff4f8b6cSNeil Armstrong clock-names = "xtal", "pclk", "baud"; 1884ff4f8b6cSNeil Armstrong status = "disabled"; 1885ff4f8b6cSNeil Armstrong }; 1886ff4f8b6cSNeil Armstrong 1887ff4f8b6cSNeil Armstrong uart_B: serial@23000 { 1888ff4f8b6cSNeil Armstrong compatible = "amlogic,meson-gx-uart"; 1889ff4f8b6cSNeil Armstrong reg = <0x0 0x23000 0x0 0x18>; 1890ff4f8b6cSNeil Armstrong interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 1891ff4f8b6cSNeil Armstrong clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; 1892ff4f8b6cSNeil Armstrong clock-names = "xtal", "pclk", "baud"; 1893ff4f8b6cSNeil Armstrong status = "disabled"; 1894ff4f8b6cSNeil Armstrong }; 1895ff4f8b6cSNeil Armstrong 1896ff4f8b6cSNeil Armstrong uart_A: serial@24000 { 1897ff4f8b6cSNeil Armstrong compatible = "amlogic,meson-gx-uart"; 1898ff4f8b6cSNeil Armstrong reg = <0x0 0x24000 0x0 0x18>; 1899ff4f8b6cSNeil Armstrong interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 1900ff4f8b6cSNeil Armstrong clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; 1901ff4f8b6cSNeil Armstrong clock-names = "xtal", "pclk", "baud"; 1902ff4f8b6cSNeil Armstrong status = "disabled"; 1903ff4f8b6cSNeil Armstrong }; 19049c8c52f7SJianxin Pan }; 19059baf7d6bSNeil Armstrong 19064759fd87SJerome Brunet sd_emmc_b: sd@ffe05000 { 19074759fd87SJerome Brunet compatible = "amlogic,meson-axg-mmc"; 19084759fd87SJerome Brunet reg = <0x0 0xffe05000 0x0 0x800>; 19094759fd87SJerome Brunet interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>; 19104759fd87SJerome Brunet status = "disabled"; 19114759fd87SJerome Brunet clocks = <&clkc CLKID_SD_EMMC_B>, 19124759fd87SJerome Brunet <&clkc CLKID_SD_EMMC_B_CLK0>, 19134759fd87SJerome Brunet <&clkc CLKID_FCLK_DIV2>; 19144759fd87SJerome Brunet clock-names = "core", "clkin0", "clkin1"; 19154759fd87SJerome Brunet resets = <&reset RESET_SD_EMMC_B>; 19164759fd87SJerome Brunet }; 19174759fd87SJerome Brunet 19184759fd87SJerome Brunet sd_emmc_c: mmc@ffe07000 { 19194759fd87SJerome Brunet compatible = "amlogic,meson-axg-mmc"; 19204759fd87SJerome Brunet reg = <0x0 0xffe07000 0x0 0x800>; 19214759fd87SJerome Brunet interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>; 19224759fd87SJerome Brunet status = "disabled"; 19234759fd87SJerome Brunet clocks = <&clkc CLKID_SD_EMMC_C>, 19244759fd87SJerome Brunet <&clkc CLKID_SD_EMMC_C_CLK0>, 19254759fd87SJerome Brunet <&clkc CLKID_FCLK_DIV2>; 19264759fd87SJerome Brunet clock-names = "core", "clkin0", "clkin1"; 19274759fd87SJerome Brunet resets = <&reset RESET_SD_EMMC_C>; 19284759fd87SJerome Brunet }; 19294759fd87SJerome Brunet 19309baf7d6bSNeil Armstrong usb: usb@ffe09000 { 19319baf7d6bSNeil Armstrong status = "disabled"; 19329baf7d6bSNeil Armstrong compatible = "amlogic,meson-g12a-usb-ctrl"; 19339baf7d6bSNeil Armstrong reg = <0x0 0xffe09000 0x0 0xa0>; 19349baf7d6bSNeil Armstrong interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 19359baf7d6bSNeil Armstrong #address-cells = <2>; 19369baf7d6bSNeil Armstrong #size-cells = <2>; 19379baf7d6bSNeil Armstrong ranges; 19389baf7d6bSNeil Armstrong 19399baf7d6bSNeil Armstrong clocks = <&clkc CLKID_USB>; 19409baf7d6bSNeil Armstrong resets = <&reset RESET_USB>; 19419baf7d6bSNeil Armstrong 19429baf7d6bSNeil Armstrong dr_mode = "otg"; 19439baf7d6bSNeil Armstrong 19449baf7d6bSNeil Armstrong phys = <&usb2_phy0>, <&usb2_phy1>, 19459baf7d6bSNeil Armstrong <&usb3_pcie_phy PHY_TYPE_USB3>; 19469baf7d6bSNeil Armstrong phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; 19479baf7d6bSNeil Armstrong 19489baf7d6bSNeil Armstrong dwc2: usb@ff400000 { 19499baf7d6bSNeil Armstrong compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 19509baf7d6bSNeil Armstrong reg = <0x0 0xff400000 0x0 0x40000>; 19519baf7d6bSNeil Armstrong interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 19529baf7d6bSNeil Armstrong clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; 19539baf7d6bSNeil Armstrong clock-names = "ddr"; 19549baf7d6bSNeil Armstrong phys = <&usb2_phy1>; 19559baf7d6bSNeil Armstrong dr_mode = "peripheral"; 19569baf7d6bSNeil Armstrong g-rx-fifo-size = <192>; 19579baf7d6bSNeil Armstrong g-np-tx-fifo-size = <128>; 19589baf7d6bSNeil Armstrong g-tx-fifo-size = <128 128 16 16 16>; 19599baf7d6bSNeil Armstrong }; 19609baf7d6bSNeil Armstrong 19619baf7d6bSNeil Armstrong dwc3: usb@ff500000 { 19629baf7d6bSNeil Armstrong compatible = "snps,dwc3"; 19639baf7d6bSNeil Armstrong reg = <0x0 0xff500000 0x0 0x100000>; 19649baf7d6bSNeil Armstrong interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 19659baf7d6bSNeil Armstrong dr_mode = "host"; 19669baf7d6bSNeil Armstrong snps,dis_u2_susphy_quirk; 19679baf7d6bSNeil Armstrong snps,quirk-frame-length-adjustment; 19689baf7d6bSNeil Armstrong }; 19699baf7d6bSNeil Armstrong }; 19702607fd08SNeil Armstrong 19712607fd08SNeil Armstrong mali: gpu@ffe40000 { 19722607fd08SNeil Armstrong compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; 19732607fd08SNeil Armstrong reg = <0x0 0xffe40000 0x0 0x40000>; 19742607fd08SNeil Armstrong interrupt-parent = <&gic>; 19752607fd08SNeil Armstrong interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 19762607fd08SNeil Armstrong <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 19772607fd08SNeil Armstrong <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 19782607fd08SNeil Armstrong interrupt-names = "gpu", "mmu", "job"; 19792607fd08SNeil Armstrong clocks = <&clkc CLKID_MALI>; 19802607fd08SNeil Armstrong resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>; 19812607fd08SNeil Armstrong 19822607fd08SNeil Armstrong /* 19832607fd08SNeil Armstrong * Mali clocking is provided by two identical clock paths 19842607fd08SNeil Armstrong * MALI_0 and MALI_1 muxed to a single clock by a glitch 19852607fd08SNeil Armstrong * free mux to safely change frequency while running. 19862607fd08SNeil Armstrong */ 19872607fd08SNeil Armstrong assigned-clocks = <&clkc CLKID_MALI_0_SEL>, 19882607fd08SNeil Armstrong <&clkc CLKID_MALI_0>, 19892607fd08SNeil Armstrong <&clkc CLKID_MALI>; /* Glitch free mux */ 19902607fd08SNeil Armstrong assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>, 19912607fd08SNeil Armstrong <0>, /* Do Nothing */ 19922607fd08SNeil Armstrong <&clkc CLKID_MALI_0>; 19932607fd08SNeil Armstrong assigned-clock-rates = <0>, /* Do Nothing */ 19942607fd08SNeil Armstrong <800000000>, 19952607fd08SNeil Armstrong <0>; /* Do Nothing */ 19962607fd08SNeil Armstrong }; 19979c8c52f7SJianxin Pan }; 19989c8c52f7SJianxin Pan 19999c8c52f7SJianxin Pan timer { 20009c8c52f7SJianxin Pan compatible = "arm,armv8-timer"; 20019c8c52f7SJianxin Pan interrupts = <GIC_PPI 13 20029c8c52f7SJianxin Pan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 20039c8c52f7SJianxin Pan <GIC_PPI 14 20049c8c52f7SJianxin Pan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 20059c8c52f7SJianxin Pan <GIC_PPI 11 20069c8c52f7SJianxin Pan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 20079c8c52f7SJianxin Pan <GIC_PPI 10 20089c8c52f7SJianxin Pan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 20099c8c52f7SJianxin Pan }; 20109c8c52f7SJianxin Pan 20119c8c52f7SJianxin Pan xtal: xtal-clk { 20129c8c52f7SJianxin Pan compatible = "fixed-clock"; 20139c8c52f7SJianxin Pan clock-frequency = <24000000>; 20149c8c52f7SJianxin Pan clock-output-names = "xtal"; 20159c8c52f7SJianxin Pan #clock-cells = <0>; 20169c8c52f7SJianxin Pan }; 20179c8c52f7SJianxin Pan 20189c8c52f7SJianxin Pan}; 2019