1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 29d59b708SYixun Lan/* 39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved. 49d59b708SYixun Lan */ 59d59b708SYixun Lan 68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h> 78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h> 806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h> 98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h> 10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h> 118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h> 128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h> 13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h> 159d59b708SYixun Lan 169d59b708SYixun Lan/ { 179d59b708SYixun Lan compatible = "amlogic,meson-axg"; 189d59b708SYixun Lan 199d59b708SYixun Lan interrupt-parent = <&gic>; 209d59b708SYixun Lan #address-cells = <2>; 219d59b708SYixun Lan #size-cells = <2>; 229d59b708SYixun Lan 23fbd5cbc5SJerome Brunet tdmif_a: audio-controller-0 { 248c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 258c0cf40fSJerome Brunet #sound-dai-cells = <0>; 268c0cf40fSJerome Brunet sound-name-prefix = "TDM_A"; 278c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, 288c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_SCLK>, 298c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_LRCLK>; 308c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 318c0cf40fSJerome Brunet status = "disabled"; 329d59b708SYixun Lan }; 339d59b708SYixun Lan 34fbd5cbc5SJerome Brunet tdmif_b: audio-controller-1 { 358c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 368c0cf40fSJerome Brunet #sound-dai-cells = <0>; 378c0cf40fSJerome Brunet sound-name-prefix = "TDM_B"; 388c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, 398c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_SCLK>, 408c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_LRCLK>; 418c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 428c0cf40fSJerome Brunet status = "disabled"; 439d59b708SYixun Lan }; 448c0cf40fSJerome Brunet 45fbd5cbc5SJerome Brunet tdmif_c: audio-controller-2 { 468c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 478c0cf40fSJerome Brunet #sound-dai-cells = <0>; 488c0cf40fSJerome Brunet sound-name-prefix = "TDM_C"; 498c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, 508c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_SCLK>, 518c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_LRCLK>; 528c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 538c0cf40fSJerome Brunet status = "disabled"; 548c0cf40fSJerome Brunet }; 558c0cf40fSJerome Brunet 568c0cf40fSJerome Brunet arm-pmu { 578c0cf40fSJerome Brunet compatible = "arm,cortex-a53-pmu"; 588c0cf40fSJerome Brunet interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 598c0cf40fSJerome Brunet <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 608c0cf40fSJerome Brunet <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 618c0cf40fSJerome Brunet <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 628c0cf40fSJerome Brunet interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 639d59b708SYixun Lan }; 649d59b708SYixun Lan 659d59b708SYixun Lan cpus { 669d59b708SYixun Lan #address-cells = <0x2>; 679d59b708SYixun Lan #size-cells = <0x0>; 689d59b708SYixun Lan 699d59b708SYixun Lan cpu0: cpu@0 { 709d59b708SYixun Lan device_type = "cpu"; 7131af04cdSRob Herring compatible = "arm,cortex-a53"; 729d59b708SYixun Lan reg = <0x0 0x0>; 739d59b708SYixun Lan enable-method = "psci"; 749d59b708SYixun Lan next-level-cache = <&l2>; 752c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 769d59b708SYixun Lan }; 779d59b708SYixun Lan 789d59b708SYixun Lan cpu1: cpu@1 { 799d59b708SYixun Lan device_type = "cpu"; 8031af04cdSRob Herring compatible = "arm,cortex-a53"; 819d59b708SYixun Lan reg = <0x0 0x1>; 829d59b708SYixun Lan enable-method = "psci"; 839d59b708SYixun Lan next-level-cache = <&l2>; 842c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 859d59b708SYixun Lan }; 869d59b708SYixun Lan 879d59b708SYixun Lan cpu2: cpu@2 { 889d59b708SYixun Lan device_type = "cpu"; 8931af04cdSRob Herring compatible = "arm,cortex-a53"; 909d59b708SYixun Lan reg = <0x0 0x2>; 919d59b708SYixun Lan enable-method = "psci"; 929d59b708SYixun Lan next-level-cache = <&l2>; 932c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 949d59b708SYixun Lan }; 959d59b708SYixun Lan 969d59b708SYixun Lan cpu3: cpu@3 { 979d59b708SYixun Lan device_type = "cpu"; 9831af04cdSRob Herring compatible = "arm,cortex-a53"; 999d59b708SYixun Lan reg = <0x0 0x3>; 1009d59b708SYixun Lan enable-method = "psci"; 1019d59b708SYixun Lan next-level-cache = <&l2>; 1022c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 1039d59b708SYixun Lan }; 1049d59b708SYixun Lan 1059d59b708SYixun Lan l2: l2-cache0 { 1069d59b708SYixun Lan compatible = "cache"; 1079d59b708SYixun Lan }; 1089d59b708SYixun Lan }; 1099d59b708SYixun Lan 11096dc5702SJerome Brunet sm: secure-monitor { 11196dc5702SJerome Brunet compatible = "amlogic,meson-gxbb-sm"; 11296dc5702SJerome Brunet }; 11396dc5702SJerome Brunet 1149ab2d15cSJerome Brunet efuse: efuse { 1159ab2d15cSJerome Brunet compatible = "amlogic,meson-gxbb-efuse"; 1169ab2d15cSJerome Brunet clocks = <&clkc CLKID_EFUSE>; 1179ab2d15cSJerome Brunet #address-cells = <1>; 1189ab2d15cSJerome Brunet #size-cells = <1>; 1199ab2d15cSJerome Brunet read-only; 120de82e74aSCarlo Caione secure-monitor = <&sm>; 1219ab2d15cSJerome Brunet }; 1229ab2d15cSJerome Brunet 1239d59b708SYixun Lan psci { 1249d59b708SYixun Lan compatible = "arm,psci-1.0"; 1259d59b708SYixun Lan method = "smc"; 1269d59b708SYixun Lan }; 1279d59b708SYixun Lan 1288c0cf40fSJerome Brunet reserved-memory { 1298c0cf40fSJerome Brunet #address-cells = <2>; 1308c0cf40fSJerome Brunet #size-cells = <2>; 1318c0cf40fSJerome Brunet ranges; 1328c0cf40fSJerome Brunet 1338c0cf40fSJerome Brunet /* 16 MiB reserved for Hardware ROM Firmware */ 1348c0cf40fSJerome Brunet hwrom_reserved: hwrom@0 { 1358c0cf40fSJerome Brunet reg = <0x0 0x0 0x0 0x1000000>; 1368c0cf40fSJerome Brunet no-map; 13708307aabSJerome Brunet }; 13808307aabSJerome Brunet 1398c0cf40fSJerome Brunet /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 1408c0cf40fSJerome Brunet secmon_reserved: secmon@5000000 { 1418c0cf40fSJerome Brunet reg = <0x0 0x05000000 0x0 0x300000>; 1428c0cf40fSJerome Brunet no-map; 14308307aabSJerome Brunet }; 1445e395e14SYixun Lan }; 1455e395e14SYixun Lan 1462c130695SJerome Brunet scpi { 1472c130695SJerome Brunet compatible = "arm,scpi-pre-1.0"; 1482c130695SJerome Brunet mboxes = <&mailbox 1 &mailbox 2>; 1492c130695SJerome Brunet shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 1502c130695SJerome Brunet 1512c130695SJerome Brunet scpi_clocks: clocks { 1522c130695SJerome Brunet compatible = "arm,scpi-clocks"; 1532c130695SJerome Brunet 1542c130695SJerome Brunet scpi_dvfs: clock-controller { 1552c130695SJerome Brunet compatible = "arm,scpi-dvfs-clocks"; 1562c130695SJerome Brunet #clock-cells = <1>; 1572c130695SJerome Brunet clock-indices = <0>; 1582c130695SJerome Brunet clock-output-names = "vcpu"; 1592c130695SJerome Brunet }; 1602c130695SJerome Brunet }; 1612c130695SJerome Brunet 1622c130695SJerome Brunet scpi_sensors: sensors { 1632c130695SJerome Brunet compatible = "amlogic,meson-gxbb-scpi-sensors"; 1642c130695SJerome Brunet #thermal-sensor-cells = <1>; 1652c130695SJerome Brunet }; 1662c130695SJerome Brunet }; 1672c130695SJerome Brunet 1689d59b708SYixun Lan soc { 1699d59b708SYixun Lan compatible = "simple-bus"; 1709d59b708SYixun Lan #address-cells = <2>; 1719d59b708SYixun Lan #size-cells = <2>; 1729d59b708SYixun Lan ranges; 1739d59b708SYixun Lan 1741b208babSNeil Armstrong usb: usb@ffe09080 { 1751b208babSNeil Armstrong compatible = "amlogic,meson-axg-usb-ctrl"; 1761b208babSNeil Armstrong reg = <0x0 0xffe09080 0x0 0x20>; 1771b208babSNeil Armstrong interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1781b208babSNeil Armstrong #address-cells = <2>; 1791b208babSNeil Armstrong #size-cells = <2>; 1801b208babSNeil Armstrong ranges; 1811b208babSNeil Armstrong 1821b208babSNeil Armstrong clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; 1831b208babSNeil Armstrong clock-names = "usb_ctrl", "ddr"; 1841b208babSNeil Armstrong resets = <&reset RESET_USB_OTG>; 1851b208babSNeil Armstrong 1861b208babSNeil Armstrong dr_mode = "otg"; 1871b208babSNeil Armstrong 1881b208babSNeil Armstrong phys = <&usb2_phy1>; 1891b208babSNeil Armstrong phy-names = "usb2-phy1"; 1901b208babSNeil Armstrong 1911b208babSNeil Armstrong dwc2: usb@ff400000 { 1921b208babSNeil Armstrong compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 1931b208babSNeil Armstrong reg = <0x0 0xff400000 0x0 0x40000>; 1941b208babSNeil Armstrong interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1951b208babSNeil Armstrong clocks = <&clkc CLKID_USB1>; 1961b208babSNeil Armstrong clock-names = "otg"; 1971b208babSNeil Armstrong phys = <&usb2_phy1>; 1981b208babSNeil Armstrong dr_mode = "peripheral"; 1991b208babSNeil Armstrong g-rx-fifo-size = <192>; 2001b208babSNeil Armstrong g-np-tx-fifo-size = <128>; 2011b208babSNeil Armstrong g-tx-fifo-size = <128 128 16 16 16>; 2021b208babSNeil Armstrong }; 2031b208babSNeil Armstrong 2041b208babSNeil Armstrong dwc3: usb@ff500000 { 2051b208babSNeil Armstrong compatible = "snps,dwc3"; 2061b208babSNeil Armstrong reg = <0x0 0xff500000 0x0 0x100000>; 2071b208babSNeil Armstrong interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 2081b208babSNeil Armstrong dr_mode = "host"; 2091b208babSNeil Armstrong maximum-speed = "high-speed"; 2101b208babSNeil Armstrong snps,dis_u2_susphy_quirk; 2111b208babSNeil Armstrong }; 2121b208babSNeil Armstrong }; 2131b208babSNeil Armstrong 2148c0cf40fSJerome Brunet ethmac: ethernet@ff3f0000 { 2159d63f5d1SJerome Brunet compatible = "amlogic,meson-axg-dwmac", 2169d63f5d1SJerome Brunet "snps,dwmac-3.70a", 2179d63f5d1SJerome Brunet "snps,dwmac"; 2183ad6c9e3SNeil Armstrong reg = <0x0 0xff3f0000 0x0 0x10000>, 2193ad6c9e3SNeil Armstrong <0x0 0xff634540 0x0 0x8>; 2208b3e6f89SCarlo Caione interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 2218c0cf40fSJerome Brunet interrupt-names = "macirq"; 2228c0cf40fSJerome Brunet clocks = <&clkc CLKID_ETH>, 2238c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>, 22432b5f4b6SMartin Blumenstingl <&clkc CLKID_MPLL2>, 22532b5f4b6SMartin Blumenstingl <&clkc CLKID_FCLK_DIV2>; 22632b5f4b6SMartin Blumenstingl clock-names = "stmmaceth", "clkin0", "clkin1", 22732b5f4b6SMartin Blumenstingl "timing-adjustment"; 228ef68984eSJerome Brunet rx-fifo-depth = <4096>; 229ef68984eSJerome Brunet tx-fifo-depth = <2048>; 230f3362f0cSAnand Moon resets = <&reset RESET_ETHERNET>; 231f3362f0cSAnand Moon reset-names = "stmmaceth"; 2328c0cf40fSJerome Brunet status = "disabled"; 2338c0cf40fSJerome Brunet }; 2348c0cf40fSJerome Brunet 235c362e4e0SJerome Brunet pdm: audio-controller@ff632000 { 236c362e4e0SJerome Brunet compatible = "amlogic,axg-pdm"; 237c362e4e0SJerome Brunet reg = <0x0 0xff632000 0x0 0x34>; 238c362e4e0SJerome Brunet #sound-dai-cells = <0>; 239c362e4e0SJerome Brunet sound-name-prefix = "PDM"; 240c362e4e0SJerome Brunet clocks = <&clkc_audio AUD_CLKID_PDM>, 241c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_DCLK>, 242c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_SYSCLK>; 243c362e4e0SJerome Brunet clock-names = "pclk", "dclk", "sysclk"; 244c362e4e0SJerome Brunet status = "disabled"; 245c362e4e0SJerome Brunet }; 246c362e4e0SJerome Brunet 2478c0cf40fSJerome Brunet periphs: bus@ff634000 { 248221cf34bSNan Li compatible = "simple-bus"; 2498c0cf40fSJerome Brunet reg = <0x0 0xff634000 0x0 0x2000>; 250221cf34bSNan Li #address-cells = <2>; 251221cf34bSNan Li #size-cells = <2>; 2528c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; 253221cf34bSNan Li 2548c0cf40fSJerome Brunet hwrng: rng@18 { 2558c0cf40fSJerome Brunet compatible = "amlogic,meson-rng"; 2568c0cf40fSJerome Brunet reg = <0x0 0x18 0x0 0x4>; 2578c0cf40fSJerome Brunet clocks = <&clkc CLKID_RNG0>; 2588c0cf40fSJerome Brunet clock-names = "core"; 259221cf34bSNan Li }; 260221cf34bSNan Li 2618c0cf40fSJerome Brunet pinctrl_periphs: pinctrl@480 { 2628c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-periphs-pinctrl"; 2638c0cf40fSJerome Brunet #address-cells = <2>; 2648c0cf40fSJerome Brunet #size-cells = <2>; 2658c0cf40fSJerome Brunet ranges; 2668c0cf40fSJerome Brunet 2678c0cf40fSJerome Brunet gpio: bank@480 { 2688c0cf40fSJerome Brunet reg = <0x0 0x00480 0x0 0x40>, 2698c0cf40fSJerome Brunet <0x0 0x004e8 0x0 0x14>, 2708c0cf40fSJerome Brunet <0x0 0x00520 0x0 0x14>, 2718c0cf40fSJerome Brunet <0x0 0x00430 0x0 0x3c>; 2728c0cf40fSJerome Brunet reg-names = "mux", "pull", "pull-enable", "gpio"; 2738c0cf40fSJerome Brunet gpio-controller; 2748c0cf40fSJerome Brunet #gpio-cells = <2>; 2758c0cf40fSJerome Brunet gpio-ranges = <&pinctrl_periphs 0 0 86>; 276221cf34bSNan Li }; 2778c0cf40fSJerome Brunet 2788c0cf40fSJerome Brunet i2c0_pins: i2c0 { 2798c0cf40fSJerome Brunet mux { 2808c0cf40fSJerome Brunet groups = "i2c0_sck", 2818c0cf40fSJerome Brunet "i2c0_sda"; 2828c0cf40fSJerome Brunet function = "i2c0"; 2831c5cc1c8SJerome Brunet bias-disable; 2848c0cf40fSJerome Brunet }; 2858c0cf40fSJerome Brunet }; 2868c0cf40fSJerome Brunet 2878c0cf40fSJerome Brunet i2c1_x_pins: i2c1_x { 2888c0cf40fSJerome Brunet mux { 2898c0cf40fSJerome Brunet groups = "i2c1_sck_x", 2908c0cf40fSJerome Brunet "i2c1_sda_x"; 2918c0cf40fSJerome Brunet function = "i2c1"; 2921c5cc1c8SJerome Brunet bias-disable; 2938c0cf40fSJerome Brunet }; 2948c0cf40fSJerome Brunet }; 2958c0cf40fSJerome Brunet 2968c0cf40fSJerome Brunet i2c1_z_pins: i2c1_z { 2978c0cf40fSJerome Brunet mux { 2988c0cf40fSJerome Brunet groups = "i2c1_sck_z", 2998c0cf40fSJerome Brunet "i2c1_sda_z"; 3008c0cf40fSJerome Brunet function = "i2c1"; 3011c5cc1c8SJerome Brunet bias-disable; 3028c0cf40fSJerome Brunet }; 3038c0cf40fSJerome Brunet }; 3048c0cf40fSJerome Brunet 3058c0cf40fSJerome Brunet i2c2_a_pins: i2c2_a { 3068c0cf40fSJerome Brunet mux { 3078c0cf40fSJerome Brunet groups = "i2c2_sck_a", 3088c0cf40fSJerome Brunet "i2c2_sda_a"; 3098c0cf40fSJerome Brunet function = "i2c2"; 3101c5cc1c8SJerome Brunet bias-disable; 3118c0cf40fSJerome Brunet }; 3128c0cf40fSJerome Brunet }; 3138c0cf40fSJerome Brunet 3148c0cf40fSJerome Brunet i2c2_x_pins: i2c2_x { 3158c0cf40fSJerome Brunet mux { 3168c0cf40fSJerome Brunet groups = "i2c2_sck_x", 3178c0cf40fSJerome Brunet "i2c2_sda_x"; 3188c0cf40fSJerome Brunet function = "i2c2"; 3191c5cc1c8SJerome Brunet bias-disable; 3208c0cf40fSJerome Brunet }; 3218c0cf40fSJerome Brunet }; 3228c0cf40fSJerome Brunet 3238c0cf40fSJerome Brunet i2c3_a6_pins: i2c3_a6 { 3248c0cf40fSJerome Brunet mux { 3258c0cf40fSJerome Brunet groups = "i2c3_sda_a6", 3268c0cf40fSJerome Brunet "i2c3_sck_a7"; 3278c0cf40fSJerome Brunet function = "i2c3"; 3281c5cc1c8SJerome Brunet bias-disable; 3298c0cf40fSJerome Brunet }; 3308c0cf40fSJerome Brunet }; 3318c0cf40fSJerome Brunet 3328c0cf40fSJerome Brunet i2c3_a12_pins: i2c3_a12 { 3338c0cf40fSJerome Brunet mux { 3348c0cf40fSJerome Brunet groups = "i2c3_sda_a12", 3358c0cf40fSJerome Brunet "i2c3_sck_a13"; 3368c0cf40fSJerome Brunet function = "i2c3"; 3371c5cc1c8SJerome Brunet bias-disable; 3388c0cf40fSJerome Brunet }; 3398c0cf40fSJerome Brunet }; 3408c0cf40fSJerome Brunet 3418c0cf40fSJerome Brunet i2c3_a19_pins: i2c3_a19 { 3428c0cf40fSJerome Brunet mux { 3438c0cf40fSJerome Brunet groups = "i2c3_sda_a19", 3448c0cf40fSJerome Brunet "i2c3_sck_a20"; 3458c0cf40fSJerome Brunet function = "i2c3"; 3461c5cc1c8SJerome Brunet bias-disable; 3478c0cf40fSJerome Brunet }; 3488c0cf40fSJerome Brunet }; 3498c0cf40fSJerome Brunet 3508c0cf40fSJerome Brunet emmc_pins: emmc { 351b43033b1SJerome Brunet mux-0 { 3528c0cf40fSJerome Brunet groups = "emmc_nand_d0", 3538c0cf40fSJerome Brunet "emmc_nand_d1", 3548c0cf40fSJerome Brunet "emmc_nand_d2", 3558c0cf40fSJerome Brunet "emmc_nand_d3", 3568c0cf40fSJerome Brunet "emmc_nand_d4", 3578c0cf40fSJerome Brunet "emmc_nand_d5", 3588c0cf40fSJerome Brunet "emmc_nand_d6", 3598c0cf40fSJerome Brunet "emmc_nand_d7", 360b43033b1SJerome Brunet "emmc_cmd"; 361b43033b1SJerome Brunet function = "emmc"; 362b43033b1SJerome Brunet bias-pull-up; 363b43033b1SJerome Brunet }; 364b43033b1SJerome Brunet 365b43033b1SJerome Brunet mux-1 { 366b43033b1SJerome Brunet groups = "emmc_clk"; 3678c0cf40fSJerome Brunet function = "emmc"; 36896a13691SJerome Brunet bias-disable; 3698c0cf40fSJerome Brunet }; 3708c0cf40fSJerome Brunet }; 3718c0cf40fSJerome Brunet 372b43033b1SJerome Brunet emmc_ds_pins: emmc_ds { 373b43033b1SJerome Brunet mux { 374b43033b1SJerome Brunet groups = "emmc_ds"; 375b43033b1SJerome Brunet function = "emmc"; 376b43033b1SJerome Brunet bias-pull-down; 377b43033b1SJerome Brunet }; 378b43033b1SJerome Brunet }; 379b43033b1SJerome Brunet 3808c0cf40fSJerome Brunet emmc_clk_gate_pins: emmc_clk_gate { 3818c0cf40fSJerome Brunet mux { 3828c0cf40fSJerome Brunet groups = "BOOT_8"; 3838c0cf40fSJerome Brunet function = "gpio_periphs"; 3848c0cf40fSJerome Brunet bias-pull-down; 3858c0cf40fSJerome Brunet }; 3868c0cf40fSJerome Brunet }; 3878c0cf40fSJerome Brunet 3888c0cf40fSJerome Brunet eth_rgmii_x_pins: eth-x-rgmii { 3898c0cf40fSJerome Brunet mux { 3908c0cf40fSJerome Brunet groups = "eth_mdio_x", 3918c0cf40fSJerome Brunet "eth_mdc_x", 3928c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 3938c0cf40fSJerome Brunet "eth_rx_dv_x", 3948c0cf40fSJerome Brunet "eth_rxd0_x", 3958c0cf40fSJerome Brunet "eth_rxd1_x", 3968c0cf40fSJerome Brunet "eth_rxd2_rgmii", 3978c0cf40fSJerome Brunet "eth_rxd3_rgmii", 3988c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 3998c0cf40fSJerome Brunet "eth_txen_x", 4008c0cf40fSJerome Brunet "eth_txd0_x", 4018c0cf40fSJerome Brunet "eth_txd1_x", 4028c0cf40fSJerome Brunet "eth_txd2_rgmii", 4038c0cf40fSJerome Brunet "eth_txd3_rgmii"; 4048c0cf40fSJerome Brunet function = "eth"; 4051c5cc1c8SJerome Brunet bias-disable; 4068c0cf40fSJerome Brunet }; 4078c0cf40fSJerome Brunet }; 4088c0cf40fSJerome Brunet 4098c0cf40fSJerome Brunet eth_rgmii_y_pins: eth-y-rgmii { 4108c0cf40fSJerome Brunet mux { 4118c0cf40fSJerome Brunet groups = "eth_mdio_y", 4128c0cf40fSJerome Brunet "eth_mdc_y", 4138c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4148c0cf40fSJerome Brunet "eth_rx_dv_y", 4158c0cf40fSJerome Brunet "eth_rxd0_y", 4168c0cf40fSJerome Brunet "eth_rxd1_y", 4178c0cf40fSJerome Brunet "eth_rxd2_rgmii", 4188c0cf40fSJerome Brunet "eth_rxd3_rgmii", 4198c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 4208c0cf40fSJerome Brunet "eth_txen_y", 4218c0cf40fSJerome Brunet "eth_txd0_y", 4228c0cf40fSJerome Brunet "eth_txd1_y", 4238c0cf40fSJerome Brunet "eth_txd2_rgmii", 4248c0cf40fSJerome Brunet "eth_txd3_rgmii"; 4258c0cf40fSJerome Brunet function = "eth"; 4261c5cc1c8SJerome Brunet bias-disable; 4278c0cf40fSJerome Brunet }; 4288c0cf40fSJerome Brunet }; 4298c0cf40fSJerome Brunet 4308c0cf40fSJerome Brunet eth_rmii_x_pins: eth-x-rmii { 4318c0cf40fSJerome Brunet mux { 4328c0cf40fSJerome Brunet groups = "eth_mdio_x", 4338c0cf40fSJerome Brunet "eth_mdc_x", 4348c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 4358c0cf40fSJerome Brunet "eth_rx_dv_x", 4368c0cf40fSJerome Brunet "eth_rxd0_x", 4378c0cf40fSJerome Brunet "eth_rxd1_x", 4388c0cf40fSJerome Brunet "eth_txen_x", 4398c0cf40fSJerome Brunet "eth_txd0_x", 4408c0cf40fSJerome Brunet "eth_txd1_x"; 4418c0cf40fSJerome Brunet function = "eth"; 4421c5cc1c8SJerome Brunet bias-disable; 4438c0cf40fSJerome Brunet }; 4448c0cf40fSJerome Brunet }; 4458c0cf40fSJerome Brunet 4468c0cf40fSJerome Brunet eth_rmii_y_pins: eth-y-rmii { 4478c0cf40fSJerome Brunet mux { 4488c0cf40fSJerome Brunet groups = "eth_mdio_y", 4498c0cf40fSJerome Brunet "eth_mdc_y", 4508c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4518c0cf40fSJerome Brunet "eth_rx_dv_y", 4528c0cf40fSJerome Brunet "eth_rxd0_y", 4538c0cf40fSJerome Brunet "eth_rxd1_y", 4548c0cf40fSJerome Brunet "eth_txen_y", 4558c0cf40fSJerome Brunet "eth_txd0_y", 4568c0cf40fSJerome Brunet "eth_txd1_y"; 4578c0cf40fSJerome Brunet function = "eth"; 4581c5cc1c8SJerome Brunet bias-disable; 4598c0cf40fSJerome Brunet }; 4608c0cf40fSJerome Brunet }; 4618c0cf40fSJerome Brunet 4628c0cf40fSJerome Brunet mclk_b_pins: mclk_b { 4638c0cf40fSJerome Brunet mux { 4648c0cf40fSJerome Brunet groups = "mclk_b"; 4658c0cf40fSJerome Brunet function = "mclk_b"; 4661c5cc1c8SJerome Brunet bias-disable; 4678c0cf40fSJerome Brunet }; 4688c0cf40fSJerome Brunet }; 4698c0cf40fSJerome Brunet 4708c0cf40fSJerome Brunet mclk_c_pins: mclk_c { 4718c0cf40fSJerome Brunet mux { 4728c0cf40fSJerome Brunet groups = "mclk_c"; 4738c0cf40fSJerome Brunet function = "mclk_c"; 4741c5cc1c8SJerome Brunet bias-disable; 4758c0cf40fSJerome Brunet }; 4768c0cf40fSJerome Brunet }; 4778c0cf40fSJerome Brunet 4788c0cf40fSJerome Brunet pdm_dclk_a14_pins: pdm_dclk_a14 { 4798c0cf40fSJerome Brunet mux { 4808c0cf40fSJerome Brunet groups = "pdm_dclk_a14"; 4818c0cf40fSJerome Brunet function = "pdm"; 4821c5cc1c8SJerome Brunet bias-disable; 4838c0cf40fSJerome Brunet }; 4848c0cf40fSJerome Brunet }; 4858c0cf40fSJerome Brunet 4868c0cf40fSJerome Brunet pdm_dclk_a19_pins: pdm_dclk_a19 { 4878c0cf40fSJerome Brunet mux { 4888c0cf40fSJerome Brunet groups = "pdm_dclk_a19"; 4898c0cf40fSJerome Brunet function = "pdm"; 4901c5cc1c8SJerome Brunet bias-disable; 4918c0cf40fSJerome Brunet }; 4928c0cf40fSJerome Brunet }; 4938c0cf40fSJerome Brunet 4948c0cf40fSJerome Brunet pdm_din0_pins: pdm_din0 { 4958c0cf40fSJerome Brunet mux { 4968c0cf40fSJerome Brunet groups = "pdm_din0"; 4978c0cf40fSJerome Brunet function = "pdm"; 4981c5cc1c8SJerome Brunet bias-disable; 4998c0cf40fSJerome Brunet }; 5008c0cf40fSJerome Brunet }; 5018c0cf40fSJerome Brunet 5028c0cf40fSJerome Brunet pdm_din1_pins: pdm_din1 { 5038c0cf40fSJerome Brunet mux { 5048c0cf40fSJerome Brunet groups = "pdm_din1"; 5058c0cf40fSJerome Brunet function = "pdm"; 5061c5cc1c8SJerome Brunet bias-disable; 5078c0cf40fSJerome Brunet }; 5088c0cf40fSJerome Brunet }; 5098c0cf40fSJerome Brunet 5108c0cf40fSJerome Brunet pdm_din2_pins: pdm_din2 { 5118c0cf40fSJerome Brunet mux { 5128c0cf40fSJerome Brunet groups = "pdm_din2"; 5138c0cf40fSJerome Brunet function = "pdm"; 5141c5cc1c8SJerome Brunet bias-disable; 5158c0cf40fSJerome Brunet }; 5168c0cf40fSJerome Brunet }; 5178c0cf40fSJerome Brunet 5188c0cf40fSJerome Brunet pdm_din3_pins: pdm_din3 { 5198c0cf40fSJerome Brunet mux { 5208c0cf40fSJerome Brunet groups = "pdm_din3"; 5218c0cf40fSJerome Brunet function = "pdm"; 5221c5cc1c8SJerome Brunet bias-disable; 5238c0cf40fSJerome Brunet }; 5248c0cf40fSJerome Brunet }; 5258c0cf40fSJerome Brunet 5268c0cf40fSJerome Brunet pwm_a_a_pins: pwm_a_a { 5278c0cf40fSJerome Brunet mux { 5288c0cf40fSJerome Brunet groups = "pwm_a_a"; 5298c0cf40fSJerome Brunet function = "pwm_a"; 5301c5cc1c8SJerome Brunet bias-disable; 5318c0cf40fSJerome Brunet }; 5328c0cf40fSJerome Brunet }; 5338c0cf40fSJerome Brunet 5348c0cf40fSJerome Brunet pwm_a_x18_pins: pwm_a_x18 { 5358c0cf40fSJerome Brunet mux { 5368c0cf40fSJerome Brunet groups = "pwm_a_x18"; 5378c0cf40fSJerome Brunet function = "pwm_a"; 5381c5cc1c8SJerome Brunet bias-disable; 5398c0cf40fSJerome Brunet }; 5408c0cf40fSJerome Brunet }; 5418c0cf40fSJerome Brunet 5428c0cf40fSJerome Brunet pwm_a_x20_pins: pwm_a_x20 { 5438c0cf40fSJerome Brunet mux { 5448c0cf40fSJerome Brunet groups = "pwm_a_x20"; 5458c0cf40fSJerome Brunet function = "pwm_a"; 5461c5cc1c8SJerome Brunet bias-disable; 5478c0cf40fSJerome Brunet }; 5488c0cf40fSJerome Brunet }; 5498c0cf40fSJerome Brunet 5508c0cf40fSJerome Brunet pwm_a_z_pins: pwm_a_z { 5518c0cf40fSJerome Brunet mux { 5528c0cf40fSJerome Brunet groups = "pwm_a_z"; 5538c0cf40fSJerome Brunet function = "pwm_a"; 5541c5cc1c8SJerome Brunet bias-disable; 5558c0cf40fSJerome Brunet }; 5568c0cf40fSJerome Brunet }; 5578c0cf40fSJerome Brunet 5588c0cf40fSJerome Brunet pwm_b_a_pins: pwm_b_a { 5598c0cf40fSJerome Brunet mux { 5608c0cf40fSJerome Brunet groups = "pwm_b_a"; 5618c0cf40fSJerome Brunet function = "pwm_b"; 5621c5cc1c8SJerome Brunet bias-disable; 5638c0cf40fSJerome Brunet }; 5648c0cf40fSJerome Brunet }; 5658c0cf40fSJerome Brunet 5668c0cf40fSJerome Brunet pwm_b_x_pins: pwm_b_x { 5678c0cf40fSJerome Brunet mux { 5688c0cf40fSJerome Brunet groups = "pwm_b_x"; 5698c0cf40fSJerome Brunet function = "pwm_b"; 5701c5cc1c8SJerome Brunet bias-disable; 5718c0cf40fSJerome Brunet }; 5728c0cf40fSJerome Brunet }; 5738c0cf40fSJerome Brunet 5748c0cf40fSJerome Brunet pwm_b_z_pins: pwm_b_z { 5758c0cf40fSJerome Brunet mux { 5768c0cf40fSJerome Brunet groups = "pwm_b_z"; 5778c0cf40fSJerome Brunet function = "pwm_b"; 5781c5cc1c8SJerome Brunet bias-disable; 5798c0cf40fSJerome Brunet }; 5808c0cf40fSJerome Brunet }; 5818c0cf40fSJerome Brunet 5828c0cf40fSJerome Brunet pwm_c_a_pins: pwm_c_a { 5838c0cf40fSJerome Brunet mux { 5848c0cf40fSJerome Brunet groups = "pwm_c_a"; 5858c0cf40fSJerome Brunet function = "pwm_c"; 5861c5cc1c8SJerome Brunet bias-disable; 5878c0cf40fSJerome Brunet }; 5888c0cf40fSJerome Brunet }; 5898c0cf40fSJerome Brunet 5908c0cf40fSJerome Brunet pwm_c_x10_pins: pwm_c_x10 { 5918c0cf40fSJerome Brunet mux { 5928c0cf40fSJerome Brunet groups = "pwm_c_x10"; 5938c0cf40fSJerome Brunet function = "pwm_c"; 5941c5cc1c8SJerome Brunet bias-disable; 5958c0cf40fSJerome Brunet }; 5968c0cf40fSJerome Brunet }; 5978c0cf40fSJerome Brunet 5988c0cf40fSJerome Brunet pwm_c_x17_pins: pwm_c_x17 { 5998c0cf40fSJerome Brunet mux { 6008c0cf40fSJerome Brunet groups = "pwm_c_x17"; 6018c0cf40fSJerome Brunet function = "pwm_c"; 6021c5cc1c8SJerome Brunet bias-disable; 6038c0cf40fSJerome Brunet }; 6048c0cf40fSJerome Brunet }; 6058c0cf40fSJerome Brunet 6068c0cf40fSJerome Brunet pwm_d_x11_pins: pwm_d_x11 { 6078c0cf40fSJerome Brunet mux { 6088c0cf40fSJerome Brunet groups = "pwm_d_x11"; 6098c0cf40fSJerome Brunet function = "pwm_d"; 6101c5cc1c8SJerome Brunet bias-disable; 6118c0cf40fSJerome Brunet }; 6128c0cf40fSJerome Brunet }; 6138c0cf40fSJerome Brunet 6148c0cf40fSJerome Brunet pwm_d_x16_pins: pwm_d_x16 { 6158c0cf40fSJerome Brunet mux { 6168c0cf40fSJerome Brunet groups = "pwm_d_x16"; 6178c0cf40fSJerome Brunet function = "pwm_d"; 6181c5cc1c8SJerome Brunet bias-disable; 6198c0cf40fSJerome Brunet }; 6208c0cf40fSJerome Brunet }; 6218c0cf40fSJerome Brunet 6228c0cf40fSJerome Brunet sdio_pins: sdio { 623b43033b1SJerome Brunet mux-0 { 6248c0cf40fSJerome Brunet groups = "sdio_d0", 6258c0cf40fSJerome Brunet "sdio_d1", 6268c0cf40fSJerome Brunet "sdio_d2", 6278c0cf40fSJerome Brunet "sdio_d3", 628b43033b1SJerome Brunet "sdio_cmd"; 629b43033b1SJerome Brunet function = "sdio"; 630b43033b1SJerome Brunet bias-pull-up; 631b43033b1SJerome Brunet }; 632b43033b1SJerome Brunet 633b43033b1SJerome Brunet mux-1 { 634b43033b1SJerome Brunet groups = "sdio_clk"; 6358c0cf40fSJerome Brunet function = "sdio"; 63696a13691SJerome Brunet bias-disable; 6378c0cf40fSJerome Brunet }; 6388c0cf40fSJerome Brunet }; 6398c0cf40fSJerome Brunet 6408c0cf40fSJerome Brunet sdio_clk_gate_pins: sdio_clk_gate { 6418c0cf40fSJerome Brunet mux { 6428c0cf40fSJerome Brunet groups = "GPIOX_4"; 6438c0cf40fSJerome Brunet function = "gpio_periphs"; 6448c0cf40fSJerome Brunet bias-pull-down; 6458c0cf40fSJerome Brunet }; 6468c0cf40fSJerome Brunet }; 6478c0cf40fSJerome Brunet 6488c0cf40fSJerome Brunet spdif_in_z_pins: spdif_in_z { 6498c0cf40fSJerome Brunet mux { 6508c0cf40fSJerome Brunet groups = "spdif_in_z"; 6518c0cf40fSJerome Brunet function = "spdif_in"; 6521c5cc1c8SJerome Brunet bias-disable; 6538c0cf40fSJerome Brunet }; 6548c0cf40fSJerome Brunet }; 6558c0cf40fSJerome Brunet 6568c0cf40fSJerome Brunet spdif_in_a1_pins: spdif_in_a1 { 6578c0cf40fSJerome Brunet mux { 6588c0cf40fSJerome Brunet groups = "spdif_in_a1"; 6598c0cf40fSJerome Brunet function = "spdif_in"; 6601c5cc1c8SJerome Brunet bias-disable; 6618c0cf40fSJerome Brunet }; 6628c0cf40fSJerome Brunet }; 6638c0cf40fSJerome Brunet 6648c0cf40fSJerome Brunet spdif_in_a7_pins: spdif_in_a7 { 6658c0cf40fSJerome Brunet mux { 6668c0cf40fSJerome Brunet groups = "spdif_in_a7"; 6678c0cf40fSJerome Brunet function = "spdif_in"; 6681c5cc1c8SJerome Brunet bias-disable; 6698c0cf40fSJerome Brunet }; 6708c0cf40fSJerome Brunet }; 6718c0cf40fSJerome Brunet 6728c0cf40fSJerome Brunet spdif_in_a19_pins: spdif_in_a19 { 6738c0cf40fSJerome Brunet mux { 6748c0cf40fSJerome Brunet groups = "spdif_in_a19"; 6758c0cf40fSJerome Brunet function = "spdif_in"; 6761c5cc1c8SJerome Brunet bias-disable; 6778c0cf40fSJerome Brunet }; 6788c0cf40fSJerome Brunet }; 6798c0cf40fSJerome Brunet 6808c0cf40fSJerome Brunet spdif_in_a20_pins: spdif_in_a20 { 6818c0cf40fSJerome Brunet mux { 6828c0cf40fSJerome Brunet groups = "spdif_in_a20"; 6838c0cf40fSJerome Brunet function = "spdif_in"; 6841c5cc1c8SJerome Brunet bias-disable; 6858c0cf40fSJerome Brunet }; 6868c0cf40fSJerome Brunet }; 6878c0cf40fSJerome Brunet 6888c0cf40fSJerome Brunet spdif_out_a1_pins: spdif_out_a1 { 6898c0cf40fSJerome Brunet mux { 6908c0cf40fSJerome Brunet groups = "spdif_out_a1"; 6918c0cf40fSJerome Brunet function = "spdif_out"; 6921c5cc1c8SJerome Brunet bias-disable; 6938c0cf40fSJerome Brunet }; 6948c0cf40fSJerome Brunet }; 6958c0cf40fSJerome Brunet 6968c0cf40fSJerome Brunet spdif_out_a11_pins: spdif_out_a11 { 6978c0cf40fSJerome Brunet mux { 6988c0cf40fSJerome Brunet groups = "spdif_out_a11"; 6998c0cf40fSJerome Brunet function = "spdif_out"; 7001c5cc1c8SJerome Brunet bias-disable; 7018c0cf40fSJerome Brunet }; 7028c0cf40fSJerome Brunet }; 7038c0cf40fSJerome Brunet 7048c0cf40fSJerome Brunet spdif_out_a19_pins: spdif_out_a19 { 7058c0cf40fSJerome Brunet mux { 7068c0cf40fSJerome Brunet groups = "spdif_out_a19"; 7078c0cf40fSJerome Brunet function = "spdif_out"; 7081c5cc1c8SJerome Brunet bias-disable; 7098c0cf40fSJerome Brunet }; 7108c0cf40fSJerome Brunet }; 7118c0cf40fSJerome Brunet 7128c0cf40fSJerome Brunet spdif_out_a20_pins: spdif_out_a20 { 7138c0cf40fSJerome Brunet mux { 7148c0cf40fSJerome Brunet groups = "spdif_out_a20"; 7158c0cf40fSJerome Brunet function = "spdif_out"; 7161c5cc1c8SJerome Brunet bias-disable; 7178c0cf40fSJerome Brunet }; 7188c0cf40fSJerome Brunet }; 7198c0cf40fSJerome Brunet 7208c0cf40fSJerome Brunet spdif_out_z_pins: spdif_out_z { 7218c0cf40fSJerome Brunet mux { 7228c0cf40fSJerome Brunet groups = "spdif_out_z"; 7238c0cf40fSJerome Brunet function = "spdif_out"; 7241c5cc1c8SJerome Brunet bias-disable; 7258c0cf40fSJerome Brunet }; 7268c0cf40fSJerome Brunet }; 7278c0cf40fSJerome Brunet 7288c0cf40fSJerome Brunet spi0_pins: spi0 { 7298c0cf40fSJerome Brunet mux { 7308c0cf40fSJerome Brunet groups = "spi0_miso", 7318c0cf40fSJerome Brunet "spi0_mosi", 7328c0cf40fSJerome Brunet "spi0_clk"; 7338c0cf40fSJerome Brunet function = "spi0"; 7341c5cc1c8SJerome Brunet bias-disable; 7358c0cf40fSJerome Brunet }; 7368c0cf40fSJerome Brunet }; 7378c0cf40fSJerome Brunet 7388c0cf40fSJerome Brunet spi0_ss0_pins: spi0_ss0 { 7398c0cf40fSJerome Brunet mux { 7408c0cf40fSJerome Brunet groups = "spi0_ss0"; 7418c0cf40fSJerome Brunet function = "spi0"; 7421c5cc1c8SJerome Brunet bias-disable; 7438c0cf40fSJerome Brunet }; 7448c0cf40fSJerome Brunet }; 7458c0cf40fSJerome Brunet 7468c0cf40fSJerome Brunet spi0_ss1_pins: spi0_ss1 { 7478c0cf40fSJerome Brunet mux { 7488c0cf40fSJerome Brunet groups = "spi0_ss1"; 7498c0cf40fSJerome Brunet function = "spi0"; 7501c5cc1c8SJerome Brunet bias-disable; 7518c0cf40fSJerome Brunet }; 7528c0cf40fSJerome Brunet }; 7538c0cf40fSJerome Brunet 7548c0cf40fSJerome Brunet spi0_ss2_pins: spi0_ss2 { 7558c0cf40fSJerome Brunet mux { 7568c0cf40fSJerome Brunet groups = "spi0_ss2"; 7578c0cf40fSJerome Brunet function = "spi0"; 7581c5cc1c8SJerome Brunet bias-disable; 7598c0cf40fSJerome Brunet }; 7608c0cf40fSJerome Brunet }; 7618c0cf40fSJerome Brunet 7628c0cf40fSJerome Brunet spi1_a_pins: spi1_a { 7638c0cf40fSJerome Brunet mux { 7648c0cf40fSJerome Brunet groups = "spi1_miso_a", 7658c0cf40fSJerome Brunet "spi1_mosi_a", 7668c0cf40fSJerome Brunet "spi1_clk_a"; 7678c0cf40fSJerome Brunet function = "spi1"; 7681c5cc1c8SJerome Brunet bias-disable; 7698c0cf40fSJerome Brunet }; 7708c0cf40fSJerome Brunet }; 7718c0cf40fSJerome Brunet 7728c0cf40fSJerome Brunet spi1_ss0_a_pins: spi1_ss0_a { 7738c0cf40fSJerome Brunet mux { 7748c0cf40fSJerome Brunet groups = "spi1_ss0_a"; 7758c0cf40fSJerome Brunet function = "spi1"; 7761c5cc1c8SJerome Brunet bias-disable; 7778c0cf40fSJerome Brunet }; 7788c0cf40fSJerome Brunet }; 7798c0cf40fSJerome Brunet 7808c0cf40fSJerome Brunet spi1_ss1_pins: spi1_ss1 { 7818c0cf40fSJerome Brunet mux { 7828c0cf40fSJerome Brunet groups = "spi1_ss1"; 7838c0cf40fSJerome Brunet function = "spi1"; 7841c5cc1c8SJerome Brunet bias-disable; 7858c0cf40fSJerome Brunet }; 7868c0cf40fSJerome Brunet }; 7878c0cf40fSJerome Brunet 7888c0cf40fSJerome Brunet spi1_x_pins: spi1_x { 7898c0cf40fSJerome Brunet mux { 7908c0cf40fSJerome Brunet groups = "spi1_miso_x", 7918c0cf40fSJerome Brunet "spi1_mosi_x", 7928c0cf40fSJerome Brunet "spi1_clk_x"; 7938c0cf40fSJerome Brunet function = "spi1"; 7941c5cc1c8SJerome Brunet bias-disable; 7958c0cf40fSJerome Brunet }; 7968c0cf40fSJerome Brunet }; 7978c0cf40fSJerome Brunet 7988c0cf40fSJerome Brunet spi1_ss0_x_pins: spi1_ss0_x { 7998c0cf40fSJerome Brunet mux { 8008c0cf40fSJerome Brunet groups = "spi1_ss0_x"; 8018c0cf40fSJerome Brunet function = "spi1"; 8021c5cc1c8SJerome Brunet bias-disable; 8038c0cf40fSJerome Brunet }; 8048c0cf40fSJerome Brunet }; 8058c0cf40fSJerome Brunet 8068c0cf40fSJerome Brunet tdma_din0_pins: tdma_din0 { 8078c0cf40fSJerome Brunet mux { 8088c0cf40fSJerome Brunet groups = "tdma_din0"; 8098c0cf40fSJerome Brunet function = "tdma"; 8101c5cc1c8SJerome Brunet bias-disable; 8118c0cf40fSJerome Brunet }; 8128c0cf40fSJerome Brunet }; 8138c0cf40fSJerome Brunet 8148c0cf40fSJerome Brunet tdma_dout0_x14_pins: tdma_dout0_x14 { 8158c0cf40fSJerome Brunet mux { 8168c0cf40fSJerome Brunet groups = "tdma_dout0_x14"; 8178c0cf40fSJerome Brunet function = "tdma"; 8181c5cc1c8SJerome Brunet bias-disable; 8198c0cf40fSJerome Brunet }; 8208c0cf40fSJerome Brunet }; 8218c0cf40fSJerome Brunet 8228c0cf40fSJerome Brunet tdma_dout0_x15_pins: tdma_dout0_x15 { 8238c0cf40fSJerome Brunet mux { 8248c0cf40fSJerome Brunet groups = "tdma_dout0_x15"; 8258c0cf40fSJerome Brunet function = "tdma"; 8261c5cc1c8SJerome Brunet bias-disable; 8278c0cf40fSJerome Brunet }; 8288c0cf40fSJerome Brunet }; 8298c0cf40fSJerome Brunet 8308c0cf40fSJerome Brunet tdma_dout1_pins: tdma_dout1 { 8318c0cf40fSJerome Brunet mux { 8328c0cf40fSJerome Brunet groups = "tdma_dout1"; 8338c0cf40fSJerome Brunet function = "tdma"; 8341c5cc1c8SJerome Brunet bias-disable; 8358c0cf40fSJerome Brunet }; 8368c0cf40fSJerome Brunet }; 8378c0cf40fSJerome Brunet 8388c0cf40fSJerome Brunet tdma_din1_pins: tdma_din1 { 8398c0cf40fSJerome Brunet mux { 8408c0cf40fSJerome Brunet groups = "tdma_din1"; 8418c0cf40fSJerome Brunet function = "tdma"; 8421c5cc1c8SJerome Brunet bias-disable; 8438c0cf40fSJerome Brunet }; 8448c0cf40fSJerome Brunet }; 8458c0cf40fSJerome Brunet 8468c0cf40fSJerome Brunet tdma_fs_pins: tdma_fs { 8478c0cf40fSJerome Brunet mux { 8488c0cf40fSJerome Brunet groups = "tdma_fs"; 8498c0cf40fSJerome Brunet function = "tdma"; 8501c5cc1c8SJerome Brunet bias-disable; 8518c0cf40fSJerome Brunet }; 8528c0cf40fSJerome Brunet }; 8538c0cf40fSJerome Brunet 8548c0cf40fSJerome Brunet tdma_fs_slv_pins: tdma_fs_slv { 8558c0cf40fSJerome Brunet mux { 8568c0cf40fSJerome Brunet groups = "tdma_fs_slv"; 8578c0cf40fSJerome Brunet function = "tdma"; 8581c5cc1c8SJerome Brunet bias-disable; 8598c0cf40fSJerome Brunet }; 8608c0cf40fSJerome Brunet }; 8618c0cf40fSJerome Brunet 8628c0cf40fSJerome Brunet tdma_sclk_pins: tdma_sclk { 8638c0cf40fSJerome Brunet mux { 8648c0cf40fSJerome Brunet groups = "tdma_sclk"; 8658c0cf40fSJerome Brunet function = "tdma"; 8661c5cc1c8SJerome Brunet bias-disable; 8678c0cf40fSJerome Brunet }; 8688c0cf40fSJerome Brunet }; 8698c0cf40fSJerome Brunet 8708c0cf40fSJerome Brunet tdma_sclk_slv_pins: tdma_sclk_slv { 8718c0cf40fSJerome Brunet mux { 8728c0cf40fSJerome Brunet groups = "tdma_sclk_slv"; 8738c0cf40fSJerome Brunet function = "tdma"; 8741c5cc1c8SJerome Brunet bias-disable; 8758c0cf40fSJerome Brunet }; 8768c0cf40fSJerome Brunet }; 8778c0cf40fSJerome Brunet 8788c0cf40fSJerome Brunet tdmb_din0_pins: tdmb_din0 { 8798c0cf40fSJerome Brunet mux { 8808c0cf40fSJerome Brunet groups = "tdmb_din0"; 8818c0cf40fSJerome Brunet function = "tdmb"; 8821c5cc1c8SJerome Brunet bias-disable; 8838c0cf40fSJerome Brunet }; 8848c0cf40fSJerome Brunet }; 8858c0cf40fSJerome Brunet 8868c0cf40fSJerome Brunet tdmb_din1_pins: tdmb_din1 { 8878c0cf40fSJerome Brunet mux { 8888c0cf40fSJerome Brunet groups = "tdmb_din1"; 8898c0cf40fSJerome Brunet function = "tdmb"; 8901c5cc1c8SJerome Brunet bias-disable; 8918c0cf40fSJerome Brunet }; 8928c0cf40fSJerome Brunet }; 8938c0cf40fSJerome Brunet 8948c0cf40fSJerome Brunet tdmb_din2_pins: tdmb_din2 { 8958c0cf40fSJerome Brunet mux { 8968c0cf40fSJerome Brunet groups = "tdmb_din2"; 8978c0cf40fSJerome Brunet function = "tdmb"; 8981c5cc1c8SJerome Brunet bias-disable; 8998c0cf40fSJerome Brunet }; 9008c0cf40fSJerome Brunet }; 9018c0cf40fSJerome Brunet 9028c0cf40fSJerome Brunet tdmb_din3_pins: tdmb_din3 { 9038c0cf40fSJerome Brunet mux { 9048c0cf40fSJerome Brunet groups = "tdmb_din3"; 9058c0cf40fSJerome Brunet function = "tdmb"; 9061c5cc1c8SJerome Brunet bias-disable; 9078c0cf40fSJerome Brunet }; 9088c0cf40fSJerome Brunet }; 9098c0cf40fSJerome Brunet 9108c0cf40fSJerome Brunet tdmb_dout0_pins: tdmb_dout0 { 9118c0cf40fSJerome Brunet mux { 9128c0cf40fSJerome Brunet groups = "tdmb_dout0"; 9138c0cf40fSJerome Brunet function = "tdmb"; 9141c5cc1c8SJerome Brunet bias-disable; 9158c0cf40fSJerome Brunet }; 9168c0cf40fSJerome Brunet }; 9178c0cf40fSJerome Brunet 9188c0cf40fSJerome Brunet tdmb_dout1_pins: tdmb_dout1 { 9198c0cf40fSJerome Brunet mux { 9208c0cf40fSJerome Brunet groups = "tdmb_dout1"; 9218c0cf40fSJerome Brunet function = "tdmb"; 9221c5cc1c8SJerome Brunet bias-disable; 9238c0cf40fSJerome Brunet }; 9248c0cf40fSJerome Brunet }; 9258c0cf40fSJerome Brunet 9268c0cf40fSJerome Brunet tdmb_dout2_pins: tdmb_dout2 { 9278c0cf40fSJerome Brunet mux { 9288c0cf40fSJerome Brunet groups = "tdmb_dout2"; 9298c0cf40fSJerome Brunet function = "tdmb"; 9301c5cc1c8SJerome Brunet bias-disable; 9318c0cf40fSJerome Brunet }; 9328c0cf40fSJerome Brunet }; 9338c0cf40fSJerome Brunet 9348c0cf40fSJerome Brunet tdmb_dout3_pins: tdmb_dout3 { 9358c0cf40fSJerome Brunet mux { 9368c0cf40fSJerome Brunet groups = "tdmb_dout3"; 9378c0cf40fSJerome Brunet function = "tdmb"; 9381c5cc1c8SJerome Brunet bias-disable; 9398c0cf40fSJerome Brunet }; 9408c0cf40fSJerome Brunet }; 9418c0cf40fSJerome Brunet 9428c0cf40fSJerome Brunet tdmb_fs_pins: tdmb_fs { 9438c0cf40fSJerome Brunet mux { 9448c0cf40fSJerome Brunet groups = "tdmb_fs"; 9458c0cf40fSJerome Brunet function = "tdmb"; 9461c5cc1c8SJerome Brunet bias-disable; 9478c0cf40fSJerome Brunet }; 9488c0cf40fSJerome Brunet }; 9498c0cf40fSJerome Brunet 9508c0cf40fSJerome Brunet tdmb_fs_slv_pins: tdmb_fs_slv { 9518c0cf40fSJerome Brunet mux { 9528c0cf40fSJerome Brunet groups = "tdmb_fs_slv"; 9538c0cf40fSJerome Brunet function = "tdmb"; 9541c5cc1c8SJerome Brunet bias-disable; 9558c0cf40fSJerome Brunet }; 9568c0cf40fSJerome Brunet }; 9578c0cf40fSJerome Brunet 9588c0cf40fSJerome Brunet tdmb_sclk_pins: tdmb_sclk { 9598c0cf40fSJerome Brunet mux { 9608c0cf40fSJerome Brunet groups = "tdmb_sclk"; 9618c0cf40fSJerome Brunet function = "tdmb"; 9621c5cc1c8SJerome Brunet bias-disable; 9638c0cf40fSJerome Brunet }; 9648c0cf40fSJerome Brunet }; 9658c0cf40fSJerome Brunet 9668c0cf40fSJerome Brunet tdmb_sclk_slv_pins: tdmb_sclk_slv { 9678c0cf40fSJerome Brunet mux { 9688c0cf40fSJerome Brunet groups = "tdmb_sclk_slv"; 9698c0cf40fSJerome Brunet function = "tdmb"; 9701c5cc1c8SJerome Brunet bias-disable; 9718c0cf40fSJerome Brunet }; 9728c0cf40fSJerome Brunet }; 9738c0cf40fSJerome Brunet 9748c0cf40fSJerome Brunet tdmc_fs_pins: tdmc_fs { 9758c0cf40fSJerome Brunet mux { 9768c0cf40fSJerome Brunet groups = "tdmc_fs"; 9778c0cf40fSJerome Brunet function = "tdmc"; 9781c5cc1c8SJerome Brunet bias-disable; 9798c0cf40fSJerome Brunet }; 9808c0cf40fSJerome Brunet }; 9818c0cf40fSJerome Brunet 9828c0cf40fSJerome Brunet tdmc_fs_slv_pins: tdmc_fs_slv { 9838c0cf40fSJerome Brunet mux { 9848c0cf40fSJerome Brunet groups = "tdmc_fs_slv"; 9858c0cf40fSJerome Brunet function = "tdmc"; 9861c5cc1c8SJerome Brunet bias-disable; 9878c0cf40fSJerome Brunet }; 9888c0cf40fSJerome Brunet }; 9898c0cf40fSJerome Brunet 9908c0cf40fSJerome Brunet tdmc_sclk_pins: tdmc_sclk { 9918c0cf40fSJerome Brunet mux { 9928c0cf40fSJerome Brunet groups = "tdmc_sclk"; 9938c0cf40fSJerome Brunet function = "tdmc"; 9941c5cc1c8SJerome Brunet bias-disable; 9958c0cf40fSJerome Brunet }; 9968c0cf40fSJerome Brunet }; 9978c0cf40fSJerome Brunet 9988c0cf40fSJerome Brunet tdmc_sclk_slv_pins: tdmc_sclk_slv { 9998c0cf40fSJerome Brunet mux { 10008c0cf40fSJerome Brunet groups = "tdmc_sclk_slv"; 10018c0cf40fSJerome Brunet function = "tdmc"; 10021c5cc1c8SJerome Brunet bias-disable; 10038c0cf40fSJerome Brunet }; 10048c0cf40fSJerome Brunet }; 10058c0cf40fSJerome Brunet 10068c0cf40fSJerome Brunet tdmc_din0_pins: tdmc_din0 { 10078c0cf40fSJerome Brunet mux { 10088c0cf40fSJerome Brunet groups = "tdmc_din0"; 10098c0cf40fSJerome Brunet function = "tdmc"; 10101c5cc1c8SJerome Brunet bias-disable; 10118c0cf40fSJerome Brunet }; 10128c0cf40fSJerome Brunet }; 10138c0cf40fSJerome Brunet 10148c0cf40fSJerome Brunet tdmc_din1_pins: tdmc_din1 { 10158c0cf40fSJerome Brunet mux { 10168c0cf40fSJerome Brunet groups = "tdmc_din1"; 10178c0cf40fSJerome Brunet function = "tdmc"; 10181c5cc1c8SJerome Brunet bias-disable; 10198c0cf40fSJerome Brunet }; 10208c0cf40fSJerome Brunet }; 10218c0cf40fSJerome Brunet 10228c0cf40fSJerome Brunet tdmc_din2_pins: tdmc_din2 { 10238c0cf40fSJerome Brunet mux { 10248c0cf40fSJerome Brunet groups = "tdmc_din2"; 10258c0cf40fSJerome Brunet function = "tdmc"; 10261c5cc1c8SJerome Brunet bias-disable; 10278c0cf40fSJerome Brunet }; 10288c0cf40fSJerome Brunet }; 10298c0cf40fSJerome Brunet 10308c0cf40fSJerome Brunet tdmc_din3_pins: tdmc_din3 { 10318c0cf40fSJerome Brunet mux { 10328c0cf40fSJerome Brunet groups = "tdmc_din3"; 10338c0cf40fSJerome Brunet function = "tdmc"; 10341c5cc1c8SJerome Brunet bias-disable; 10358c0cf40fSJerome Brunet }; 10368c0cf40fSJerome Brunet }; 10378c0cf40fSJerome Brunet 10388c0cf40fSJerome Brunet tdmc_dout0_pins: tdmc_dout0 { 10398c0cf40fSJerome Brunet mux { 10408c0cf40fSJerome Brunet groups = "tdmc_dout0"; 10418c0cf40fSJerome Brunet function = "tdmc"; 10421c5cc1c8SJerome Brunet bias-disable; 10438c0cf40fSJerome Brunet }; 10448c0cf40fSJerome Brunet }; 10458c0cf40fSJerome Brunet 10468c0cf40fSJerome Brunet tdmc_dout1_pins: tdmc_dout1 { 10478c0cf40fSJerome Brunet mux { 10488c0cf40fSJerome Brunet groups = "tdmc_dout1"; 10498c0cf40fSJerome Brunet function = "tdmc"; 10501c5cc1c8SJerome Brunet bias-disable; 10518c0cf40fSJerome Brunet }; 10528c0cf40fSJerome Brunet }; 10538c0cf40fSJerome Brunet 10548c0cf40fSJerome Brunet tdmc_dout2_pins: tdmc_dout2 { 10558c0cf40fSJerome Brunet mux { 10568c0cf40fSJerome Brunet groups = "tdmc_dout2"; 10578c0cf40fSJerome Brunet function = "tdmc"; 10581c5cc1c8SJerome Brunet bias-disable; 10598c0cf40fSJerome Brunet }; 10608c0cf40fSJerome Brunet }; 10618c0cf40fSJerome Brunet 10628c0cf40fSJerome Brunet tdmc_dout3_pins: tdmc_dout3 { 10638c0cf40fSJerome Brunet mux { 10648c0cf40fSJerome Brunet groups = "tdmc_dout3"; 10658c0cf40fSJerome Brunet function = "tdmc"; 10661c5cc1c8SJerome Brunet bias-disable; 10678c0cf40fSJerome Brunet }; 10688c0cf40fSJerome Brunet }; 10698c0cf40fSJerome Brunet 10708c0cf40fSJerome Brunet uart_a_pins: uart_a { 10718c0cf40fSJerome Brunet mux { 10728c0cf40fSJerome Brunet groups = "uart_tx_a", 10738c0cf40fSJerome Brunet "uart_rx_a"; 10748c0cf40fSJerome Brunet function = "uart_a"; 10751c5cc1c8SJerome Brunet bias-disable; 10768c0cf40fSJerome Brunet }; 10778c0cf40fSJerome Brunet }; 10788c0cf40fSJerome Brunet 10798c0cf40fSJerome Brunet uart_a_cts_rts_pins: uart_a_cts_rts { 10808c0cf40fSJerome Brunet mux { 10818c0cf40fSJerome Brunet groups = "uart_cts_a", 10828c0cf40fSJerome Brunet "uart_rts_a"; 10838c0cf40fSJerome Brunet function = "uart_a"; 10841c5cc1c8SJerome Brunet bias-disable; 10858c0cf40fSJerome Brunet }; 10868c0cf40fSJerome Brunet }; 10878c0cf40fSJerome Brunet 10888c0cf40fSJerome Brunet uart_b_x_pins: uart_b_x { 10898c0cf40fSJerome Brunet mux { 10908c0cf40fSJerome Brunet groups = "uart_tx_b_x", 10918c0cf40fSJerome Brunet "uart_rx_b_x"; 10928c0cf40fSJerome Brunet function = "uart_b"; 10931c5cc1c8SJerome Brunet bias-disable; 10948c0cf40fSJerome Brunet }; 10958c0cf40fSJerome Brunet }; 10968c0cf40fSJerome Brunet 10978c0cf40fSJerome Brunet uart_b_x_cts_rts_pins: uart_b_x_cts_rts { 10988c0cf40fSJerome Brunet mux { 10998c0cf40fSJerome Brunet groups = "uart_cts_b_x", 11008c0cf40fSJerome Brunet "uart_rts_b_x"; 11018c0cf40fSJerome Brunet function = "uart_b"; 11021c5cc1c8SJerome Brunet bias-disable; 11038c0cf40fSJerome Brunet }; 11048c0cf40fSJerome Brunet }; 11058c0cf40fSJerome Brunet 11068c0cf40fSJerome Brunet uart_b_z_pins: uart_b_z { 11078c0cf40fSJerome Brunet mux { 11088c0cf40fSJerome Brunet groups = "uart_tx_b_z", 11098c0cf40fSJerome Brunet "uart_rx_b_z"; 11108c0cf40fSJerome Brunet function = "uart_b"; 11111c5cc1c8SJerome Brunet bias-disable; 11128c0cf40fSJerome Brunet }; 11138c0cf40fSJerome Brunet }; 11148c0cf40fSJerome Brunet 11158c0cf40fSJerome Brunet uart_b_z_cts_rts_pins: uart_b_z_cts_rts { 11168c0cf40fSJerome Brunet mux { 11178c0cf40fSJerome Brunet groups = "uart_cts_b_z", 11188c0cf40fSJerome Brunet "uart_rts_b_z"; 11198c0cf40fSJerome Brunet function = "uart_b"; 11201c5cc1c8SJerome Brunet bias-disable; 11218c0cf40fSJerome Brunet }; 11228c0cf40fSJerome Brunet }; 11238c0cf40fSJerome Brunet 11248c0cf40fSJerome Brunet uart_ao_b_z_pins: uart_ao_b_z { 11258c0cf40fSJerome Brunet mux { 11268c0cf40fSJerome Brunet groups = "uart_ao_tx_b_z", 11278c0cf40fSJerome Brunet "uart_ao_rx_b_z"; 11288c0cf40fSJerome Brunet function = "uart_ao_b_z"; 11291c5cc1c8SJerome Brunet bias-disable; 11308c0cf40fSJerome Brunet }; 11318c0cf40fSJerome Brunet }; 11328c0cf40fSJerome Brunet 11338c0cf40fSJerome Brunet uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { 11348c0cf40fSJerome Brunet mux { 11358c0cf40fSJerome Brunet groups = "uart_ao_cts_b_z", 11368c0cf40fSJerome Brunet "uart_ao_rts_b_z"; 11378c0cf40fSJerome Brunet function = "uart_ao_b_z"; 11381c5cc1c8SJerome Brunet bias-disable; 11398c0cf40fSJerome Brunet }; 11408c0cf40fSJerome Brunet }; 11418c0cf40fSJerome Brunet }; 11428c0cf40fSJerome Brunet }; 11438c0cf40fSJerome Brunet 11448c0cf40fSJerome Brunet hiubus: bus@ff63c000 { 11458c0cf40fSJerome Brunet compatible = "simple-bus"; 11468c0cf40fSJerome Brunet reg = <0x0 0xff63c000 0x0 0x1c00>; 11478c0cf40fSJerome Brunet #address-cells = <2>; 11488c0cf40fSJerome Brunet #size-cells = <2>; 11498c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; 11508c0cf40fSJerome Brunet 11518c0cf40fSJerome Brunet sysctrl: system-controller@0 { 11528c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-hhi-sysctrl", 1153445f2bdaSNeil Armstrong "simple-mfd", "syscon"; 11548c0cf40fSJerome Brunet reg = <0 0 0 0x400>; 11558c0cf40fSJerome Brunet 11568c0cf40fSJerome Brunet clkc: clock-controller { 11578c0cf40fSJerome Brunet compatible = "amlogic,axg-clkc"; 11588c0cf40fSJerome Brunet #clock-cells = <1>; 115916361ff2SJerome Brunet clocks = <&xtal>; 116016361ff2SJerome Brunet clock-names = "xtal"; 11618c0cf40fSJerome Brunet }; 11628c0cf40fSJerome Brunet }; 11638c0cf40fSJerome Brunet }; 11648c0cf40fSJerome Brunet 11659fdff382SJerome Brunet mailbox: mailbox@ff63c404 { 116601efc19cSNeil Armstrong compatible = "amlogic,meson-gxbb-mhu"; 11679fdff382SJerome Brunet reg = <0 0xff63c404 0 0x4c>; 11688c0cf40fSJerome Brunet interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 11698c0cf40fSJerome Brunet <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 11708c0cf40fSJerome Brunet <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 11718c0cf40fSJerome Brunet #mbox-cells = <1>; 1172221cf34bSNan Li }; 1173221cf34bSNan Li 11748909e722SJerome Brunet audio: bus@ff642000 { 11758909e722SJerome Brunet compatible = "simple-bus"; 11768909e722SJerome Brunet reg = <0x0 0xff642000 0x0 0x2000>; 11778909e722SJerome Brunet #address-cells = <2>; 11788909e722SJerome Brunet #size-cells = <2>; 11798909e722SJerome Brunet ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>; 11808909e722SJerome Brunet 11818909e722SJerome Brunet clkc_audio: clock-controller@0 { 11828909e722SJerome Brunet compatible = "amlogic,axg-audio-clkc"; 11838909e722SJerome Brunet reg = <0x0 0x0 0x0 0xb4>; 11848909e722SJerome Brunet #clock-cells = <1>; 11858909e722SJerome Brunet 11868909e722SJerome Brunet clocks = <&clkc CLKID_AUDIO>, 11878909e722SJerome Brunet <&clkc CLKID_MPLL0>, 11888909e722SJerome Brunet <&clkc CLKID_MPLL1>, 11898909e722SJerome Brunet <&clkc CLKID_MPLL2>, 11908909e722SJerome Brunet <&clkc CLKID_MPLL3>, 11918909e722SJerome Brunet <&clkc CLKID_HIFI_PLL>, 11928909e722SJerome Brunet <&clkc CLKID_FCLK_DIV3>, 11938909e722SJerome Brunet <&clkc CLKID_FCLK_DIV4>, 11948909e722SJerome Brunet <&clkc CLKID_GP0_PLL>; 11958909e722SJerome Brunet clock-names = "pclk", 11968909e722SJerome Brunet "mst_in0", 11978909e722SJerome Brunet "mst_in1", 11988909e722SJerome Brunet "mst_in2", 11998909e722SJerome Brunet "mst_in3", 12008909e722SJerome Brunet "mst_in4", 12018909e722SJerome Brunet "mst_in5", 12028909e722SJerome Brunet "mst_in6", 12038909e722SJerome Brunet "mst_in7"; 12048909e722SJerome Brunet 12058909e722SJerome Brunet resets = <&reset RESET_AUDIO>; 12068909e722SJerome Brunet }; 120766d58a8fSJerome Brunet 1208f2b8f6a9SJerome Brunet toddr_a: audio-controller@100 { 1209f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1210301b94d4SJerome Brunet reg = <0x0 0x100 0x0 0x2c>; 1211f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1212f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_A"; 1213f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>; 1214f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_A>; 1215f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_A>; 1216be638075SJerome Brunet amlogic,fifo-depth = <512>; 1217f2b8f6a9SJerome Brunet status = "disabled"; 1218f2b8f6a9SJerome Brunet }; 1219f2b8f6a9SJerome Brunet 1220f2b8f6a9SJerome Brunet toddr_b: audio-controller@140 { 1221f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1222301b94d4SJerome Brunet reg = <0x0 0x140 0x0 0x2c>; 1223f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1224f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_B"; 1225f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>; 1226f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_B>; 1227f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_B>; 1228be638075SJerome Brunet amlogic,fifo-depth = <256>; 1229f2b8f6a9SJerome Brunet status = "disabled"; 1230f2b8f6a9SJerome Brunet }; 1231f2b8f6a9SJerome Brunet 1232f2b8f6a9SJerome Brunet toddr_c: audio-controller@180 { 1233f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1234301b94d4SJerome Brunet reg = <0x0 0x180 0x0 0x2c>; 1235f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1236f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_C"; 1237f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>; 1238f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_C>; 1239f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_C>; 1240be638075SJerome Brunet amlogic,fifo-depth = <256>; 1241f2b8f6a9SJerome Brunet status = "disabled"; 1242f2b8f6a9SJerome Brunet }; 1243f2b8f6a9SJerome Brunet 1244f2b8f6a9SJerome Brunet frddr_a: audio-controller@1c0 { 1245f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1246301b94d4SJerome Brunet reg = <0x0 0x1c0 0x0 0x2c>; 1247f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1248f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_A"; 1249f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 1250f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 1251f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_A>; 1252be638075SJerome Brunet amlogic,fifo-depth = <512>; 1253f2b8f6a9SJerome Brunet status = "disabled"; 1254f2b8f6a9SJerome Brunet }; 1255f2b8f6a9SJerome Brunet 1256f2b8f6a9SJerome Brunet frddr_b: audio-controller@200 { 1257f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1258301b94d4SJerome Brunet reg = <0x0 0x200 0x0 0x2c>; 1259f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1260f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_B"; 1261f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 1262f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; 1263f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_B>; 1264be638075SJerome Brunet amlogic,fifo-depth = <256>; 1265f2b8f6a9SJerome Brunet status = "disabled"; 1266f2b8f6a9SJerome Brunet }; 1267f2b8f6a9SJerome Brunet 1268f2b8f6a9SJerome Brunet frddr_c: audio-controller@240 { 1269f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1270301b94d4SJerome Brunet reg = <0x0 0x240 0x0 0x2c>; 1271f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1272f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_C"; 1273f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 1274f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; 1275f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_C>; 1276be638075SJerome Brunet amlogic,fifo-depth = <256>; 1277f2b8f6a9SJerome Brunet status = "disabled"; 1278f2b8f6a9SJerome Brunet }; 1279f2b8f6a9SJerome Brunet 128066d58a8fSJerome Brunet arb: reset-controller@280 { 128166d58a8fSJerome Brunet compatible = "amlogic,meson-axg-audio-arb"; 128266d58a8fSJerome Brunet reg = <0x0 0x280 0x0 0x4>; 128366d58a8fSJerome Brunet #reset-cells = <1>; 128466d58a8fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 128566d58a8fSJerome Brunet }; 1286f08c52deSJerome Brunet 1287bf8e4790SJerome Brunet tdmin_a: audio-controller@300 { 1288bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1289bf8e4790SJerome Brunet reg = <0x0 0x300 0x0 0x40>; 1290bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_A"; 1291bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 1292bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 1293bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 1294bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 1295bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 1296bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1297bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1298bf8e4790SJerome Brunet status = "disabled"; 1299bf8e4790SJerome Brunet }; 1300bf8e4790SJerome Brunet 1301bf8e4790SJerome Brunet tdmin_b: audio-controller@340 { 1302bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1303bf8e4790SJerome Brunet reg = <0x0 0x340 0x0 0x40>; 1304bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_B"; 1305bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 1306bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 1307bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 1308bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 1309bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 1310bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1311bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1312bf8e4790SJerome Brunet status = "disabled"; 1313bf8e4790SJerome Brunet }; 1314bf8e4790SJerome Brunet 1315bf8e4790SJerome Brunet tdmin_c: audio-controller@380 { 1316bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1317bf8e4790SJerome Brunet reg = <0x0 0x380 0x0 0x40>; 1318bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_C"; 1319bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 1320bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 1321bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 1322bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 1323bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 1324bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1325bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1326bf8e4790SJerome Brunet status = "disabled"; 1327bf8e4790SJerome Brunet }; 1328bf8e4790SJerome Brunet 1329bf8e4790SJerome Brunet tdmin_lb: audio-controller@3c0 { 1330bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1331bf8e4790SJerome Brunet reg = <0x0 0x3c0 0x0 0x40>; 1332bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_LB"; 1333bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 1334bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 1335bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 1336bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 1337bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 1338bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1339bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1340bf8e4790SJerome Brunet status = "disabled"; 1341bf8e4790SJerome Brunet }; 1342bf8e4790SJerome Brunet 13435e6a18acSJerome Brunet spdifin: audio-controller@400 { 13445e6a18acSJerome Brunet compatible = "amlogic,axg-spdifin"; 13455e6a18acSJerome Brunet reg = <0x0 0x400 0x0 0x30>; 13465e6a18acSJerome Brunet #sound-dai-cells = <0>; 13475e6a18acSJerome Brunet sound-name-prefix = "SPDIFIN"; 13485e6a18acSJerome Brunet interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; 13495e6a18acSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, 13505e6a18acSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; 13515e6a18acSJerome Brunet clock-names = "pclk", "refclk"; 13525e6a18acSJerome Brunet status = "disabled"; 13535e6a18acSJerome Brunet }; 13545e6a18acSJerome Brunet 1355f08c52deSJerome Brunet spdifout: audio-controller@480 { 1356f08c52deSJerome Brunet compatible = "amlogic,axg-spdifout"; 1357f08c52deSJerome Brunet reg = <0x0 0x480 0x0 0x50>; 1358f08c52deSJerome Brunet #sound-dai-cells = <0>; 1359f08c52deSJerome Brunet sound-name-prefix = "SPDIFOUT"; 1360f08c52deSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, 1361f08c52deSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; 1362f08c52deSJerome Brunet clock-names = "pclk", "mclk"; 1363f08c52deSJerome Brunet status = "disabled"; 1364f08c52deSJerome Brunet }; 1365fd916739SJerome Brunet 1366fd916739SJerome Brunet tdmout_a: audio-controller@500 { 1367fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1368fd916739SJerome Brunet reg = <0x0 0x500 0x0 0x40>; 1369fd916739SJerome Brunet sound-name-prefix = "TDMOUT_A"; 1370fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, 1371fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, 1372fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, 1373fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, 1374fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; 1375fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1376fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1377fd916739SJerome Brunet status = "disabled"; 1378fd916739SJerome Brunet }; 1379fd916739SJerome Brunet 1380fd916739SJerome Brunet tdmout_b: audio-controller@540 { 1381fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1382fd916739SJerome Brunet reg = <0x0 0x540 0x0 0x40>; 1383fd916739SJerome Brunet sound-name-prefix = "TDMOUT_B"; 1384fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, 1385fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, 1386fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, 1387fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, 1388fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; 1389fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1390fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1391fd916739SJerome Brunet status = "disabled"; 1392fd916739SJerome Brunet }; 1393fd916739SJerome Brunet 1394fd916739SJerome Brunet tdmout_c: audio-controller@580 { 1395fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1396fd916739SJerome Brunet reg = <0x0 0x580 0x0 0x40>; 1397fd916739SJerome Brunet sound-name-prefix = "TDMOUT_C"; 1398fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, 1399fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, 1400fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, 1401fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, 1402fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; 1403fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1404fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1405fd916739SJerome Brunet status = "disabled"; 1406fd916739SJerome Brunet }; 14078909e722SJerome Brunet }; 14088909e722SJerome Brunet 14090cb6c604SKevin Hilman aobus: bus@ff800000 { 14109d59b708SYixun Lan compatible = "simple-bus"; 14119d59b708SYixun Lan reg = <0x0 0xff800000 0x0 0x100000>; 14129d59b708SYixun Lan #address-cells = <2>; 14139d59b708SYixun Lan #size-cells = <2>; 14149d59b708SYixun Lan ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; 14159d59b708SYixun Lan 1416e03421ecSQiufang Dai sysctrl_AO: sys-ctrl@0 { 1417445f2bdaSNeil Armstrong compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon"; 1418e03421ecSQiufang Dai reg = <0x0 0x0 0x0 0x100>; 1419e03421ecSQiufang Dai 1420e03421ecSQiufang Dai clkc_AO: clock-controller { 1421e03421ecSQiufang Dai compatible = "amlogic,meson-axg-aoclkc"; 1422e03421ecSQiufang Dai #clock-cells = <1>; 1423e03421ecSQiufang Dai #reset-cells = <1>; 142416361ff2SJerome Brunet clocks = <&xtal>, <&clkc CLKID_CLK81>; 142516361ff2SJerome Brunet clock-names = "xtal", "mpeg-clk"; 1426e03421ecSQiufang Dai }; 1427e03421ecSQiufang Dai }; 1428e03421ecSQiufang Dai 1429de05ded6SXingyu Chen pinctrl_aobus: pinctrl@14 { 1430de05ded6SXingyu Chen compatible = "amlogic,meson-axg-aobus-pinctrl"; 1431de05ded6SXingyu Chen #address-cells = <2>; 1432de05ded6SXingyu Chen #size-cells = <2>; 1433de05ded6SXingyu Chen ranges; 1434de05ded6SXingyu Chen 1435de05ded6SXingyu Chen gpio_ao: bank@14 { 1436de05ded6SXingyu Chen reg = <0x0 0x00014 0x0 0x8>, 1437de05ded6SXingyu Chen <0x0 0x0002c 0x0 0x4>, 1438de05ded6SXingyu Chen <0x0 0x00024 0x0 0x8>; 1439de05ded6SXingyu Chen reg-names = "mux", "pull", "gpio"; 1440de05ded6SXingyu Chen gpio-controller; 1441de05ded6SXingyu Chen #gpio-cells = <2>; 1442de05ded6SXingyu Chen gpio-ranges = <&pinctrl_aobus 0 0 15>; 1443de05ded6SXingyu Chen }; 14447bd46a79SYixun Lan 1445c054b6c2SJerome Brunet i2c_ao_sck_4_pins: i2c_ao_sck_4 { 1446c054b6c2SJerome Brunet mux { 1447c054b6c2SJerome Brunet groups = "i2c_ao_sck_4"; 1448c054b6c2SJerome Brunet function = "i2c_ao"; 14491c5cc1c8SJerome Brunet bias-disable; 1450c054b6c2SJerome Brunet }; 1451c054b6c2SJerome Brunet }; 1452c054b6c2SJerome Brunet 1453c054b6c2SJerome Brunet i2c_ao_sck_8_pins: i2c_ao_sck_8 { 1454c054b6c2SJerome Brunet mux { 1455c054b6c2SJerome Brunet groups = "i2c_ao_sck_8"; 1456c054b6c2SJerome Brunet function = "i2c_ao"; 14571c5cc1c8SJerome Brunet bias-disable; 1458c054b6c2SJerome Brunet }; 1459c054b6c2SJerome Brunet }; 1460c054b6c2SJerome Brunet 1461c054b6c2SJerome Brunet i2c_ao_sck_10_pins: i2c_ao_sck_10 { 1462c054b6c2SJerome Brunet mux { 1463c054b6c2SJerome Brunet groups = "i2c_ao_sck_10"; 1464c054b6c2SJerome Brunet function = "i2c_ao"; 14651c5cc1c8SJerome Brunet bias-disable; 1466c054b6c2SJerome Brunet }; 1467c054b6c2SJerome Brunet }; 1468c054b6c2SJerome Brunet 1469c054b6c2SJerome Brunet i2c_ao_sda_5_pins: i2c_ao_sda_5 { 1470c054b6c2SJerome Brunet mux { 1471c054b6c2SJerome Brunet groups = "i2c_ao_sda_5"; 1472c054b6c2SJerome Brunet function = "i2c_ao"; 14731c5cc1c8SJerome Brunet bias-disable; 1474c054b6c2SJerome Brunet }; 1475c054b6c2SJerome Brunet }; 1476c054b6c2SJerome Brunet 1477c054b6c2SJerome Brunet i2c_ao_sda_9_pins: i2c_ao_sda_9 { 1478c054b6c2SJerome Brunet mux { 1479c054b6c2SJerome Brunet groups = "i2c_ao_sda_9"; 1480c054b6c2SJerome Brunet function = "i2c_ao"; 14811c5cc1c8SJerome Brunet bias-disable; 1482c054b6c2SJerome Brunet }; 1483c054b6c2SJerome Brunet }; 1484c054b6c2SJerome Brunet 1485c054b6c2SJerome Brunet i2c_ao_sda_11_pins: i2c_ao_sda_11 { 1486c054b6c2SJerome Brunet mux { 1487c054b6c2SJerome Brunet groups = "i2c_ao_sda_11"; 1488c054b6c2SJerome Brunet function = "i2c_ao"; 14891c5cc1c8SJerome Brunet bias-disable; 1490c054b6c2SJerome Brunet }; 1491c054b6c2SJerome Brunet }; 1492c054b6c2SJerome Brunet 14937bd46a79SYixun Lan remote_input_ao_pins: remote_input_ao { 14947bd46a79SYixun Lan mux { 14957bd46a79SYixun Lan groups = "remote_input_ao"; 14967bd46a79SYixun Lan function = "remote_input_ao"; 14971c5cc1c8SJerome Brunet bias-disable; 14987bd46a79SYixun Lan }; 14997bd46a79SYixun Lan }; 15004eae66a6SYixun Lan 15014eae66a6SYixun Lan uart_ao_a_pins: uart_ao_a { 15024eae66a6SYixun Lan mux { 15034eae66a6SYixun Lan groups = "uart_ao_tx_a", 15044eae66a6SYixun Lan "uart_ao_rx_a"; 15054eae66a6SYixun Lan function = "uart_ao_a"; 15061c5cc1c8SJerome Brunet bias-disable; 15074eae66a6SYixun Lan }; 15084eae66a6SYixun Lan }; 15094eae66a6SYixun Lan 15104eae66a6SYixun Lan uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { 15114eae66a6SYixun Lan mux { 15124eae66a6SYixun Lan groups = "uart_ao_cts_a", 15134eae66a6SYixun Lan "uart_ao_rts_a"; 15144eae66a6SYixun Lan function = "uart_ao_a"; 15151c5cc1c8SJerome Brunet bias-disable; 15164eae66a6SYixun Lan }; 15174eae66a6SYixun Lan }; 15184eae66a6SYixun Lan 15194eae66a6SYixun Lan uart_ao_b_pins: uart_ao_b { 15204eae66a6SYixun Lan mux { 15214eae66a6SYixun Lan groups = "uart_ao_tx_b", 15224eae66a6SYixun Lan "uart_ao_rx_b"; 15234eae66a6SYixun Lan function = "uart_ao_b"; 15241c5cc1c8SJerome Brunet bias-disable; 15254eae66a6SYixun Lan }; 15264eae66a6SYixun Lan }; 15274eae66a6SYixun Lan 15284eae66a6SYixun Lan uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { 15294eae66a6SYixun Lan mux { 15304eae66a6SYixun Lan groups = "uart_ao_cts_b", 15314eae66a6SYixun Lan "uart_ao_rts_b"; 15324eae66a6SYixun Lan function = "uart_ao_b"; 15331c5cc1c8SJerome Brunet bias-disable; 15344eae66a6SYixun Lan }; 15354eae66a6SYixun Lan }; 1536de05ded6SXingyu Chen }; 1537de05ded6SXingyu Chen 1538a04c18cbSJerome Brunet sec_AO: ao-secure@140 { 1539a04c18cbSJerome Brunet compatible = "amlogic,meson-gx-ao-secure", "syscon"; 1540a04c18cbSJerome Brunet reg = <0x0 0x140 0x0 0x140>; 1541a04c18cbSJerome Brunet amlogic,has-chip-id; 1542a04c18cbSJerome Brunet }; 1543a04c18cbSJerome Brunet 15444a81e5ddSJian Hu pwm_AO_cd: pwm@2000 { 1545b4ff05caSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 15464a81e5ddSJian Hu reg = <0x0 0x02000 0x0 0x20>; 15474a81e5ddSJian Hu #pwm-cells = <3>; 15484a81e5ddSJian Hu status = "disabled"; 15494a81e5ddSJian Hu }; 15504a81e5ddSJian Hu 15519d59b708SYixun Lan uart_AO: serial@3000 { 15529d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 15539d59b708SYixun Lan reg = <0x0 0x3000 0x0 0x18>; 15549d59b708SYixun Lan interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 15559adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; 15569d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 15579d59b708SYixun Lan status = "disabled"; 15589d59b708SYixun Lan }; 15599d59b708SYixun Lan 15609d59b708SYixun Lan uart_AO_B: serial@4000 { 15619d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 15629d59b708SYixun Lan reg = <0x0 0x4000 0x0 0x18>; 15639d59b708SYixun Lan interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 15649adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; 15659d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 15669d59b708SYixun Lan status = "disabled"; 15679d59b708SYixun Lan }; 15687bd46a79SYixun Lan 15698c0cf40fSJerome Brunet i2c_AO: i2c@5000 { 15708c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 15718c0cf40fSJerome Brunet reg = <0x0 0x05000 0x0 0x20>; 15728c0cf40fSJerome Brunet interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 15738c0cf40fSJerome Brunet clocks = <&clkc CLKID_AO_I2C>; 15748c0cf40fSJerome Brunet #address-cells = <1>; 15758c0cf40fSJerome Brunet #size-cells = <0>; 15768c0cf40fSJerome Brunet status = "disabled"; 15778c0cf40fSJerome Brunet }; 15788c0cf40fSJerome Brunet 15798c0cf40fSJerome Brunet pwm_AO_ab: pwm@7000 { 15808c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 15818c0cf40fSJerome Brunet reg = <0x0 0x07000 0x0 0x20>; 15828c0cf40fSJerome Brunet #pwm-cells = <3>; 15838c0cf40fSJerome Brunet status = "disabled"; 15848c0cf40fSJerome Brunet }; 15858c0cf40fSJerome Brunet 15867bd46a79SYixun Lan ir: ir@8000 { 15877bd46a79SYixun Lan compatible = "amlogic,meson-gxbb-ir"; 15887bd46a79SYixun Lan reg = <0x0 0x8000 0x0 0x20>; 15897bd46a79SYixun Lan interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 15907bd46a79SYixun Lan status = "disabled"; 15917bd46a79SYixun Lan }; 1592a51b74eaSXingyu Chen 1593a51b74eaSXingyu Chen saradc: adc@9000 { 1594a51b74eaSXingyu Chen compatible = "amlogic,meson-axg-saradc", 1595a51b74eaSXingyu Chen "amlogic,meson-saradc"; 1596a51b74eaSXingyu Chen reg = <0x0 0x9000 0x0 0x38>; 1597a51b74eaSXingyu Chen #io-channel-cells = <1>; 1598a51b74eaSXingyu Chen interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 1599a51b74eaSXingyu Chen clocks = <&xtal>, 1600a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC>, 1601a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_CLK>, 1602a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_SEL>; 1603a51b74eaSXingyu Chen clock-names = "clkin", "core", "adc_clk", "adc_sel"; 1604a51b74eaSXingyu Chen status = "disabled"; 1605a51b74eaSXingyu Chen }; 16069d59b708SYixun Lan }; 16078c0cf40fSJerome Brunet 16088c0cf40fSJerome Brunet gic: interrupt-controller@ffc01000 { 16098c0cf40fSJerome Brunet compatible = "arm,gic-400"; 16108c0cf40fSJerome Brunet reg = <0x0 0xffc01000 0 0x1000>, 16118c0cf40fSJerome Brunet <0x0 0xffc02000 0 0x2000>, 16128c0cf40fSJerome Brunet <0x0 0xffc04000 0 0x2000>, 16138c0cf40fSJerome Brunet <0x0 0xffc06000 0 0x2000>; 16148c0cf40fSJerome Brunet interrupt-controller; 16158c0cf40fSJerome Brunet interrupts = <GIC_PPI 9 16168c0cf40fSJerome Brunet (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 16178c0cf40fSJerome Brunet #interrupt-cells = <3>; 16188c0cf40fSJerome Brunet #address-cells = <0>; 16198c0cf40fSJerome Brunet }; 16208c0cf40fSJerome Brunet 16218c0cf40fSJerome Brunet cbus: bus@ffd00000 { 16228c0cf40fSJerome Brunet compatible = "simple-bus"; 16238c0cf40fSJerome Brunet reg = <0x0 0xffd00000 0x0 0x25000>; 16248c0cf40fSJerome Brunet #address-cells = <2>; 16258c0cf40fSJerome Brunet #size-cells = <2>; 16268c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; 16278c0cf40fSJerome Brunet 16288c0cf40fSJerome Brunet reset: reset-controller@1004 { 16298c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-reset"; 16308c0cf40fSJerome Brunet reg = <0x0 0x01004 0x0 0x9c>; 16318c0cf40fSJerome Brunet #reset-cells = <1>; 16328c0cf40fSJerome Brunet }; 16338c0cf40fSJerome Brunet 16348c0cf40fSJerome Brunet gpio_intc: interrupt-controller@f080 { 1635cbddb02eSCarlo Caione compatible = "amlogic,meson-axg-gpio-intc", 1636cbddb02eSCarlo Caione "amlogic,meson-gpio-intc"; 16378c0cf40fSJerome Brunet reg = <0x0 0xf080 0x0 0x10>; 16388c0cf40fSJerome Brunet interrupt-controller; 16398c0cf40fSJerome Brunet #interrupt-cells = <2>; 16408c0cf40fSJerome Brunet amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 16418c0cf40fSJerome Brunet }; 16428c0cf40fSJerome Brunet 16436f31ba17SCarlo Caione watchdog@f0d0 { 16446f31ba17SCarlo Caione compatible = "amlogic,meson-gxbb-wdt"; 16456f31ba17SCarlo Caione reg = <0x0 0xf0d0 0x0 0x10>; 16466f31ba17SCarlo Caione clocks = <&xtal>; 16476f31ba17SCarlo Caione }; 16486f31ba17SCarlo Caione 16498c0cf40fSJerome Brunet pwm_ab: pwm@1b000 { 16508c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 16518c0cf40fSJerome Brunet reg = <0x0 0x1b000 0x0 0x20>; 16528c0cf40fSJerome Brunet #pwm-cells = <3>; 16538c0cf40fSJerome Brunet status = "disabled"; 16548c0cf40fSJerome Brunet }; 16558c0cf40fSJerome Brunet 16568c0cf40fSJerome Brunet pwm_cd: pwm@1a000 { 16578c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 16588c0cf40fSJerome Brunet reg = <0x0 0x1a000 0x0 0x20>; 16598c0cf40fSJerome Brunet #pwm-cells = <3>; 16608c0cf40fSJerome Brunet status = "disabled"; 16618c0cf40fSJerome Brunet }; 16628c0cf40fSJerome Brunet 16638c0cf40fSJerome Brunet spicc0: spi@13000 { 16648c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 16658c0cf40fSJerome Brunet reg = <0x0 0x13000 0x0 0x3c>; 16668c0cf40fSJerome Brunet interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 16678c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC0>; 16688c0cf40fSJerome Brunet clock-names = "core"; 16698c0cf40fSJerome Brunet #address-cells = <1>; 16708c0cf40fSJerome Brunet #size-cells = <0>; 16718c0cf40fSJerome Brunet status = "disabled"; 16728c0cf40fSJerome Brunet }; 16738c0cf40fSJerome Brunet 16748c0cf40fSJerome Brunet spicc1: spi@15000 { 16758c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 16768c0cf40fSJerome Brunet reg = <0x0 0x15000 0x0 0x3c>; 16778c0cf40fSJerome Brunet interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 16788c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC1>; 16798c0cf40fSJerome Brunet clock-names = "core"; 16808c0cf40fSJerome Brunet #address-cells = <1>; 16818c0cf40fSJerome Brunet #size-cells = <0>; 16828c0cf40fSJerome Brunet status = "disabled"; 16838c0cf40fSJerome Brunet }; 16848c0cf40fSJerome Brunet 1685fea888bdSJerome Brunet clk_msr: clock-measure@18000 { 1686fea888bdSJerome Brunet compatible = "amlogic,meson-axg-clk-measure"; 1687fea888bdSJerome Brunet reg = <0x0 0x18000 0x0 0x10>; 1688fea888bdSJerome Brunet }; 1689fea888bdSJerome Brunet 16908c0cf40fSJerome Brunet i2c3: i2c@1c000 { 16918c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16928c0cf40fSJerome Brunet reg = <0x0 0x1c000 0x0 0x20>; 16938c0cf40fSJerome Brunet interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; 16948c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 16958c0cf40fSJerome Brunet #address-cells = <1>; 16968c0cf40fSJerome Brunet #size-cells = <0>; 16978c0cf40fSJerome Brunet status = "disabled"; 16988c0cf40fSJerome Brunet }; 16998c0cf40fSJerome Brunet 17008c0cf40fSJerome Brunet i2c2: i2c@1d000 { 17018c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17028c0cf40fSJerome Brunet reg = <0x0 0x1d000 0x0 0x20>; 17038c0cf40fSJerome Brunet interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 17048c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17058c0cf40fSJerome Brunet #address-cells = <1>; 17068c0cf40fSJerome Brunet #size-cells = <0>; 17078c0cf40fSJerome Brunet status = "disabled"; 17088c0cf40fSJerome Brunet }; 17098c0cf40fSJerome Brunet 17108c0cf40fSJerome Brunet i2c1: i2c@1e000 { 17118c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17128c0cf40fSJerome Brunet reg = <0x0 0x1e000 0x0 0x20>; 17138c0cf40fSJerome Brunet interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 17148c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17158c0cf40fSJerome Brunet #address-cells = <1>; 17168c0cf40fSJerome Brunet #size-cells = <0>; 17178c0cf40fSJerome Brunet status = "disabled"; 17188c0cf40fSJerome Brunet }; 17198c0cf40fSJerome Brunet 17208c0cf40fSJerome Brunet i2c0: i2c@1f000 { 17218c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17228c0cf40fSJerome Brunet reg = <0x0 0x1f000 0x0 0x20>; 17238c0cf40fSJerome Brunet interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 17248c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17258c0cf40fSJerome Brunet #address-cells = <1>; 17268c0cf40fSJerome Brunet #size-cells = <0>; 17278c0cf40fSJerome Brunet status = "disabled"; 17288c0cf40fSJerome Brunet }; 17298c0cf40fSJerome Brunet 17308c0cf40fSJerome Brunet uart_B: serial@23000 { 17318c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 17328c0cf40fSJerome Brunet reg = <0x0 0x23000 0x0 0x18>; 17338c0cf40fSJerome Brunet interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 17348c0cf40fSJerome Brunet status = "disabled"; 17358c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; 17368c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 17378c0cf40fSJerome Brunet }; 17388c0cf40fSJerome Brunet 17398c0cf40fSJerome Brunet uart_A: serial@24000 { 17408c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 17418c0cf40fSJerome Brunet reg = <0x0 0x24000 0x0 0x18>; 17428c0cf40fSJerome Brunet interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 17438c0cf40fSJerome Brunet status = "disabled"; 17448c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; 17458c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 17468c0cf40fSJerome Brunet }; 17478c0cf40fSJerome Brunet }; 17488c0cf40fSJerome Brunet 17498c0cf40fSJerome Brunet apb: bus@ffe00000 { 17508c0cf40fSJerome Brunet compatible = "simple-bus"; 17518c0cf40fSJerome Brunet reg = <0x0 0xffe00000 0x0 0x200000>; 17528c0cf40fSJerome Brunet #address-cells = <2>; 17538c0cf40fSJerome Brunet #size-cells = <2>; 17548c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; 17558c0cf40fSJerome Brunet 17568c0cf40fSJerome Brunet sd_emmc_b: sd@5000 { 17578c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 17588c0cf40fSJerome Brunet reg = <0x0 0x5000 0x0 0x800>; 17598c0cf40fSJerome Brunet interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 17608c0cf40fSJerome Brunet status = "disabled"; 17618c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_B>, 17628c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_B_CLK0>, 17638c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 17648c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 17658c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_B>; 17668c0cf40fSJerome Brunet }; 17678c0cf40fSJerome Brunet 17688c0cf40fSJerome Brunet sd_emmc_c: mmc@7000 { 17698c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 17708c0cf40fSJerome Brunet reg = <0x0 0x7000 0x0 0x800>; 17718c0cf40fSJerome Brunet interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 17728c0cf40fSJerome Brunet status = "disabled"; 17738c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_C>, 17748c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_C_CLK0>, 17758c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 17768c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 17778c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_C>; 17788c0cf40fSJerome Brunet }; 17791b208babSNeil Armstrong 17801b208babSNeil Armstrong usb2_phy1: phy@9020 { 17811b208babSNeil Armstrong compatible = "amlogic,meson-gxl-usb2-phy"; 17821b208babSNeil Armstrong #phy-cells = <0>; 17831b208babSNeil Armstrong reg = <0x0 0x9020 0x0 0x20>; 17841b208babSNeil Armstrong clocks = <&clkc CLKID_USB>; 17851b208babSNeil Armstrong clock-names = "phy"; 17861b208babSNeil Armstrong resets = <&reset RESET_USB_OTG>; 17871b208babSNeil Armstrong reset-names = "phy"; 17881b208babSNeil Armstrong }; 17898c0cf40fSJerome Brunet }; 17908c0cf40fSJerome Brunet 17918c0cf40fSJerome Brunet sram: sram@fffc0000 { 17929ecded10SNeil Armstrong compatible = "mmio-sram"; 17938c0cf40fSJerome Brunet reg = <0x0 0xfffc0000 0x0 0x20000>; 17948c0cf40fSJerome Brunet #address-cells = <1>; 17958c0cf40fSJerome Brunet #size-cells = <1>; 17968c0cf40fSJerome Brunet ranges = <0 0x0 0xfffc0000 0x20000>; 17978c0cf40fSJerome Brunet 17989ecded10SNeil Armstrong cpu_scp_lpri: scp-sram@13000 { 17998c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 18008c0cf40fSJerome Brunet reg = <0x13000 0x400>; 18018c0cf40fSJerome Brunet }; 18028c0cf40fSJerome Brunet 18039ecded10SNeil Armstrong cpu_scp_hpri: scp-sram@13400 { 18048c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 18058c0cf40fSJerome Brunet reg = <0x13400 0x400>; 18068c0cf40fSJerome Brunet }; 18078c0cf40fSJerome Brunet }; 18088c0cf40fSJerome Brunet }; 18098c0cf40fSJerome Brunet 18108c0cf40fSJerome Brunet timer { 18118c0cf40fSJerome Brunet compatible = "arm,armv8-timer"; 18128c0cf40fSJerome Brunet interrupts = <GIC_PPI 13 18138c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18148c0cf40fSJerome Brunet <GIC_PPI 14 18158c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18168c0cf40fSJerome Brunet <GIC_PPI 11 18178c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18188c0cf40fSJerome Brunet <GIC_PPI 10 18198c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 18208c0cf40fSJerome Brunet }; 18218c0cf40fSJerome Brunet 18228c0cf40fSJerome Brunet xtal: xtal-clk { 18238c0cf40fSJerome Brunet compatible = "fixed-clock"; 18248c0cf40fSJerome Brunet clock-frequency = <24000000>; 18258c0cf40fSJerome Brunet clock-output-names = "xtal"; 18268c0cf40fSJerome Brunet #clock-cells = <0>; 18279d59b708SYixun Lan }; 18289d59b708SYixun Lan}; 1829