1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
29d59b708SYixun Lan/*
39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
49d59b708SYixun Lan */
59d59b708SYixun Lan
68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h>
78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h>
806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h>
98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h>
10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h>
118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h>
128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h>
13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
159d59b708SYixun Lan
169d59b708SYixun Lan/ {
179d59b708SYixun Lan	compatible = "amlogic,meson-axg";
189d59b708SYixun Lan
199d59b708SYixun Lan	interrupt-parent = <&gic>;
209d59b708SYixun Lan	#address-cells = <2>;
219d59b708SYixun Lan	#size-cells = <2>;
229d59b708SYixun Lan
23fbd5cbc5SJerome Brunet	tdmif_a: audio-controller-0 {
248c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
258c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
268c0cf40fSJerome Brunet		sound-name-prefix = "TDM_A";
278c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
288c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
298c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
308c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
318c0cf40fSJerome Brunet		status = "disabled";
329d59b708SYixun Lan	};
339d59b708SYixun Lan
34fbd5cbc5SJerome Brunet	tdmif_b: audio-controller-1 {
358c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
368c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
378c0cf40fSJerome Brunet		sound-name-prefix = "TDM_B";
388c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
398c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
408c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
418c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
428c0cf40fSJerome Brunet		status = "disabled";
439d59b708SYixun Lan	};
448c0cf40fSJerome Brunet
45fbd5cbc5SJerome Brunet	tdmif_c: audio-controller-2 {
468c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
478c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
488c0cf40fSJerome Brunet		sound-name-prefix = "TDM_C";
498c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
508c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
518c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
528c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
538c0cf40fSJerome Brunet		status = "disabled";
548c0cf40fSJerome Brunet	};
558c0cf40fSJerome Brunet
568c0cf40fSJerome Brunet	arm-pmu {
578c0cf40fSJerome Brunet		compatible = "arm,cortex-a53-pmu";
588c0cf40fSJerome Brunet		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
598c0cf40fSJerome Brunet			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
608c0cf40fSJerome Brunet			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
618c0cf40fSJerome Brunet			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
628c0cf40fSJerome Brunet		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
639d59b708SYixun Lan	};
649d59b708SYixun Lan
659d59b708SYixun Lan	cpus {
669d59b708SYixun Lan		#address-cells = <0x2>;
679d59b708SYixun Lan		#size-cells = <0x0>;
689d59b708SYixun Lan
699d59b708SYixun Lan		cpu0: cpu@0 {
709d59b708SYixun Lan			device_type = "cpu";
7131af04cdSRob Herring			compatible = "arm,cortex-a53";
729d59b708SYixun Lan			reg = <0x0 0x0>;
739d59b708SYixun Lan			enable-method = "psci";
749d59b708SYixun Lan			next-level-cache = <&l2>;
752c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
769d59b708SYixun Lan		};
779d59b708SYixun Lan
789d59b708SYixun Lan		cpu1: cpu@1 {
799d59b708SYixun Lan			device_type = "cpu";
8031af04cdSRob Herring			compatible = "arm,cortex-a53";
819d59b708SYixun Lan			reg = <0x0 0x1>;
829d59b708SYixun Lan			enable-method = "psci";
839d59b708SYixun Lan			next-level-cache = <&l2>;
842c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
859d59b708SYixun Lan		};
869d59b708SYixun Lan
879d59b708SYixun Lan		cpu2: cpu@2 {
889d59b708SYixun Lan			device_type = "cpu";
8931af04cdSRob Herring			compatible = "arm,cortex-a53";
909d59b708SYixun Lan			reg = <0x0 0x2>;
919d59b708SYixun Lan			enable-method = "psci";
929d59b708SYixun Lan			next-level-cache = <&l2>;
932c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
949d59b708SYixun Lan		};
959d59b708SYixun Lan
969d59b708SYixun Lan		cpu3: cpu@3 {
979d59b708SYixun Lan			device_type = "cpu";
9831af04cdSRob Herring			compatible = "arm,cortex-a53";
999d59b708SYixun Lan			reg = <0x0 0x3>;
1009d59b708SYixun Lan			enable-method = "psci";
1019d59b708SYixun Lan			next-level-cache = <&l2>;
1022c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
1039d59b708SYixun Lan		};
1049d59b708SYixun Lan
1059d59b708SYixun Lan		l2: l2-cache0 {
1069d59b708SYixun Lan			compatible = "cache";
1079d59b708SYixun Lan		};
1089d59b708SYixun Lan	};
1099d59b708SYixun Lan
11096dc5702SJerome Brunet	sm: secure-monitor {
11196dc5702SJerome Brunet		compatible = "amlogic,meson-gxbb-sm";
11296dc5702SJerome Brunet	};
11396dc5702SJerome Brunet
1149ab2d15cSJerome Brunet	efuse: efuse {
1159ab2d15cSJerome Brunet		compatible = "amlogic,meson-gxbb-efuse";
1169ab2d15cSJerome Brunet		clocks = <&clkc CLKID_EFUSE>;
1179ab2d15cSJerome Brunet		#address-cells = <1>;
1189ab2d15cSJerome Brunet		#size-cells = <1>;
1199ab2d15cSJerome Brunet		read-only;
120de82e74aSCarlo Caione		secure-monitor = <&sm>;
1219ab2d15cSJerome Brunet	};
1229ab2d15cSJerome Brunet
1239d59b708SYixun Lan	psci {
1249d59b708SYixun Lan		compatible = "arm,psci-1.0";
1259d59b708SYixun Lan		method = "smc";
1269d59b708SYixun Lan	};
1279d59b708SYixun Lan
1288c0cf40fSJerome Brunet	reserved-memory {
1298c0cf40fSJerome Brunet		#address-cells = <2>;
1308c0cf40fSJerome Brunet		#size-cells = <2>;
1318c0cf40fSJerome Brunet		ranges;
1328c0cf40fSJerome Brunet
1338c0cf40fSJerome Brunet		/* 16 MiB reserved for Hardware ROM Firmware */
1348c0cf40fSJerome Brunet		hwrom_reserved: hwrom@0 {
1358c0cf40fSJerome Brunet			reg = <0x0 0x0 0x0 0x1000000>;
1368c0cf40fSJerome Brunet			no-map;
13708307aabSJerome Brunet		};
13808307aabSJerome Brunet
1398c0cf40fSJerome Brunet		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
1408c0cf40fSJerome Brunet		secmon_reserved: secmon@5000000 {
1418c0cf40fSJerome Brunet			reg = <0x0 0x05000000 0x0 0x300000>;
1428c0cf40fSJerome Brunet			no-map;
14308307aabSJerome Brunet		};
1445e395e14SYixun Lan	};
1455e395e14SYixun Lan
1462c130695SJerome Brunet	scpi {
1472c130695SJerome Brunet		compatible = "arm,scpi-pre-1.0";
1482c130695SJerome Brunet		mboxes = <&mailbox 1 &mailbox 2>;
1492c130695SJerome Brunet		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
1502c130695SJerome Brunet
1512c130695SJerome Brunet		scpi_clocks: clocks {
1522c130695SJerome Brunet			compatible = "arm,scpi-clocks";
1532c130695SJerome Brunet
1542c130695SJerome Brunet			scpi_dvfs: clock-controller {
1552c130695SJerome Brunet				compatible = "arm,scpi-dvfs-clocks";
1562c130695SJerome Brunet				#clock-cells = <1>;
1572c130695SJerome Brunet				clock-indices = <0>;
1582c130695SJerome Brunet				clock-output-names = "vcpu";
1592c130695SJerome Brunet			};
1602c130695SJerome Brunet		};
1612c130695SJerome Brunet
1622c130695SJerome Brunet		scpi_sensors: sensors {
1632c130695SJerome Brunet			compatible = "amlogic,meson-gxbb-scpi-sensors";
1642c130695SJerome Brunet			#thermal-sensor-cells = <1>;
1652c130695SJerome Brunet		};
1662c130695SJerome Brunet	};
1672c130695SJerome Brunet
1689d59b708SYixun Lan	soc {
1699d59b708SYixun Lan		compatible = "simple-bus";
1709d59b708SYixun Lan		#address-cells = <2>;
1719d59b708SYixun Lan		#size-cells = <2>;
1729d59b708SYixun Lan		ranges;
1739d59b708SYixun Lan
1748c0cf40fSJerome Brunet		ethmac: ethernet@ff3f0000 {
1759d63f5d1SJerome Brunet			compatible = "amlogic,meson-axg-dwmac",
1769d63f5d1SJerome Brunet				     "snps,dwmac-3.70a",
1779d63f5d1SJerome Brunet				     "snps,dwmac";
1783ad6c9e3SNeil Armstrong			reg = <0x0 0xff3f0000 0x0 0x10000>,
1793ad6c9e3SNeil Armstrong			      <0x0 0xff634540 0x0 0x8>;
1808b3e6f89SCarlo Caione			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1818c0cf40fSJerome Brunet			interrupt-names = "macirq";
1828c0cf40fSJerome Brunet			clocks = <&clkc CLKID_ETH>,
1838c0cf40fSJerome Brunet				 <&clkc CLKID_FCLK_DIV2>,
1848c0cf40fSJerome Brunet				 <&clkc CLKID_MPLL2>;
1858c0cf40fSJerome Brunet			clock-names = "stmmaceth", "clkin0", "clkin1";
186ef68984eSJerome Brunet			rx-fifo-depth = <4096>;
187ef68984eSJerome Brunet			tx-fifo-depth = <2048>;
1888c0cf40fSJerome Brunet			status = "disabled";
1898c0cf40fSJerome Brunet		};
1908c0cf40fSJerome Brunet
191c362e4e0SJerome Brunet		pdm: audio-controller@ff632000 {
192c362e4e0SJerome Brunet			compatible = "amlogic,axg-pdm";
193c362e4e0SJerome Brunet			reg = <0x0 0xff632000 0x0 0x34>;
194c362e4e0SJerome Brunet			#sound-dai-cells = <0>;
195c362e4e0SJerome Brunet			sound-name-prefix = "PDM";
196c362e4e0SJerome Brunet			clocks = <&clkc_audio AUD_CLKID_PDM>,
197c362e4e0SJerome Brunet				 <&clkc_audio AUD_CLKID_PDM_DCLK>,
198c362e4e0SJerome Brunet				 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
199c362e4e0SJerome Brunet			clock-names = "pclk", "dclk", "sysclk";
200c362e4e0SJerome Brunet			status = "disabled";
201c362e4e0SJerome Brunet		};
202c362e4e0SJerome Brunet
2038c0cf40fSJerome Brunet		periphs: bus@ff634000 {
204221cf34bSNan Li			compatible = "simple-bus";
2058c0cf40fSJerome Brunet			reg = <0x0 0xff634000 0x0 0x2000>;
206221cf34bSNan Li			#address-cells = <2>;
207221cf34bSNan Li			#size-cells = <2>;
2088c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
209221cf34bSNan Li
2108c0cf40fSJerome Brunet			hwrng: rng@18 {
2118c0cf40fSJerome Brunet				compatible = "amlogic,meson-rng";
2128c0cf40fSJerome Brunet				reg = <0x0 0x18 0x0 0x4>;
2138c0cf40fSJerome Brunet				clocks = <&clkc CLKID_RNG0>;
2148c0cf40fSJerome Brunet				clock-names = "core";
215221cf34bSNan Li			};
216221cf34bSNan Li
2178c0cf40fSJerome Brunet			pinctrl_periphs: pinctrl@480 {
2188c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-periphs-pinctrl";
2198c0cf40fSJerome Brunet				#address-cells = <2>;
2208c0cf40fSJerome Brunet				#size-cells = <2>;
2218c0cf40fSJerome Brunet				ranges;
2228c0cf40fSJerome Brunet
2238c0cf40fSJerome Brunet				gpio: bank@480 {
2248c0cf40fSJerome Brunet					reg = <0x0 0x00480 0x0 0x40>,
2258c0cf40fSJerome Brunet					      <0x0 0x004e8 0x0 0x14>,
2268c0cf40fSJerome Brunet					      <0x0 0x00520 0x0 0x14>,
2278c0cf40fSJerome Brunet					      <0x0 0x00430 0x0 0x3c>;
2288c0cf40fSJerome Brunet					reg-names = "mux", "pull", "pull-enable", "gpio";
2298c0cf40fSJerome Brunet					gpio-controller;
2308c0cf40fSJerome Brunet					#gpio-cells = <2>;
2318c0cf40fSJerome Brunet					gpio-ranges = <&pinctrl_periphs 0 0 86>;
232221cf34bSNan Li				};
2338c0cf40fSJerome Brunet
2348c0cf40fSJerome Brunet				i2c0_pins: i2c0 {
2358c0cf40fSJerome Brunet					mux {
2368c0cf40fSJerome Brunet						groups = "i2c0_sck",
2378c0cf40fSJerome Brunet							 "i2c0_sda";
2388c0cf40fSJerome Brunet						function = "i2c0";
2391c5cc1c8SJerome Brunet						bias-disable;
2408c0cf40fSJerome Brunet					};
2418c0cf40fSJerome Brunet				};
2428c0cf40fSJerome Brunet
2438c0cf40fSJerome Brunet				i2c1_x_pins: i2c1_x {
2448c0cf40fSJerome Brunet					mux {
2458c0cf40fSJerome Brunet						groups = "i2c1_sck_x",
2468c0cf40fSJerome Brunet							 "i2c1_sda_x";
2478c0cf40fSJerome Brunet						function = "i2c1";
2481c5cc1c8SJerome Brunet						bias-disable;
2498c0cf40fSJerome Brunet					};
2508c0cf40fSJerome Brunet				};
2518c0cf40fSJerome Brunet
2528c0cf40fSJerome Brunet				i2c1_z_pins: i2c1_z {
2538c0cf40fSJerome Brunet					mux {
2548c0cf40fSJerome Brunet						groups = "i2c1_sck_z",
2558c0cf40fSJerome Brunet							 "i2c1_sda_z";
2568c0cf40fSJerome Brunet						function = "i2c1";
2571c5cc1c8SJerome Brunet						bias-disable;
2588c0cf40fSJerome Brunet					};
2598c0cf40fSJerome Brunet				};
2608c0cf40fSJerome Brunet
2618c0cf40fSJerome Brunet				i2c2_a_pins: i2c2_a {
2628c0cf40fSJerome Brunet					mux {
2638c0cf40fSJerome Brunet						groups = "i2c2_sck_a",
2648c0cf40fSJerome Brunet							 "i2c2_sda_a";
2658c0cf40fSJerome Brunet						function = "i2c2";
2661c5cc1c8SJerome Brunet						bias-disable;
2678c0cf40fSJerome Brunet					};
2688c0cf40fSJerome Brunet				};
2698c0cf40fSJerome Brunet
2708c0cf40fSJerome Brunet				i2c2_x_pins: i2c2_x {
2718c0cf40fSJerome Brunet					mux {
2728c0cf40fSJerome Brunet						groups = "i2c2_sck_x",
2738c0cf40fSJerome Brunet							 "i2c2_sda_x";
2748c0cf40fSJerome Brunet						function = "i2c2";
2751c5cc1c8SJerome Brunet						bias-disable;
2768c0cf40fSJerome Brunet					};
2778c0cf40fSJerome Brunet				};
2788c0cf40fSJerome Brunet
2798c0cf40fSJerome Brunet				i2c3_a6_pins: i2c3_a6 {
2808c0cf40fSJerome Brunet					mux {
2818c0cf40fSJerome Brunet						groups = "i2c3_sda_a6",
2828c0cf40fSJerome Brunet							 "i2c3_sck_a7";
2838c0cf40fSJerome Brunet						function = "i2c3";
2841c5cc1c8SJerome Brunet						bias-disable;
2858c0cf40fSJerome Brunet					};
2868c0cf40fSJerome Brunet				};
2878c0cf40fSJerome Brunet
2888c0cf40fSJerome Brunet				i2c3_a12_pins: i2c3_a12 {
2898c0cf40fSJerome Brunet					mux {
2908c0cf40fSJerome Brunet						groups = "i2c3_sda_a12",
2918c0cf40fSJerome Brunet							 "i2c3_sck_a13";
2928c0cf40fSJerome Brunet						function = "i2c3";
2931c5cc1c8SJerome Brunet						bias-disable;
2948c0cf40fSJerome Brunet					};
2958c0cf40fSJerome Brunet				};
2968c0cf40fSJerome Brunet
2978c0cf40fSJerome Brunet				i2c3_a19_pins: i2c3_a19 {
2988c0cf40fSJerome Brunet					mux {
2998c0cf40fSJerome Brunet						groups = "i2c3_sda_a19",
3008c0cf40fSJerome Brunet							 "i2c3_sck_a20";
3018c0cf40fSJerome Brunet						function = "i2c3";
3021c5cc1c8SJerome Brunet						bias-disable;
3038c0cf40fSJerome Brunet					};
3048c0cf40fSJerome Brunet				};
3058c0cf40fSJerome Brunet
3068c0cf40fSJerome Brunet				emmc_pins: emmc {
307b43033b1SJerome Brunet					mux-0 {
3088c0cf40fSJerome Brunet						groups = "emmc_nand_d0",
3098c0cf40fSJerome Brunet							 "emmc_nand_d1",
3108c0cf40fSJerome Brunet							 "emmc_nand_d2",
3118c0cf40fSJerome Brunet							 "emmc_nand_d3",
3128c0cf40fSJerome Brunet							 "emmc_nand_d4",
3138c0cf40fSJerome Brunet							 "emmc_nand_d5",
3148c0cf40fSJerome Brunet							 "emmc_nand_d6",
3158c0cf40fSJerome Brunet							 "emmc_nand_d7",
316b43033b1SJerome Brunet							 "emmc_cmd";
317b43033b1SJerome Brunet						function = "emmc";
318b43033b1SJerome Brunet						bias-pull-up;
319b43033b1SJerome Brunet					};
320b43033b1SJerome Brunet
321b43033b1SJerome Brunet					mux-1 {
322b43033b1SJerome Brunet						groups = "emmc_clk";
3238c0cf40fSJerome Brunet						function = "emmc";
32496a13691SJerome Brunet						bias-disable;
3258c0cf40fSJerome Brunet					};
3268c0cf40fSJerome Brunet				};
3278c0cf40fSJerome Brunet
328b43033b1SJerome Brunet				emmc_ds_pins: emmc_ds {
329b43033b1SJerome Brunet					mux {
330b43033b1SJerome Brunet						groups = "emmc_ds";
331b43033b1SJerome Brunet						function = "emmc";
332b43033b1SJerome Brunet						bias-pull-down;
333b43033b1SJerome Brunet					};
334b43033b1SJerome Brunet				};
335b43033b1SJerome Brunet
3368c0cf40fSJerome Brunet				emmc_clk_gate_pins: emmc_clk_gate {
3378c0cf40fSJerome Brunet					mux {
3388c0cf40fSJerome Brunet						groups = "BOOT_8";
3398c0cf40fSJerome Brunet						function = "gpio_periphs";
3408c0cf40fSJerome Brunet						bias-pull-down;
3418c0cf40fSJerome Brunet					};
3428c0cf40fSJerome Brunet				};
3438c0cf40fSJerome Brunet
3448c0cf40fSJerome Brunet				eth_rgmii_x_pins: eth-x-rgmii {
3458c0cf40fSJerome Brunet					mux {
3468c0cf40fSJerome Brunet						groups = "eth_mdio_x",
3478c0cf40fSJerome Brunet							 "eth_mdc_x",
3488c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_x",
3498c0cf40fSJerome Brunet							 "eth_rx_dv_x",
3508c0cf40fSJerome Brunet							 "eth_rxd0_x",
3518c0cf40fSJerome Brunet							 "eth_rxd1_x",
3528c0cf40fSJerome Brunet							 "eth_rxd2_rgmii",
3538c0cf40fSJerome Brunet							 "eth_rxd3_rgmii",
3548c0cf40fSJerome Brunet							 "eth_rgmii_tx_clk",
3558c0cf40fSJerome Brunet							 "eth_txen_x",
3568c0cf40fSJerome Brunet							 "eth_txd0_x",
3578c0cf40fSJerome Brunet							 "eth_txd1_x",
3588c0cf40fSJerome Brunet							 "eth_txd2_rgmii",
3598c0cf40fSJerome Brunet							 "eth_txd3_rgmii";
3608c0cf40fSJerome Brunet						function = "eth";
3611c5cc1c8SJerome Brunet						bias-disable;
3628c0cf40fSJerome Brunet					};
3638c0cf40fSJerome Brunet				};
3648c0cf40fSJerome Brunet
3658c0cf40fSJerome Brunet				eth_rgmii_y_pins: eth-y-rgmii {
3668c0cf40fSJerome Brunet					mux {
3678c0cf40fSJerome Brunet						groups = "eth_mdio_y",
3688c0cf40fSJerome Brunet							 "eth_mdc_y",
3698c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_y",
3708c0cf40fSJerome Brunet							 "eth_rx_dv_y",
3718c0cf40fSJerome Brunet							 "eth_rxd0_y",
3728c0cf40fSJerome Brunet							 "eth_rxd1_y",
3738c0cf40fSJerome Brunet							 "eth_rxd2_rgmii",
3748c0cf40fSJerome Brunet							 "eth_rxd3_rgmii",
3758c0cf40fSJerome Brunet							 "eth_rgmii_tx_clk",
3768c0cf40fSJerome Brunet							 "eth_txen_y",
3778c0cf40fSJerome Brunet							 "eth_txd0_y",
3788c0cf40fSJerome Brunet							 "eth_txd1_y",
3798c0cf40fSJerome Brunet							 "eth_txd2_rgmii",
3808c0cf40fSJerome Brunet							 "eth_txd3_rgmii";
3818c0cf40fSJerome Brunet						function = "eth";
3821c5cc1c8SJerome Brunet						bias-disable;
3838c0cf40fSJerome Brunet					};
3848c0cf40fSJerome Brunet				};
3858c0cf40fSJerome Brunet
3868c0cf40fSJerome Brunet				eth_rmii_x_pins: eth-x-rmii {
3878c0cf40fSJerome Brunet					mux {
3888c0cf40fSJerome Brunet						groups = "eth_mdio_x",
3898c0cf40fSJerome Brunet							 "eth_mdc_x",
3908c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_x",
3918c0cf40fSJerome Brunet							 "eth_rx_dv_x",
3928c0cf40fSJerome Brunet							 "eth_rxd0_x",
3938c0cf40fSJerome Brunet							 "eth_rxd1_x",
3948c0cf40fSJerome Brunet							 "eth_txen_x",
3958c0cf40fSJerome Brunet							 "eth_txd0_x",
3968c0cf40fSJerome Brunet							 "eth_txd1_x";
3978c0cf40fSJerome Brunet						function = "eth";
3981c5cc1c8SJerome Brunet						bias-disable;
3998c0cf40fSJerome Brunet					};
4008c0cf40fSJerome Brunet				};
4018c0cf40fSJerome Brunet
4028c0cf40fSJerome Brunet				eth_rmii_y_pins: eth-y-rmii {
4038c0cf40fSJerome Brunet					mux {
4048c0cf40fSJerome Brunet						groups = "eth_mdio_y",
4058c0cf40fSJerome Brunet							 "eth_mdc_y",
4068c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_y",
4078c0cf40fSJerome Brunet							 "eth_rx_dv_y",
4088c0cf40fSJerome Brunet							 "eth_rxd0_y",
4098c0cf40fSJerome Brunet							 "eth_rxd1_y",
4108c0cf40fSJerome Brunet							 "eth_txen_y",
4118c0cf40fSJerome Brunet							 "eth_txd0_y",
4128c0cf40fSJerome Brunet							 "eth_txd1_y";
4138c0cf40fSJerome Brunet						function = "eth";
4141c5cc1c8SJerome Brunet						bias-disable;
4158c0cf40fSJerome Brunet					};
4168c0cf40fSJerome Brunet				};
4178c0cf40fSJerome Brunet
4188c0cf40fSJerome Brunet				mclk_b_pins: mclk_b {
4198c0cf40fSJerome Brunet					mux {
4208c0cf40fSJerome Brunet						groups = "mclk_b";
4218c0cf40fSJerome Brunet						function = "mclk_b";
4221c5cc1c8SJerome Brunet						bias-disable;
4238c0cf40fSJerome Brunet					};
4248c0cf40fSJerome Brunet				};
4258c0cf40fSJerome Brunet
4268c0cf40fSJerome Brunet				mclk_c_pins: mclk_c {
4278c0cf40fSJerome Brunet					mux {
4288c0cf40fSJerome Brunet						groups = "mclk_c";
4298c0cf40fSJerome Brunet						function = "mclk_c";
4301c5cc1c8SJerome Brunet						bias-disable;
4318c0cf40fSJerome Brunet					};
4328c0cf40fSJerome Brunet				};
4338c0cf40fSJerome Brunet
4348c0cf40fSJerome Brunet				pdm_dclk_a14_pins: pdm_dclk_a14 {
4358c0cf40fSJerome Brunet					mux {
4368c0cf40fSJerome Brunet						groups = "pdm_dclk_a14";
4378c0cf40fSJerome Brunet						function = "pdm";
4381c5cc1c8SJerome Brunet						bias-disable;
4398c0cf40fSJerome Brunet					};
4408c0cf40fSJerome Brunet				};
4418c0cf40fSJerome Brunet
4428c0cf40fSJerome Brunet				pdm_dclk_a19_pins: pdm_dclk_a19 {
4438c0cf40fSJerome Brunet					mux {
4448c0cf40fSJerome Brunet						groups = "pdm_dclk_a19";
4458c0cf40fSJerome Brunet						function = "pdm";
4461c5cc1c8SJerome Brunet						bias-disable;
4478c0cf40fSJerome Brunet					};
4488c0cf40fSJerome Brunet				};
4498c0cf40fSJerome Brunet
4508c0cf40fSJerome Brunet				pdm_din0_pins: pdm_din0 {
4518c0cf40fSJerome Brunet					mux {
4528c0cf40fSJerome Brunet						groups = "pdm_din0";
4538c0cf40fSJerome Brunet						function = "pdm";
4541c5cc1c8SJerome Brunet						bias-disable;
4558c0cf40fSJerome Brunet					};
4568c0cf40fSJerome Brunet				};
4578c0cf40fSJerome Brunet
4588c0cf40fSJerome Brunet				pdm_din1_pins: pdm_din1 {
4598c0cf40fSJerome Brunet					mux {
4608c0cf40fSJerome Brunet						groups = "pdm_din1";
4618c0cf40fSJerome Brunet						function = "pdm";
4621c5cc1c8SJerome Brunet						bias-disable;
4638c0cf40fSJerome Brunet					};
4648c0cf40fSJerome Brunet				};
4658c0cf40fSJerome Brunet
4668c0cf40fSJerome Brunet				pdm_din2_pins: pdm_din2 {
4678c0cf40fSJerome Brunet					mux {
4688c0cf40fSJerome Brunet						groups = "pdm_din2";
4698c0cf40fSJerome Brunet						function = "pdm";
4701c5cc1c8SJerome Brunet						bias-disable;
4718c0cf40fSJerome Brunet					};
4728c0cf40fSJerome Brunet				};
4738c0cf40fSJerome Brunet
4748c0cf40fSJerome Brunet				pdm_din3_pins: pdm_din3 {
4758c0cf40fSJerome Brunet					mux {
4768c0cf40fSJerome Brunet						groups = "pdm_din3";
4778c0cf40fSJerome Brunet						function = "pdm";
4781c5cc1c8SJerome Brunet						bias-disable;
4798c0cf40fSJerome Brunet					};
4808c0cf40fSJerome Brunet				};
4818c0cf40fSJerome Brunet
4828c0cf40fSJerome Brunet				pwm_a_a_pins: pwm_a_a {
4838c0cf40fSJerome Brunet					mux {
4848c0cf40fSJerome Brunet						groups = "pwm_a_a";
4858c0cf40fSJerome Brunet						function = "pwm_a";
4861c5cc1c8SJerome Brunet						bias-disable;
4878c0cf40fSJerome Brunet					};
4888c0cf40fSJerome Brunet				};
4898c0cf40fSJerome Brunet
4908c0cf40fSJerome Brunet				pwm_a_x18_pins: pwm_a_x18 {
4918c0cf40fSJerome Brunet					mux {
4928c0cf40fSJerome Brunet						groups = "pwm_a_x18";
4938c0cf40fSJerome Brunet						function = "pwm_a";
4941c5cc1c8SJerome Brunet						bias-disable;
4958c0cf40fSJerome Brunet					};
4968c0cf40fSJerome Brunet				};
4978c0cf40fSJerome Brunet
4988c0cf40fSJerome Brunet				pwm_a_x20_pins: pwm_a_x20 {
4998c0cf40fSJerome Brunet					mux {
5008c0cf40fSJerome Brunet						groups = "pwm_a_x20";
5018c0cf40fSJerome Brunet						function = "pwm_a";
5021c5cc1c8SJerome Brunet						bias-disable;
5038c0cf40fSJerome Brunet					};
5048c0cf40fSJerome Brunet				};
5058c0cf40fSJerome Brunet
5068c0cf40fSJerome Brunet				pwm_a_z_pins: pwm_a_z {
5078c0cf40fSJerome Brunet					mux {
5088c0cf40fSJerome Brunet						groups = "pwm_a_z";
5098c0cf40fSJerome Brunet						function = "pwm_a";
5101c5cc1c8SJerome Brunet						bias-disable;
5118c0cf40fSJerome Brunet					};
5128c0cf40fSJerome Brunet				};
5138c0cf40fSJerome Brunet
5148c0cf40fSJerome Brunet				pwm_b_a_pins: pwm_b_a {
5158c0cf40fSJerome Brunet					mux {
5168c0cf40fSJerome Brunet						groups = "pwm_b_a";
5178c0cf40fSJerome Brunet						function = "pwm_b";
5181c5cc1c8SJerome Brunet						bias-disable;
5198c0cf40fSJerome Brunet					};
5208c0cf40fSJerome Brunet				};
5218c0cf40fSJerome Brunet
5228c0cf40fSJerome Brunet				pwm_b_x_pins: pwm_b_x {
5238c0cf40fSJerome Brunet					mux {
5248c0cf40fSJerome Brunet						groups = "pwm_b_x";
5258c0cf40fSJerome Brunet						function = "pwm_b";
5261c5cc1c8SJerome Brunet						bias-disable;
5278c0cf40fSJerome Brunet					};
5288c0cf40fSJerome Brunet				};
5298c0cf40fSJerome Brunet
5308c0cf40fSJerome Brunet				pwm_b_z_pins: pwm_b_z {
5318c0cf40fSJerome Brunet					mux {
5328c0cf40fSJerome Brunet						groups = "pwm_b_z";
5338c0cf40fSJerome Brunet						function = "pwm_b";
5341c5cc1c8SJerome Brunet						bias-disable;
5358c0cf40fSJerome Brunet					};
5368c0cf40fSJerome Brunet				};
5378c0cf40fSJerome Brunet
5388c0cf40fSJerome Brunet				pwm_c_a_pins: pwm_c_a {
5398c0cf40fSJerome Brunet					mux {
5408c0cf40fSJerome Brunet						groups = "pwm_c_a";
5418c0cf40fSJerome Brunet						function = "pwm_c";
5421c5cc1c8SJerome Brunet						bias-disable;
5438c0cf40fSJerome Brunet					};
5448c0cf40fSJerome Brunet				};
5458c0cf40fSJerome Brunet
5468c0cf40fSJerome Brunet				pwm_c_x10_pins: pwm_c_x10 {
5478c0cf40fSJerome Brunet					mux {
5488c0cf40fSJerome Brunet						groups = "pwm_c_x10";
5498c0cf40fSJerome Brunet						function = "pwm_c";
5501c5cc1c8SJerome Brunet						bias-disable;
5518c0cf40fSJerome Brunet					};
5528c0cf40fSJerome Brunet				};
5538c0cf40fSJerome Brunet
5548c0cf40fSJerome Brunet				pwm_c_x17_pins: pwm_c_x17 {
5558c0cf40fSJerome Brunet					mux {
5568c0cf40fSJerome Brunet						groups = "pwm_c_x17";
5578c0cf40fSJerome Brunet						function = "pwm_c";
5581c5cc1c8SJerome Brunet						bias-disable;
5598c0cf40fSJerome Brunet					};
5608c0cf40fSJerome Brunet				};
5618c0cf40fSJerome Brunet
5628c0cf40fSJerome Brunet				pwm_d_x11_pins: pwm_d_x11 {
5638c0cf40fSJerome Brunet					mux {
5648c0cf40fSJerome Brunet						groups = "pwm_d_x11";
5658c0cf40fSJerome Brunet						function = "pwm_d";
5661c5cc1c8SJerome Brunet						bias-disable;
5678c0cf40fSJerome Brunet					};
5688c0cf40fSJerome Brunet				};
5698c0cf40fSJerome Brunet
5708c0cf40fSJerome Brunet				pwm_d_x16_pins: pwm_d_x16 {
5718c0cf40fSJerome Brunet					mux {
5728c0cf40fSJerome Brunet						groups = "pwm_d_x16";
5738c0cf40fSJerome Brunet						function = "pwm_d";
5741c5cc1c8SJerome Brunet						bias-disable;
5758c0cf40fSJerome Brunet					};
5768c0cf40fSJerome Brunet				};
5778c0cf40fSJerome Brunet
5788c0cf40fSJerome Brunet				sdio_pins: sdio {
579b43033b1SJerome Brunet					mux-0 {
5808c0cf40fSJerome Brunet						groups = "sdio_d0",
5818c0cf40fSJerome Brunet							 "sdio_d1",
5828c0cf40fSJerome Brunet							 "sdio_d2",
5838c0cf40fSJerome Brunet							 "sdio_d3",
584b43033b1SJerome Brunet							 "sdio_cmd";
585b43033b1SJerome Brunet						function = "sdio";
586b43033b1SJerome Brunet						bias-pull-up;
587b43033b1SJerome Brunet					};
588b43033b1SJerome Brunet
589b43033b1SJerome Brunet					mux-1 {
590b43033b1SJerome Brunet						groups = "sdio_clk";
5918c0cf40fSJerome Brunet						function = "sdio";
59296a13691SJerome Brunet						bias-disable;
5938c0cf40fSJerome Brunet					};
5948c0cf40fSJerome Brunet				};
5958c0cf40fSJerome Brunet
5968c0cf40fSJerome Brunet				sdio_clk_gate_pins: sdio_clk_gate {
5978c0cf40fSJerome Brunet					mux {
5988c0cf40fSJerome Brunet						groups = "GPIOX_4";
5998c0cf40fSJerome Brunet						function = "gpio_periphs";
6008c0cf40fSJerome Brunet						bias-pull-down;
6018c0cf40fSJerome Brunet					};
6028c0cf40fSJerome Brunet				};
6038c0cf40fSJerome Brunet
6048c0cf40fSJerome Brunet				spdif_in_z_pins: spdif_in_z {
6058c0cf40fSJerome Brunet					mux {
6068c0cf40fSJerome Brunet						groups = "spdif_in_z";
6078c0cf40fSJerome Brunet						function = "spdif_in";
6081c5cc1c8SJerome Brunet						bias-disable;
6098c0cf40fSJerome Brunet					};
6108c0cf40fSJerome Brunet				};
6118c0cf40fSJerome Brunet
6128c0cf40fSJerome Brunet				spdif_in_a1_pins: spdif_in_a1 {
6138c0cf40fSJerome Brunet					mux {
6148c0cf40fSJerome Brunet						groups = "spdif_in_a1";
6158c0cf40fSJerome Brunet						function = "spdif_in";
6161c5cc1c8SJerome Brunet						bias-disable;
6178c0cf40fSJerome Brunet					};
6188c0cf40fSJerome Brunet				};
6198c0cf40fSJerome Brunet
6208c0cf40fSJerome Brunet				spdif_in_a7_pins: spdif_in_a7 {
6218c0cf40fSJerome Brunet					mux {
6228c0cf40fSJerome Brunet						groups = "spdif_in_a7";
6238c0cf40fSJerome Brunet						function = "spdif_in";
6241c5cc1c8SJerome Brunet						bias-disable;
6258c0cf40fSJerome Brunet					};
6268c0cf40fSJerome Brunet				};
6278c0cf40fSJerome Brunet
6288c0cf40fSJerome Brunet				spdif_in_a19_pins: spdif_in_a19 {
6298c0cf40fSJerome Brunet					mux {
6308c0cf40fSJerome Brunet						groups = "spdif_in_a19";
6318c0cf40fSJerome Brunet						function = "spdif_in";
6321c5cc1c8SJerome Brunet						bias-disable;
6338c0cf40fSJerome Brunet					};
6348c0cf40fSJerome Brunet				};
6358c0cf40fSJerome Brunet
6368c0cf40fSJerome Brunet				spdif_in_a20_pins: spdif_in_a20 {
6378c0cf40fSJerome Brunet					mux {
6388c0cf40fSJerome Brunet						groups = "spdif_in_a20";
6398c0cf40fSJerome Brunet						function = "spdif_in";
6401c5cc1c8SJerome Brunet						bias-disable;
6418c0cf40fSJerome Brunet					};
6428c0cf40fSJerome Brunet				};
6438c0cf40fSJerome Brunet
6448c0cf40fSJerome Brunet				spdif_out_a1_pins: spdif_out_a1 {
6458c0cf40fSJerome Brunet					mux {
6468c0cf40fSJerome Brunet						groups = "spdif_out_a1";
6478c0cf40fSJerome Brunet						function = "spdif_out";
6481c5cc1c8SJerome Brunet						bias-disable;
6498c0cf40fSJerome Brunet					};
6508c0cf40fSJerome Brunet				};
6518c0cf40fSJerome Brunet
6528c0cf40fSJerome Brunet				spdif_out_a11_pins: spdif_out_a11 {
6538c0cf40fSJerome Brunet					mux {
6548c0cf40fSJerome Brunet						groups = "spdif_out_a11";
6558c0cf40fSJerome Brunet						function = "spdif_out";
6561c5cc1c8SJerome Brunet						bias-disable;
6578c0cf40fSJerome Brunet					};
6588c0cf40fSJerome Brunet				};
6598c0cf40fSJerome Brunet
6608c0cf40fSJerome Brunet				spdif_out_a19_pins: spdif_out_a19 {
6618c0cf40fSJerome Brunet					mux {
6628c0cf40fSJerome Brunet						groups = "spdif_out_a19";
6638c0cf40fSJerome Brunet						function = "spdif_out";
6641c5cc1c8SJerome Brunet						bias-disable;
6658c0cf40fSJerome Brunet					};
6668c0cf40fSJerome Brunet				};
6678c0cf40fSJerome Brunet
6688c0cf40fSJerome Brunet				spdif_out_a20_pins: spdif_out_a20 {
6698c0cf40fSJerome Brunet					mux {
6708c0cf40fSJerome Brunet						groups = "spdif_out_a20";
6718c0cf40fSJerome Brunet						function = "spdif_out";
6721c5cc1c8SJerome Brunet						bias-disable;
6738c0cf40fSJerome Brunet					};
6748c0cf40fSJerome Brunet				};
6758c0cf40fSJerome Brunet
6768c0cf40fSJerome Brunet				spdif_out_z_pins: spdif_out_z {
6778c0cf40fSJerome Brunet					mux {
6788c0cf40fSJerome Brunet						groups = "spdif_out_z";
6798c0cf40fSJerome Brunet						function = "spdif_out";
6801c5cc1c8SJerome Brunet						bias-disable;
6818c0cf40fSJerome Brunet					};
6828c0cf40fSJerome Brunet				};
6838c0cf40fSJerome Brunet
6848c0cf40fSJerome Brunet				spi0_pins: spi0 {
6858c0cf40fSJerome Brunet					mux {
6868c0cf40fSJerome Brunet						groups = "spi0_miso",
6878c0cf40fSJerome Brunet							 "spi0_mosi",
6888c0cf40fSJerome Brunet							 "spi0_clk";
6898c0cf40fSJerome Brunet						function = "spi0";
6901c5cc1c8SJerome Brunet						bias-disable;
6918c0cf40fSJerome Brunet					};
6928c0cf40fSJerome Brunet				};
6938c0cf40fSJerome Brunet
6948c0cf40fSJerome Brunet				spi0_ss0_pins: spi0_ss0 {
6958c0cf40fSJerome Brunet					mux {
6968c0cf40fSJerome Brunet						groups = "spi0_ss0";
6978c0cf40fSJerome Brunet						function = "spi0";
6981c5cc1c8SJerome Brunet						bias-disable;
6998c0cf40fSJerome Brunet					};
7008c0cf40fSJerome Brunet				};
7018c0cf40fSJerome Brunet
7028c0cf40fSJerome Brunet				spi0_ss1_pins: spi0_ss1 {
7038c0cf40fSJerome Brunet					mux {
7048c0cf40fSJerome Brunet						groups = "spi0_ss1";
7058c0cf40fSJerome Brunet						function = "spi0";
7061c5cc1c8SJerome Brunet						bias-disable;
7078c0cf40fSJerome Brunet					};
7088c0cf40fSJerome Brunet				};
7098c0cf40fSJerome Brunet
7108c0cf40fSJerome Brunet				spi0_ss2_pins: spi0_ss2 {
7118c0cf40fSJerome Brunet					mux {
7128c0cf40fSJerome Brunet						groups = "spi0_ss2";
7138c0cf40fSJerome Brunet						function = "spi0";
7141c5cc1c8SJerome Brunet						bias-disable;
7158c0cf40fSJerome Brunet					};
7168c0cf40fSJerome Brunet				};
7178c0cf40fSJerome Brunet
7188c0cf40fSJerome Brunet				spi1_a_pins: spi1_a {
7198c0cf40fSJerome Brunet					mux {
7208c0cf40fSJerome Brunet						groups = "spi1_miso_a",
7218c0cf40fSJerome Brunet							 "spi1_mosi_a",
7228c0cf40fSJerome Brunet							 "spi1_clk_a";
7238c0cf40fSJerome Brunet						function = "spi1";
7241c5cc1c8SJerome Brunet						bias-disable;
7258c0cf40fSJerome Brunet					};
7268c0cf40fSJerome Brunet				};
7278c0cf40fSJerome Brunet
7288c0cf40fSJerome Brunet				spi1_ss0_a_pins: spi1_ss0_a {
7298c0cf40fSJerome Brunet					mux {
7308c0cf40fSJerome Brunet						groups = "spi1_ss0_a";
7318c0cf40fSJerome Brunet						function = "spi1";
7321c5cc1c8SJerome Brunet						bias-disable;
7338c0cf40fSJerome Brunet					};
7348c0cf40fSJerome Brunet				};
7358c0cf40fSJerome Brunet
7368c0cf40fSJerome Brunet				spi1_ss1_pins: spi1_ss1 {
7378c0cf40fSJerome Brunet					mux {
7388c0cf40fSJerome Brunet						groups = "spi1_ss1";
7398c0cf40fSJerome Brunet						function = "spi1";
7401c5cc1c8SJerome Brunet						bias-disable;
7418c0cf40fSJerome Brunet					};
7428c0cf40fSJerome Brunet				};
7438c0cf40fSJerome Brunet
7448c0cf40fSJerome Brunet				spi1_x_pins: spi1_x {
7458c0cf40fSJerome Brunet					mux {
7468c0cf40fSJerome Brunet						groups = "spi1_miso_x",
7478c0cf40fSJerome Brunet							 "spi1_mosi_x",
7488c0cf40fSJerome Brunet							 "spi1_clk_x";
7498c0cf40fSJerome Brunet						function = "spi1";
7501c5cc1c8SJerome Brunet						bias-disable;
7518c0cf40fSJerome Brunet					};
7528c0cf40fSJerome Brunet				};
7538c0cf40fSJerome Brunet
7548c0cf40fSJerome Brunet				spi1_ss0_x_pins: spi1_ss0_x {
7558c0cf40fSJerome Brunet					mux {
7568c0cf40fSJerome Brunet						groups = "spi1_ss0_x";
7578c0cf40fSJerome Brunet						function = "spi1";
7581c5cc1c8SJerome Brunet						bias-disable;
7598c0cf40fSJerome Brunet					};
7608c0cf40fSJerome Brunet				};
7618c0cf40fSJerome Brunet
7628c0cf40fSJerome Brunet				tdma_din0_pins: tdma_din0 {
7638c0cf40fSJerome Brunet					mux {
7648c0cf40fSJerome Brunet						groups = "tdma_din0";
7658c0cf40fSJerome Brunet						function = "tdma";
7661c5cc1c8SJerome Brunet						bias-disable;
7678c0cf40fSJerome Brunet					};
7688c0cf40fSJerome Brunet				};
7698c0cf40fSJerome Brunet
7708c0cf40fSJerome Brunet				tdma_dout0_x14_pins: tdma_dout0_x14 {
7718c0cf40fSJerome Brunet					mux {
7728c0cf40fSJerome Brunet						groups = "tdma_dout0_x14";
7738c0cf40fSJerome Brunet						function = "tdma";
7741c5cc1c8SJerome Brunet						bias-disable;
7758c0cf40fSJerome Brunet					};
7768c0cf40fSJerome Brunet				};
7778c0cf40fSJerome Brunet
7788c0cf40fSJerome Brunet				tdma_dout0_x15_pins: tdma_dout0_x15 {
7798c0cf40fSJerome Brunet					mux {
7808c0cf40fSJerome Brunet						groups = "tdma_dout0_x15";
7818c0cf40fSJerome Brunet						function = "tdma";
7821c5cc1c8SJerome Brunet						bias-disable;
7838c0cf40fSJerome Brunet					};
7848c0cf40fSJerome Brunet				};
7858c0cf40fSJerome Brunet
7868c0cf40fSJerome Brunet				tdma_dout1_pins: tdma_dout1 {
7878c0cf40fSJerome Brunet					mux {
7888c0cf40fSJerome Brunet						groups = "tdma_dout1";
7898c0cf40fSJerome Brunet						function = "tdma";
7901c5cc1c8SJerome Brunet						bias-disable;
7918c0cf40fSJerome Brunet					};
7928c0cf40fSJerome Brunet				};
7938c0cf40fSJerome Brunet
7948c0cf40fSJerome Brunet				tdma_din1_pins: tdma_din1 {
7958c0cf40fSJerome Brunet					mux {
7968c0cf40fSJerome Brunet						groups = "tdma_din1";
7978c0cf40fSJerome Brunet						function = "tdma";
7981c5cc1c8SJerome Brunet						bias-disable;
7998c0cf40fSJerome Brunet					};
8008c0cf40fSJerome Brunet				};
8018c0cf40fSJerome Brunet
8028c0cf40fSJerome Brunet				tdma_fs_pins: tdma_fs {
8038c0cf40fSJerome Brunet					mux {
8048c0cf40fSJerome Brunet						groups = "tdma_fs";
8058c0cf40fSJerome Brunet						function = "tdma";
8061c5cc1c8SJerome Brunet						bias-disable;
8078c0cf40fSJerome Brunet					};
8088c0cf40fSJerome Brunet				};
8098c0cf40fSJerome Brunet
8108c0cf40fSJerome Brunet				tdma_fs_slv_pins: tdma_fs_slv {
8118c0cf40fSJerome Brunet					mux {
8128c0cf40fSJerome Brunet						groups = "tdma_fs_slv";
8138c0cf40fSJerome Brunet						function = "tdma";
8141c5cc1c8SJerome Brunet						bias-disable;
8158c0cf40fSJerome Brunet					};
8168c0cf40fSJerome Brunet				};
8178c0cf40fSJerome Brunet
8188c0cf40fSJerome Brunet				tdma_sclk_pins: tdma_sclk {
8198c0cf40fSJerome Brunet					mux {
8208c0cf40fSJerome Brunet						groups = "tdma_sclk";
8218c0cf40fSJerome Brunet						function = "tdma";
8221c5cc1c8SJerome Brunet						bias-disable;
8238c0cf40fSJerome Brunet					};
8248c0cf40fSJerome Brunet				};
8258c0cf40fSJerome Brunet
8268c0cf40fSJerome Brunet				tdma_sclk_slv_pins: tdma_sclk_slv {
8278c0cf40fSJerome Brunet					mux {
8288c0cf40fSJerome Brunet						groups = "tdma_sclk_slv";
8298c0cf40fSJerome Brunet						function = "tdma";
8301c5cc1c8SJerome Brunet						bias-disable;
8318c0cf40fSJerome Brunet					};
8328c0cf40fSJerome Brunet				};
8338c0cf40fSJerome Brunet
8348c0cf40fSJerome Brunet				tdmb_din0_pins: tdmb_din0 {
8358c0cf40fSJerome Brunet					mux {
8368c0cf40fSJerome Brunet						groups = "tdmb_din0";
8378c0cf40fSJerome Brunet						function = "tdmb";
8381c5cc1c8SJerome Brunet						bias-disable;
8398c0cf40fSJerome Brunet					};
8408c0cf40fSJerome Brunet				};
8418c0cf40fSJerome Brunet
8428c0cf40fSJerome Brunet				tdmb_din1_pins: tdmb_din1 {
8438c0cf40fSJerome Brunet					mux {
8448c0cf40fSJerome Brunet						groups = "tdmb_din1";
8458c0cf40fSJerome Brunet						function = "tdmb";
8461c5cc1c8SJerome Brunet						bias-disable;
8478c0cf40fSJerome Brunet					};
8488c0cf40fSJerome Brunet				};
8498c0cf40fSJerome Brunet
8508c0cf40fSJerome Brunet				tdmb_din2_pins: tdmb_din2 {
8518c0cf40fSJerome Brunet					mux {
8528c0cf40fSJerome Brunet						groups = "tdmb_din2";
8538c0cf40fSJerome Brunet						function = "tdmb";
8541c5cc1c8SJerome Brunet						bias-disable;
8558c0cf40fSJerome Brunet					};
8568c0cf40fSJerome Brunet				};
8578c0cf40fSJerome Brunet
8588c0cf40fSJerome Brunet				tdmb_din3_pins: tdmb_din3 {
8598c0cf40fSJerome Brunet					mux {
8608c0cf40fSJerome Brunet						groups = "tdmb_din3";
8618c0cf40fSJerome Brunet						function = "tdmb";
8621c5cc1c8SJerome Brunet						bias-disable;
8638c0cf40fSJerome Brunet					};
8648c0cf40fSJerome Brunet				};
8658c0cf40fSJerome Brunet
8668c0cf40fSJerome Brunet				tdmb_dout0_pins: tdmb_dout0 {
8678c0cf40fSJerome Brunet					mux {
8688c0cf40fSJerome Brunet						groups = "tdmb_dout0";
8698c0cf40fSJerome Brunet						function = "tdmb";
8701c5cc1c8SJerome Brunet						bias-disable;
8718c0cf40fSJerome Brunet					};
8728c0cf40fSJerome Brunet				};
8738c0cf40fSJerome Brunet
8748c0cf40fSJerome Brunet				tdmb_dout1_pins: tdmb_dout1 {
8758c0cf40fSJerome Brunet					mux {
8768c0cf40fSJerome Brunet						groups = "tdmb_dout1";
8778c0cf40fSJerome Brunet						function = "tdmb";
8781c5cc1c8SJerome Brunet						bias-disable;
8798c0cf40fSJerome Brunet					};
8808c0cf40fSJerome Brunet				};
8818c0cf40fSJerome Brunet
8828c0cf40fSJerome Brunet				tdmb_dout2_pins: tdmb_dout2 {
8838c0cf40fSJerome Brunet					mux {
8848c0cf40fSJerome Brunet						groups = "tdmb_dout2";
8858c0cf40fSJerome Brunet						function = "tdmb";
8861c5cc1c8SJerome Brunet						bias-disable;
8878c0cf40fSJerome Brunet					};
8888c0cf40fSJerome Brunet				};
8898c0cf40fSJerome Brunet
8908c0cf40fSJerome Brunet				tdmb_dout3_pins: tdmb_dout3 {
8918c0cf40fSJerome Brunet					mux {
8928c0cf40fSJerome Brunet						groups = "tdmb_dout3";
8938c0cf40fSJerome Brunet						function = "tdmb";
8941c5cc1c8SJerome Brunet						bias-disable;
8958c0cf40fSJerome Brunet					};
8968c0cf40fSJerome Brunet				};
8978c0cf40fSJerome Brunet
8988c0cf40fSJerome Brunet				tdmb_fs_pins: tdmb_fs {
8998c0cf40fSJerome Brunet					mux {
9008c0cf40fSJerome Brunet						groups = "tdmb_fs";
9018c0cf40fSJerome Brunet						function = "tdmb";
9021c5cc1c8SJerome Brunet						bias-disable;
9038c0cf40fSJerome Brunet					};
9048c0cf40fSJerome Brunet				};
9058c0cf40fSJerome Brunet
9068c0cf40fSJerome Brunet				tdmb_fs_slv_pins: tdmb_fs_slv {
9078c0cf40fSJerome Brunet					mux {
9088c0cf40fSJerome Brunet						groups = "tdmb_fs_slv";
9098c0cf40fSJerome Brunet						function = "tdmb";
9101c5cc1c8SJerome Brunet						bias-disable;
9118c0cf40fSJerome Brunet					};
9128c0cf40fSJerome Brunet				};
9138c0cf40fSJerome Brunet
9148c0cf40fSJerome Brunet				tdmb_sclk_pins: tdmb_sclk {
9158c0cf40fSJerome Brunet					mux {
9168c0cf40fSJerome Brunet						groups = "tdmb_sclk";
9178c0cf40fSJerome Brunet						function = "tdmb";
9181c5cc1c8SJerome Brunet						bias-disable;
9198c0cf40fSJerome Brunet					};
9208c0cf40fSJerome Brunet				};
9218c0cf40fSJerome Brunet
9228c0cf40fSJerome Brunet				tdmb_sclk_slv_pins: tdmb_sclk_slv {
9238c0cf40fSJerome Brunet					mux {
9248c0cf40fSJerome Brunet						groups = "tdmb_sclk_slv";
9258c0cf40fSJerome Brunet						function = "tdmb";
9261c5cc1c8SJerome Brunet						bias-disable;
9278c0cf40fSJerome Brunet					};
9288c0cf40fSJerome Brunet				};
9298c0cf40fSJerome Brunet
9308c0cf40fSJerome Brunet				tdmc_fs_pins: tdmc_fs {
9318c0cf40fSJerome Brunet					mux {
9328c0cf40fSJerome Brunet						groups = "tdmc_fs";
9338c0cf40fSJerome Brunet						function = "tdmc";
9341c5cc1c8SJerome Brunet						bias-disable;
9358c0cf40fSJerome Brunet					};
9368c0cf40fSJerome Brunet				};
9378c0cf40fSJerome Brunet
9388c0cf40fSJerome Brunet				tdmc_fs_slv_pins: tdmc_fs_slv {
9398c0cf40fSJerome Brunet					mux {
9408c0cf40fSJerome Brunet						groups = "tdmc_fs_slv";
9418c0cf40fSJerome Brunet						function = "tdmc";
9421c5cc1c8SJerome Brunet						bias-disable;
9438c0cf40fSJerome Brunet					};
9448c0cf40fSJerome Brunet				};
9458c0cf40fSJerome Brunet
9468c0cf40fSJerome Brunet				tdmc_sclk_pins: tdmc_sclk {
9478c0cf40fSJerome Brunet					mux {
9488c0cf40fSJerome Brunet						groups = "tdmc_sclk";
9498c0cf40fSJerome Brunet						function = "tdmc";
9501c5cc1c8SJerome Brunet						bias-disable;
9518c0cf40fSJerome Brunet					};
9528c0cf40fSJerome Brunet				};
9538c0cf40fSJerome Brunet
9548c0cf40fSJerome Brunet				tdmc_sclk_slv_pins: tdmc_sclk_slv {
9558c0cf40fSJerome Brunet					mux {
9568c0cf40fSJerome Brunet						groups = "tdmc_sclk_slv";
9578c0cf40fSJerome Brunet						function = "tdmc";
9581c5cc1c8SJerome Brunet						bias-disable;
9598c0cf40fSJerome Brunet					};
9608c0cf40fSJerome Brunet				};
9618c0cf40fSJerome Brunet
9628c0cf40fSJerome Brunet				tdmc_din0_pins: tdmc_din0 {
9638c0cf40fSJerome Brunet					mux {
9648c0cf40fSJerome Brunet						groups = "tdmc_din0";
9658c0cf40fSJerome Brunet						function = "tdmc";
9661c5cc1c8SJerome Brunet						bias-disable;
9678c0cf40fSJerome Brunet					};
9688c0cf40fSJerome Brunet				};
9698c0cf40fSJerome Brunet
9708c0cf40fSJerome Brunet				tdmc_din1_pins: tdmc_din1 {
9718c0cf40fSJerome Brunet					mux {
9728c0cf40fSJerome Brunet						groups = "tdmc_din1";
9738c0cf40fSJerome Brunet						function = "tdmc";
9741c5cc1c8SJerome Brunet						bias-disable;
9758c0cf40fSJerome Brunet					};
9768c0cf40fSJerome Brunet				};
9778c0cf40fSJerome Brunet
9788c0cf40fSJerome Brunet				tdmc_din2_pins: tdmc_din2 {
9798c0cf40fSJerome Brunet					mux {
9808c0cf40fSJerome Brunet						groups = "tdmc_din2";
9818c0cf40fSJerome Brunet						function = "tdmc";
9821c5cc1c8SJerome Brunet						bias-disable;
9838c0cf40fSJerome Brunet					};
9848c0cf40fSJerome Brunet				};
9858c0cf40fSJerome Brunet
9868c0cf40fSJerome Brunet				tdmc_din3_pins: tdmc_din3 {
9878c0cf40fSJerome Brunet					mux {
9888c0cf40fSJerome Brunet						groups = "tdmc_din3";
9898c0cf40fSJerome Brunet						function = "tdmc";
9901c5cc1c8SJerome Brunet						bias-disable;
9918c0cf40fSJerome Brunet					};
9928c0cf40fSJerome Brunet				};
9938c0cf40fSJerome Brunet
9948c0cf40fSJerome Brunet				tdmc_dout0_pins: tdmc_dout0 {
9958c0cf40fSJerome Brunet					mux {
9968c0cf40fSJerome Brunet						groups = "tdmc_dout0";
9978c0cf40fSJerome Brunet						function = "tdmc";
9981c5cc1c8SJerome Brunet						bias-disable;
9998c0cf40fSJerome Brunet					};
10008c0cf40fSJerome Brunet				};
10018c0cf40fSJerome Brunet
10028c0cf40fSJerome Brunet				tdmc_dout1_pins: tdmc_dout1 {
10038c0cf40fSJerome Brunet					mux {
10048c0cf40fSJerome Brunet						groups = "tdmc_dout1";
10058c0cf40fSJerome Brunet						function = "tdmc";
10061c5cc1c8SJerome Brunet						bias-disable;
10078c0cf40fSJerome Brunet					};
10088c0cf40fSJerome Brunet				};
10098c0cf40fSJerome Brunet
10108c0cf40fSJerome Brunet				tdmc_dout2_pins: tdmc_dout2 {
10118c0cf40fSJerome Brunet					mux {
10128c0cf40fSJerome Brunet						groups = "tdmc_dout2";
10138c0cf40fSJerome Brunet						function = "tdmc";
10141c5cc1c8SJerome Brunet						bias-disable;
10158c0cf40fSJerome Brunet					};
10168c0cf40fSJerome Brunet				};
10178c0cf40fSJerome Brunet
10188c0cf40fSJerome Brunet				tdmc_dout3_pins: tdmc_dout3 {
10198c0cf40fSJerome Brunet					mux {
10208c0cf40fSJerome Brunet						groups = "tdmc_dout3";
10218c0cf40fSJerome Brunet						function = "tdmc";
10221c5cc1c8SJerome Brunet						bias-disable;
10238c0cf40fSJerome Brunet					};
10248c0cf40fSJerome Brunet				};
10258c0cf40fSJerome Brunet
10268c0cf40fSJerome Brunet				uart_a_pins: uart_a {
10278c0cf40fSJerome Brunet					mux {
10288c0cf40fSJerome Brunet						groups = "uart_tx_a",
10298c0cf40fSJerome Brunet							 "uart_rx_a";
10308c0cf40fSJerome Brunet						function = "uart_a";
10311c5cc1c8SJerome Brunet						bias-disable;
10328c0cf40fSJerome Brunet					};
10338c0cf40fSJerome Brunet				};
10348c0cf40fSJerome Brunet
10358c0cf40fSJerome Brunet				uart_a_cts_rts_pins: uart_a_cts_rts {
10368c0cf40fSJerome Brunet					mux {
10378c0cf40fSJerome Brunet						groups = "uart_cts_a",
10388c0cf40fSJerome Brunet							 "uart_rts_a";
10398c0cf40fSJerome Brunet						function = "uart_a";
10401c5cc1c8SJerome Brunet						bias-disable;
10418c0cf40fSJerome Brunet					};
10428c0cf40fSJerome Brunet				};
10438c0cf40fSJerome Brunet
10448c0cf40fSJerome Brunet				uart_b_x_pins: uart_b_x {
10458c0cf40fSJerome Brunet					mux {
10468c0cf40fSJerome Brunet						groups = "uart_tx_b_x",
10478c0cf40fSJerome Brunet							 "uart_rx_b_x";
10488c0cf40fSJerome Brunet						function = "uart_b";
10491c5cc1c8SJerome Brunet						bias-disable;
10508c0cf40fSJerome Brunet					};
10518c0cf40fSJerome Brunet				};
10528c0cf40fSJerome Brunet
10538c0cf40fSJerome Brunet				uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
10548c0cf40fSJerome Brunet					mux {
10558c0cf40fSJerome Brunet						groups = "uart_cts_b_x",
10568c0cf40fSJerome Brunet							 "uart_rts_b_x";
10578c0cf40fSJerome Brunet						function = "uart_b";
10581c5cc1c8SJerome Brunet						bias-disable;
10598c0cf40fSJerome Brunet					};
10608c0cf40fSJerome Brunet				};
10618c0cf40fSJerome Brunet
10628c0cf40fSJerome Brunet				uart_b_z_pins: uart_b_z {
10638c0cf40fSJerome Brunet					mux {
10648c0cf40fSJerome Brunet						groups = "uart_tx_b_z",
10658c0cf40fSJerome Brunet							 "uart_rx_b_z";
10668c0cf40fSJerome Brunet						function = "uart_b";
10671c5cc1c8SJerome Brunet						bias-disable;
10688c0cf40fSJerome Brunet					};
10698c0cf40fSJerome Brunet				};
10708c0cf40fSJerome Brunet
10718c0cf40fSJerome Brunet				uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
10728c0cf40fSJerome Brunet					mux {
10738c0cf40fSJerome Brunet						groups = "uart_cts_b_z",
10748c0cf40fSJerome Brunet							 "uart_rts_b_z";
10758c0cf40fSJerome Brunet						function = "uart_b";
10761c5cc1c8SJerome Brunet						bias-disable;
10778c0cf40fSJerome Brunet					};
10788c0cf40fSJerome Brunet				};
10798c0cf40fSJerome Brunet
10808c0cf40fSJerome Brunet				uart_ao_b_z_pins: uart_ao_b_z {
10818c0cf40fSJerome Brunet					mux {
10828c0cf40fSJerome Brunet						groups = "uart_ao_tx_b_z",
10838c0cf40fSJerome Brunet							 "uart_ao_rx_b_z";
10848c0cf40fSJerome Brunet						function = "uart_ao_b_z";
10851c5cc1c8SJerome Brunet						bias-disable;
10868c0cf40fSJerome Brunet					};
10878c0cf40fSJerome Brunet				};
10888c0cf40fSJerome Brunet
10898c0cf40fSJerome Brunet				uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
10908c0cf40fSJerome Brunet					mux {
10918c0cf40fSJerome Brunet						groups = "uart_ao_cts_b_z",
10928c0cf40fSJerome Brunet							 "uart_ao_rts_b_z";
10938c0cf40fSJerome Brunet						function = "uart_ao_b_z";
10941c5cc1c8SJerome Brunet						bias-disable;
10958c0cf40fSJerome Brunet					};
10968c0cf40fSJerome Brunet				};
10978c0cf40fSJerome Brunet			};
10988c0cf40fSJerome Brunet		};
10998c0cf40fSJerome Brunet
11008c0cf40fSJerome Brunet		hiubus: bus@ff63c000 {
11018c0cf40fSJerome Brunet			compatible = "simple-bus";
11028c0cf40fSJerome Brunet			reg = <0x0 0xff63c000 0x0 0x1c00>;
11038c0cf40fSJerome Brunet			#address-cells = <2>;
11048c0cf40fSJerome Brunet			#size-cells = <2>;
11058c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
11068c0cf40fSJerome Brunet
11078c0cf40fSJerome Brunet			sysctrl: system-controller@0 {
11088c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-hhi-sysctrl",
1109445f2bdaSNeil Armstrong					     "simple-mfd", "syscon";
11108c0cf40fSJerome Brunet				reg = <0 0 0 0x400>;
11118c0cf40fSJerome Brunet
11128c0cf40fSJerome Brunet				clkc: clock-controller {
11138c0cf40fSJerome Brunet					compatible = "amlogic,axg-clkc";
11148c0cf40fSJerome Brunet					#clock-cells = <1>;
111516361ff2SJerome Brunet					clocks = <&xtal>;
111616361ff2SJerome Brunet					clock-names = "xtal";
11178c0cf40fSJerome Brunet				};
11188c0cf40fSJerome Brunet			};
11198c0cf40fSJerome Brunet		};
11208c0cf40fSJerome Brunet
11219fdff382SJerome Brunet		mailbox: mailbox@ff63c404 {
112201efc19cSNeil Armstrong			compatible = "amlogic,meson-gxbb-mhu";
11239fdff382SJerome Brunet			reg = <0 0xff63c404 0 0x4c>;
11248c0cf40fSJerome Brunet			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
11258c0cf40fSJerome Brunet				     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
11268c0cf40fSJerome Brunet				     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
11278c0cf40fSJerome Brunet			#mbox-cells = <1>;
1128221cf34bSNan Li		};
1129221cf34bSNan Li
11308909e722SJerome Brunet		audio: bus@ff642000 {
11318909e722SJerome Brunet			compatible = "simple-bus";
11328909e722SJerome Brunet			reg = <0x0 0xff642000 0x0 0x2000>;
11338909e722SJerome Brunet			#address-cells = <2>;
11348909e722SJerome Brunet			#size-cells = <2>;
11358909e722SJerome Brunet			ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
11368909e722SJerome Brunet
11378909e722SJerome Brunet			clkc_audio: clock-controller@0 {
11388909e722SJerome Brunet				compatible = "amlogic,axg-audio-clkc";
11398909e722SJerome Brunet				reg = <0x0 0x0 0x0 0xb4>;
11408909e722SJerome Brunet				#clock-cells = <1>;
11418909e722SJerome Brunet
11428909e722SJerome Brunet				clocks = <&clkc CLKID_AUDIO>,
11438909e722SJerome Brunet					 <&clkc CLKID_MPLL0>,
11448909e722SJerome Brunet					 <&clkc CLKID_MPLL1>,
11458909e722SJerome Brunet					 <&clkc CLKID_MPLL2>,
11468909e722SJerome Brunet					 <&clkc CLKID_MPLL3>,
11478909e722SJerome Brunet					 <&clkc CLKID_HIFI_PLL>,
11488909e722SJerome Brunet					 <&clkc CLKID_FCLK_DIV3>,
11498909e722SJerome Brunet					 <&clkc CLKID_FCLK_DIV4>,
11508909e722SJerome Brunet					 <&clkc CLKID_GP0_PLL>;
11518909e722SJerome Brunet				clock-names = "pclk",
11528909e722SJerome Brunet					      "mst_in0",
11538909e722SJerome Brunet					      "mst_in1",
11548909e722SJerome Brunet					      "mst_in2",
11558909e722SJerome Brunet					      "mst_in3",
11568909e722SJerome Brunet					      "mst_in4",
11578909e722SJerome Brunet					      "mst_in5",
11588909e722SJerome Brunet					      "mst_in6",
11598909e722SJerome Brunet					      "mst_in7";
11608909e722SJerome Brunet
11618909e722SJerome Brunet				resets = <&reset RESET_AUDIO>;
11628909e722SJerome Brunet			};
116366d58a8fSJerome Brunet
1164f2b8f6a9SJerome Brunet			toddr_a: audio-controller@100 {
1165f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1166301b94d4SJerome Brunet				reg = <0x0 0x100 0x0 0x2c>;
1167f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1168f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_A";
1169f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
1170f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1171f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_A>;
1172f2b8f6a9SJerome Brunet				status = "disabled";
1173f2b8f6a9SJerome Brunet			};
1174f2b8f6a9SJerome Brunet
1175f2b8f6a9SJerome Brunet			toddr_b: audio-controller@140 {
1176f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1177301b94d4SJerome Brunet				reg = <0x0 0x140 0x0 0x2c>;
1178f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1179f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_B";
1180f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
1181f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1182f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_B>;
1183f2b8f6a9SJerome Brunet				status = "disabled";
1184f2b8f6a9SJerome Brunet			};
1185f2b8f6a9SJerome Brunet
1186f2b8f6a9SJerome Brunet			toddr_c: audio-controller@180 {
1187f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1188301b94d4SJerome Brunet				reg = <0x0 0x180 0x0 0x2c>;
1189f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1190f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_C";
1191f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
1192f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1193f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_C>;
1194f2b8f6a9SJerome Brunet				status = "disabled";
1195f2b8f6a9SJerome Brunet			};
1196f2b8f6a9SJerome Brunet
1197f2b8f6a9SJerome Brunet			frddr_a: audio-controller@1c0 {
1198f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1199301b94d4SJerome Brunet				reg = <0x0 0x1c0 0x0 0x2c>;
1200f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1201f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_A";
1202f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
1203f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1204f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_A>;
1205f2b8f6a9SJerome Brunet				status = "disabled";
1206f2b8f6a9SJerome Brunet			};
1207f2b8f6a9SJerome Brunet
1208f2b8f6a9SJerome Brunet			frddr_b: audio-controller@200 {
1209f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1210301b94d4SJerome Brunet				reg = <0x0 0x200 0x0 0x2c>;
1211f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1212f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_B";
1213f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
1214f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1215f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_B>;
1216f2b8f6a9SJerome Brunet				status = "disabled";
1217f2b8f6a9SJerome Brunet			};
1218f2b8f6a9SJerome Brunet
1219f2b8f6a9SJerome Brunet			frddr_c: audio-controller@240 {
1220f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1221301b94d4SJerome Brunet				reg = <0x0 0x240 0x0 0x2c>;
1222f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1223f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_C";
1224f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
1225f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1226f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_C>;
1227f2b8f6a9SJerome Brunet				status = "disabled";
1228f2b8f6a9SJerome Brunet			};
1229f2b8f6a9SJerome Brunet
123066d58a8fSJerome Brunet			arb: reset-controller@280 {
123166d58a8fSJerome Brunet				compatible = "amlogic,meson-axg-audio-arb";
123266d58a8fSJerome Brunet				reg = <0x0 0x280 0x0 0x4>;
123366d58a8fSJerome Brunet				#reset-cells = <1>;
123466d58a8fSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
123566d58a8fSJerome Brunet			};
1236f08c52deSJerome Brunet
1237bf8e4790SJerome Brunet			tdmin_a: audio-controller@300 {
1238bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1239bf8e4790SJerome Brunet				reg = <0x0 0x300 0x0 0x40>;
1240bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_A";
1241bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1242bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1243bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1244bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1245bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1246bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1247bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1248bf8e4790SJerome Brunet				status = "disabled";
1249bf8e4790SJerome Brunet			};
1250bf8e4790SJerome Brunet
1251bf8e4790SJerome Brunet			tdmin_b: audio-controller@340 {
1252bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1253bf8e4790SJerome Brunet				reg = <0x0 0x340 0x0 0x40>;
1254bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_B";
1255bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1256bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1257bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1258bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1259bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1260bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1261bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1262bf8e4790SJerome Brunet				status = "disabled";
1263bf8e4790SJerome Brunet			};
1264bf8e4790SJerome Brunet
1265bf8e4790SJerome Brunet			tdmin_c: audio-controller@380 {
1266bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1267bf8e4790SJerome Brunet				reg = <0x0 0x380 0x0 0x40>;
1268bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_C";
1269bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1270bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1271bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1272bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1273bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1274bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1275bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1276bf8e4790SJerome Brunet				status = "disabled";
1277bf8e4790SJerome Brunet			};
1278bf8e4790SJerome Brunet
1279bf8e4790SJerome Brunet			tdmin_lb: audio-controller@3c0 {
1280bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1281bf8e4790SJerome Brunet				reg = <0x0 0x3c0 0x0 0x40>;
1282bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_LB";
1283bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1284bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1285bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1286bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1287bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1288bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1289bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1290bf8e4790SJerome Brunet				status = "disabled";
1291bf8e4790SJerome Brunet			};
1292bf8e4790SJerome Brunet
12935e6a18acSJerome Brunet			spdifin: audio-controller@400 {
12945e6a18acSJerome Brunet				compatible = "amlogic,axg-spdifin";
12955e6a18acSJerome Brunet				reg = <0x0 0x400 0x0 0x30>;
12965e6a18acSJerome Brunet				#sound-dai-cells = <0>;
12975e6a18acSJerome Brunet				sound-name-prefix = "SPDIFIN";
12985e6a18acSJerome Brunet				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
12995e6a18acSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
13005e6a18acSJerome Brunet					 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
13015e6a18acSJerome Brunet				clock-names = "pclk", "refclk";
13025e6a18acSJerome Brunet				status = "disabled";
13035e6a18acSJerome Brunet			};
13045e6a18acSJerome Brunet
1305f08c52deSJerome Brunet			spdifout: audio-controller@480 {
1306f08c52deSJerome Brunet				compatible = "amlogic,axg-spdifout";
1307f08c52deSJerome Brunet				reg = <0x0 0x480 0x0 0x50>;
1308f08c52deSJerome Brunet				#sound-dai-cells = <0>;
1309f08c52deSJerome Brunet				sound-name-prefix = "SPDIFOUT";
1310f08c52deSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1311f08c52deSJerome Brunet					 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1312f08c52deSJerome Brunet				clock-names = "pclk", "mclk";
1313f08c52deSJerome Brunet				status = "disabled";
1314f08c52deSJerome Brunet			};
1315fd916739SJerome Brunet
1316fd916739SJerome Brunet			tdmout_a: audio-controller@500 {
1317fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1318fd916739SJerome Brunet				reg = <0x0 0x500 0x0 0x40>;
1319fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_A";
1320fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1321fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1322fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1323fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1324fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1325fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1326fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1327fd916739SJerome Brunet				status = "disabled";
1328fd916739SJerome Brunet			};
1329fd916739SJerome Brunet
1330fd916739SJerome Brunet			tdmout_b: audio-controller@540 {
1331fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1332fd916739SJerome Brunet				reg = <0x0 0x540 0x0 0x40>;
1333fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_B";
1334fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1335fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1336fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1337fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1338fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1339fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1340fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1341fd916739SJerome Brunet				status = "disabled";
1342fd916739SJerome Brunet			};
1343fd916739SJerome Brunet
1344fd916739SJerome Brunet			tdmout_c: audio-controller@580 {
1345fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1346fd916739SJerome Brunet				reg = <0x0 0x580 0x0 0x40>;
1347fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_C";
1348fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1349fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1350fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1351fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1352fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1353fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1354fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1355fd916739SJerome Brunet				status = "disabled";
1356fd916739SJerome Brunet			};
13578909e722SJerome Brunet		};
13588909e722SJerome Brunet
13590cb6c604SKevin Hilman		aobus: bus@ff800000 {
13609d59b708SYixun Lan			compatible = "simple-bus";
13619d59b708SYixun Lan			reg = <0x0 0xff800000 0x0 0x100000>;
13629d59b708SYixun Lan			#address-cells = <2>;
13639d59b708SYixun Lan			#size-cells = <2>;
13649d59b708SYixun Lan			ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
13659d59b708SYixun Lan
1366e03421ecSQiufang Dai			sysctrl_AO: sys-ctrl@0 {
1367445f2bdaSNeil Armstrong				compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
1368e03421ecSQiufang Dai				reg =  <0x0 0x0 0x0 0x100>;
1369e03421ecSQiufang Dai
1370e03421ecSQiufang Dai				clkc_AO: clock-controller {
1371e03421ecSQiufang Dai					compatible = "amlogic,meson-axg-aoclkc";
1372e03421ecSQiufang Dai					#clock-cells = <1>;
1373e03421ecSQiufang Dai					#reset-cells = <1>;
137416361ff2SJerome Brunet					clocks = <&xtal>, <&clkc CLKID_CLK81>;
137516361ff2SJerome Brunet					clock-names = "xtal", "mpeg-clk";
1376e03421ecSQiufang Dai				};
1377e03421ecSQiufang Dai			};
1378e03421ecSQiufang Dai
1379de05ded6SXingyu Chen			pinctrl_aobus: pinctrl@14 {
1380de05ded6SXingyu Chen				compatible = "amlogic,meson-axg-aobus-pinctrl";
1381de05ded6SXingyu Chen				#address-cells = <2>;
1382de05ded6SXingyu Chen				#size-cells = <2>;
1383de05ded6SXingyu Chen				ranges;
1384de05ded6SXingyu Chen
1385de05ded6SXingyu Chen				gpio_ao: bank@14 {
1386de05ded6SXingyu Chen					reg = <0x0 0x00014 0x0 0x8>,
1387de05ded6SXingyu Chen					      <0x0 0x0002c 0x0 0x4>,
1388de05ded6SXingyu Chen					      <0x0 0x00024 0x0 0x8>;
1389de05ded6SXingyu Chen					reg-names = "mux", "pull", "gpio";
1390de05ded6SXingyu Chen					gpio-controller;
1391de05ded6SXingyu Chen					#gpio-cells = <2>;
1392de05ded6SXingyu Chen					gpio-ranges = <&pinctrl_aobus 0 0 15>;
1393de05ded6SXingyu Chen				};
13947bd46a79SYixun Lan
1395c054b6c2SJerome Brunet				i2c_ao_sck_4_pins: i2c_ao_sck_4 {
1396c054b6c2SJerome Brunet					mux {
1397c054b6c2SJerome Brunet						groups = "i2c_ao_sck_4";
1398c054b6c2SJerome Brunet						function = "i2c_ao";
13991c5cc1c8SJerome Brunet						bias-disable;
1400c054b6c2SJerome Brunet					};
1401c054b6c2SJerome Brunet				};
1402c054b6c2SJerome Brunet
1403c054b6c2SJerome Brunet				i2c_ao_sck_8_pins: i2c_ao_sck_8 {
1404c054b6c2SJerome Brunet					mux {
1405c054b6c2SJerome Brunet						groups = "i2c_ao_sck_8";
1406c054b6c2SJerome Brunet						function = "i2c_ao";
14071c5cc1c8SJerome Brunet						bias-disable;
1408c054b6c2SJerome Brunet					};
1409c054b6c2SJerome Brunet				};
1410c054b6c2SJerome Brunet
1411c054b6c2SJerome Brunet				i2c_ao_sck_10_pins: i2c_ao_sck_10 {
1412c054b6c2SJerome Brunet					mux {
1413c054b6c2SJerome Brunet						groups = "i2c_ao_sck_10";
1414c054b6c2SJerome Brunet						function = "i2c_ao";
14151c5cc1c8SJerome Brunet						bias-disable;
1416c054b6c2SJerome Brunet					};
1417c054b6c2SJerome Brunet				};
1418c054b6c2SJerome Brunet
1419c054b6c2SJerome Brunet				i2c_ao_sda_5_pins: i2c_ao_sda_5 {
1420c054b6c2SJerome Brunet					mux {
1421c054b6c2SJerome Brunet						groups = "i2c_ao_sda_5";
1422c054b6c2SJerome Brunet						function = "i2c_ao";
14231c5cc1c8SJerome Brunet						bias-disable;
1424c054b6c2SJerome Brunet					};
1425c054b6c2SJerome Brunet				};
1426c054b6c2SJerome Brunet
1427c054b6c2SJerome Brunet				i2c_ao_sda_9_pins: i2c_ao_sda_9 {
1428c054b6c2SJerome Brunet					mux {
1429c054b6c2SJerome Brunet						groups = "i2c_ao_sda_9";
1430c054b6c2SJerome Brunet						function = "i2c_ao";
14311c5cc1c8SJerome Brunet						bias-disable;
1432c054b6c2SJerome Brunet					};
1433c054b6c2SJerome Brunet				};
1434c054b6c2SJerome Brunet
1435c054b6c2SJerome Brunet				i2c_ao_sda_11_pins: i2c_ao_sda_11 {
1436c054b6c2SJerome Brunet					mux {
1437c054b6c2SJerome Brunet						groups = "i2c_ao_sda_11";
1438c054b6c2SJerome Brunet						function = "i2c_ao";
14391c5cc1c8SJerome Brunet						bias-disable;
1440c054b6c2SJerome Brunet					};
1441c054b6c2SJerome Brunet				};
1442c054b6c2SJerome Brunet
14437bd46a79SYixun Lan				remote_input_ao_pins: remote_input_ao {
14447bd46a79SYixun Lan					mux {
14457bd46a79SYixun Lan						groups = "remote_input_ao";
14467bd46a79SYixun Lan						function = "remote_input_ao";
14471c5cc1c8SJerome Brunet						bias-disable;
14487bd46a79SYixun Lan					};
14497bd46a79SYixun Lan				};
14504eae66a6SYixun Lan
14514eae66a6SYixun Lan				uart_ao_a_pins: uart_ao_a {
14524eae66a6SYixun Lan					mux {
14534eae66a6SYixun Lan						groups = "uart_ao_tx_a",
14544eae66a6SYixun Lan							 "uart_ao_rx_a";
14554eae66a6SYixun Lan						function = "uart_ao_a";
14561c5cc1c8SJerome Brunet						bias-disable;
14574eae66a6SYixun Lan					};
14584eae66a6SYixun Lan				};
14594eae66a6SYixun Lan
14604eae66a6SYixun Lan				uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
14614eae66a6SYixun Lan					mux {
14624eae66a6SYixun Lan						groups = "uart_ao_cts_a",
14634eae66a6SYixun Lan							 "uart_ao_rts_a";
14644eae66a6SYixun Lan						function = "uart_ao_a";
14651c5cc1c8SJerome Brunet						bias-disable;
14664eae66a6SYixun Lan					};
14674eae66a6SYixun Lan				};
14684eae66a6SYixun Lan
14694eae66a6SYixun Lan				uart_ao_b_pins: uart_ao_b {
14704eae66a6SYixun Lan					mux {
14714eae66a6SYixun Lan						groups = "uart_ao_tx_b",
14724eae66a6SYixun Lan							 "uart_ao_rx_b";
14734eae66a6SYixun Lan						function = "uart_ao_b";
14741c5cc1c8SJerome Brunet						bias-disable;
14754eae66a6SYixun Lan					};
14764eae66a6SYixun Lan				};
14774eae66a6SYixun Lan
14784eae66a6SYixun Lan				uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
14794eae66a6SYixun Lan					mux {
14804eae66a6SYixun Lan						groups = "uart_ao_cts_b",
14814eae66a6SYixun Lan							 "uart_ao_rts_b";
14824eae66a6SYixun Lan						function = "uart_ao_b";
14831c5cc1c8SJerome Brunet						bias-disable;
14844eae66a6SYixun Lan					};
14854eae66a6SYixun Lan				};
1486de05ded6SXingyu Chen			};
1487de05ded6SXingyu Chen
1488a04c18cbSJerome Brunet			sec_AO: ao-secure@140 {
1489a04c18cbSJerome Brunet				compatible = "amlogic,meson-gx-ao-secure", "syscon";
1490a04c18cbSJerome Brunet				reg = <0x0 0x140 0x0 0x140>;
1491a04c18cbSJerome Brunet				amlogic,has-chip-id;
1492a04c18cbSJerome Brunet			};
1493a04c18cbSJerome Brunet
14944a81e5ddSJian Hu			pwm_AO_cd: pwm@2000 {
1495b4ff05caSJerome Brunet				compatible = "amlogic,meson-axg-ao-pwm";
14964a81e5ddSJian Hu				reg = <0x0 0x02000  0x0 0x20>;
14974a81e5ddSJian Hu				#pwm-cells = <3>;
14984a81e5ddSJian Hu				status = "disabled";
14994a81e5ddSJian Hu			};
15004a81e5ddSJian Hu
15019d59b708SYixun Lan			uart_AO: serial@3000 {
15029d59b708SYixun Lan				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
15039d59b708SYixun Lan				reg = <0x0 0x3000 0x0 0x18>;
15049d59b708SYixun Lan				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
15059adda353SYixun Lan				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
15069d59b708SYixun Lan				clock-names = "xtal", "pclk", "baud";
15079d59b708SYixun Lan				status = "disabled";
15089d59b708SYixun Lan			};
15099d59b708SYixun Lan
15109d59b708SYixun Lan			uart_AO_B: serial@4000 {
15119d59b708SYixun Lan				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
15129d59b708SYixun Lan				reg = <0x0 0x4000 0x0 0x18>;
15139d59b708SYixun Lan				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
15149adda353SYixun Lan				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
15159d59b708SYixun Lan				clock-names = "xtal", "pclk", "baud";
15169d59b708SYixun Lan				status = "disabled";
15179d59b708SYixun Lan			};
15187bd46a79SYixun Lan
15198c0cf40fSJerome Brunet			i2c_AO: i2c@5000 {
15208c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
15218c0cf40fSJerome Brunet				reg = <0x0 0x05000 0x0 0x20>;
15228c0cf40fSJerome Brunet				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
15238c0cf40fSJerome Brunet				clocks = <&clkc CLKID_AO_I2C>;
15248c0cf40fSJerome Brunet				#address-cells = <1>;
15258c0cf40fSJerome Brunet				#size-cells = <0>;
15268c0cf40fSJerome Brunet				status = "disabled";
15278c0cf40fSJerome Brunet			};
15288c0cf40fSJerome Brunet
15298c0cf40fSJerome Brunet			pwm_AO_ab: pwm@7000 {
15308c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ao-pwm";
15318c0cf40fSJerome Brunet				reg = <0x0 0x07000 0x0 0x20>;
15328c0cf40fSJerome Brunet				#pwm-cells = <3>;
15338c0cf40fSJerome Brunet				status = "disabled";
15348c0cf40fSJerome Brunet			};
15358c0cf40fSJerome Brunet
15367bd46a79SYixun Lan			ir: ir@8000 {
15377bd46a79SYixun Lan				compatible = "amlogic,meson-gxbb-ir";
15387bd46a79SYixun Lan				reg = <0x0 0x8000 0x0 0x20>;
15397bd46a79SYixun Lan				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
15407bd46a79SYixun Lan				status = "disabled";
15417bd46a79SYixun Lan			};
1542a51b74eaSXingyu Chen
1543a51b74eaSXingyu Chen			saradc: adc@9000 {
1544a51b74eaSXingyu Chen				compatible = "amlogic,meson-axg-saradc",
1545a51b74eaSXingyu Chen					"amlogic,meson-saradc";
1546a51b74eaSXingyu Chen				reg = <0x0 0x9000 0x0 0x38>;
1547a51b74eaSXingyu Chen				#io-channel-cells = <1>;
1548a51b74eaSXingyu Chen				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
1549a51b74eaSXingyu Chen				clocks = <&xtal>,
1550a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC>,
1551a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
1552a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
1553a51b74eaSXingyu Chen				clock-names = "clkin", "core", "adc_clk", "adc_sel";
1554a51b74eaSXingyu Chen				status = "disabled";
1555a51b74eaSXingyu Chen			};
15569d59b708SYixun Lan		};
15578c0cf40fSJerome Brunet
15588c0cf40fSJerome Brunet		gic: interrupt-controller@ffc01000 {
15598c0cf40fSJerome Brunet			compatible = "arm,gic-400";
15608c0cf40fSJerome Brunet			reg = <0x0 0xffc01000 0 0x1000>,
15618c0cf40fSJerome Brunet			      <0x0 0xffc02000 0 0x2000>,
15628c0cf40fSJerome Brunet			      <0x0 0xffc04000 0 0x2000>,
15638c0cf40fSJerome Brunet			      <0x0 0xffc06000 0 0x2000>;
15648c0cf40fSJerome Brunet			interrupt-controller;
15658c0cf40fSJerome Brunet			interrupts = <GIC_PPI 9
15668c0cf40fSJerome Brunet				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
15678c0cf40fSJerome Brunet			#interrupt-cells = <3>;
15688c0cf40fSJerome Brunet			#address-cells = <0>;
15698c0cf40fSJerome Brunet		};
15708c0cf40fSJerome Brunet
15718c0cf40fSJerome Brunet		cbus: bus@ffd00000 {
15728c0cf40fSJerome Brunet			compatible = "simple-bus";
15738c0cf40fSJerome Brunet			reg = <0x0 0xffd00000 0x0 0x25000>;
15748c0cf40fSJerome Brunet			#address-cells = <2>;
15758c0cf40fSJerome Brunet			#size-cells = <2>;
15768c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
15778c0cf40fSJerome Brunet
15788c0cf40fSJerome Brunet			reset: reset-controller@1004 {
15798c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-reset";
15808c0cf40fSJerome Brunet				reg = <0x0 0x01004 0x0 0x9c>;
15818c0cf40fSJerome Brunet				#reset-cells = <1>;
15828c0cf40fSJerome Brunet			};
15838c0cf40fSJerome Brunet
15848c0cf40fSJerome Brunet			gpio_intc: interrupt-controller@f080 {
1585cbddb02eSCarlo Caione				compatible = "amlogic,meson-axg-gpio-intc",
1586cbddb02eSCarlo Caione					     "amlogic,meson-gpio-intc";
15878c0cf40fSJerome Brunet				reg = <0x0 0xf080 0x0 0x10>;
15888c0cf40fSJerome Brunet				interrupt-controller;
15898c0cf40fSJerome Brunet				#interrupt-cells = <2>;
15908c0cf40fSJerome Brunet				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
15918c0cf40fSJerome Brunet			};
15928c0cf40fSJerome Brunet
15936f31ba17SCarlo Caione			watchdog@f0d0 {
15946f31ba17SCarlo Caione				compatible = "amlogic,meson-gxbb-wdt";
15956f31ba17SCarlo Caione				reg = <0x0 0xf0d0 0x0 0x10>;
15966f31ba17SCarlo Caione				clocks = <&xtal>;
15976f31ba17SCarlo Caione			};
15986f31ba17SCarlo Caione
15998c0cf40fSJerome Brunet			pwm_ab: pwm@1b000 {
16008c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ee-pwm";
16018c0cf40fSJerome Brunet				reg = <0x0 0x1b000 0x0 0x20>;
16028c0cf40fSJerome Brunet				#pwm-cells = <3>;
16038c0cf40fSJerome Brunet				status = "disabled";
16048c0cf40fSJerome Brunet			};
16058c0cf40fSJerome Brunet
16068c0cf40fSJerome Brunet			pwm_cd: pwm@1a000 {
16078c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ee-pwm";
16088c0cf40fSJerome Brunet				reg = <0x0 0x1a000 0x0 0x20>;
16098c0cf40fSJerome Brunet				#pwm-cells = <3>;
16108c0cf40fSJerome Brunet				status = "disabled";
16118c0cf40fSJerome Brunet			};
16128c0cf40fSJerome Brunet
16138c0cf40fSJerome Brunet			spicc0: spi@13000 {
16148c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-spicc";
16158c0cf40fSJerome Brunet				reg = <0x0 0x13000 0x0 0x3c>;
16168c0cf40fSJerome Brunet				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
16178c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SPICC0>;
16188c0cf40fSJerome Brunet				clock-names = "core";
16198c0cf40fSJerome Brunet				#address-cells = <1>;
16208c0cf40fSJerome Brunet				#size-cells = <0>;
16218c0cf40fSJerome Brunet				status = "disabled";
16228c0cf40fSJerome Brunet			};
16238c0cf40fSJerome Brunet
16248c0cf40fSJerome Brunet			spicc1: spi@15000 {
16258c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-spicc";
16268c0cf40fSJerome Brunet				reg = <0x0 0x15000 0x0 0x3c>;
16278c0cf40fSJerome Brunet				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
16288c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SPICC1>;
16298c0cf40fSJerome Brunet				clock-names = "core";
16308c0cf40fSJerome Brunet				#address-cells = <1>;
16318c0cf40fSJerome Brunet				#size-cells = <0>;
16328c0cf40fSJerome Brunet				status = "disabled";
16338c0cf40fSJerome Brunet			};
16348c0cf40fSJerome Brunet
1635fea888bdSJerome Brunet			clk_msr: clock-measure@18000 {
1636fea888bdSJerome Brunet				compatible = "amlogic,meson-axg-clk-measure";
1637fea888bdSJerome Brunet				reg = <0x0 0x18000 0x0 0x10>;
1638fea888bdSJerome Brunet			};
1639fea888bdSJerome Brunet
16408c0cf40fSJerome Brunet			i2c3: i2c@1c000 {
16418c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16428c0cf40fSJerome Brunet				reg = <0x0 0x1c000 0x0 0x20>;
16438c0cf40fSJerome Brunet				interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
16448c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16458c0cf40fSJerome Brunet				#address-cells = <1>;
16468c0cf40fSJerome Brunet				#size-cells = <0>;
16478c0cf40fSJerome Brunet				status = "disabled";
16488c0cf40fSJerome Brunet			};
16498c0cf40fSJerome Brunet
16508c0cf40fSJerome Brunet			i2c2: i2c@1d000 {
16518c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16528c0cf40fSJerome Brunet				reg = <0x0 0x1d000 0x0 0x20>;
16538c0cf40fSJerome Brunet				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
16548c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16558c0cf40fSJerome Brunet				#address-cells = <1>;
16568c0cf40fSJerome Brunet				#size-cells = <0>;
16578c0cf40fSJerome Brunet				status = "disabled";
16588c0cf40fSJerome Brunet			};
16598c0cf40fSJerome Brunet
16608c0cf40fSJerome Brunet			i2c1: i2c@1e000 {
16618c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16628c0cf40fSJerome Brunet				reg = <0x0 0x1e000 0x0 0x20>;
16638c0cf40fSJerome Brunet				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
16648c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16658c0cf40fSJerome Brunet				#address-cells = <1>;
16668c0cf40fSJerome Brunet				#size-cells = <0>;
16678c0cf40fSJerome Brunet				status = "disabled";
16688c0cf40fSJerome Brunet			};
16698c0cf40fSJerome Brunet
16708c0cf40fSJerome Brunet			i2c0: i2c@1f000 {
16718c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16728c0cf40fSJerome Brunet				reg = <0x0 0x1f000 0x0 0x20>;
16738c0cf40fSJerome Brunet				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
16748c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16758c0cf40fSJerome Brunet				#address-cells = <1>;
16768c0cf40fSJerome Brunet				#size-cells = <0>;
16778c0cf40fSJerome Brunet				status = "disabled";
16788c0cf40fSJerome Brunet			};
16798c0cf40fSJerome Brunet
16808c0cf40fSJerome Brunet			uart_B: serial@23000 {
16818c0cf40fSJerome Brunet				compatible = "amlogic,meson-gx-uart";
16828c0cf40fSJerome Brunet				reg = <0x0 0x23000 0x0 0x18>;
16838c0cf40fSJerome Brunet				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
16848c0cf40fSJerome Brunet				status = "disabled";
16858c0cf40fSJerome Brunet				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
16868c0cf40fSJerome Brunet				clock-names = "xtal", "pclk", "baud";
16878c0cf40fSJerome Brunet			};
16888c0cf40fSJerome Brunet
16898c0cf40fSJerome Brunet			uart_A: serial@24000 {
16908c0cf40fSJerome Brunet				compatible = "amlogic,meson-gx-uart";
16918c0cf40fSJerome Brunet				reg = <0x0 0x24000 0x0 0x18>;
16928c0cf40fSJerome Brunet				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
16938c0cf40fSJerome Brunet				status = "disabled";
16948c0cf40fSJerome Brunet				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
16958c0cf40fSJerome Brunet				clock-names = "xtal", "pclk", "baud";
16968c0cf40fSJerome Brunet			};
16978c0cf40fSJerome Brunet		};
16988c0cf40fSJerome Brunet
16998c0cf40fSJerome Brunet		apb: bus@ffe00000 {
17008c0cf40fSJerome Brunet			compatible = "simple-bus";
17018c0cf40fSJerome Brunet			reg = <0x0 0xffe00000 0x0 0x200000>;
17028c0cf40fSJerome Brunet			#address-cells = <2>;
17038c0cf40fSJerome Brunet			#size-cells = <2>;
17048c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
17058c0cf40fSJerome Brunet
17068c0cf40fSJerome Brunet			sd_emmc_b: sd@5000 {
17078c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-mmc";
17088c0cf40fSJerome Brunet				reg = <0x0 0x5000 0x0 0x800>;
17098c0cf40fSJerome Brunet				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
17108c0cf40fSJerome Brunet				status = "disabled";
17118c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SD_EMMC_B>,
17128c0cf40fSJerome Brunet					<&clkc CLKID_SD_EMMC_B_CLK0>,
17138c0cf40fSJerome Brunet					<&clkc CLKID_FCLK_DIV2>;
17148c0cf40fSJerome Brunet				clock-names = "core", "clkin0", "clkin1";
17158c0cf40fSJerome Brunet				resets = <&reset RESET_SD_EMMC_B>;
17168c0cf40fSJerome Brunet			};
17178c0cf40fSJerome Brunet
17188c0cf40fSJerome Brunet			sd_emmc_c: mmc@7000 {
17198c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-mmc";
17208c0cf40fSJerome Brunet				reg = <0x0 0x7000 0x0 0x800>;
17218c0cf40fSJerome Brunet				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
17228c0cf40fSJerome Brunet				status = "disabled";
17238c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SD_EMMC_C>,
17248c0cf40fSJerome Brunet					<&clkc CLKID_SD_EMMC_C_CLK0>,
17258c0cf40fSJerome Brunet					<&clkc CLKID_FCLK_DIV2>;
17268c0cf40fSJerome Brunet				clock-names = "core", "clkin0", "clkin1";
17278c0cf40fSJerome Brunet				resets = <&reset RESET_SD_EMMC_C>;
17288c0cf40fSJerome Brunet			};
17298c0cf40fSJerome Brunet		};
17308c0cf40fSJerome Brunet
17318c0cf40fSJerome Brunet		sram: sram@fffc0000 {
17328c0cf40fSJerome Brunet			compatible = "amlogic,meson-axg-sram", "mmio-sram";
17338c0cf40fSJerome Brunet			reg = <0x0 0xfffc0000 0x0 0x20000>;
17348c0cf40fSJerome Brunet			#address-cells = <1>;
17358c0cf40fSJerome Brunet			#size-cells = <1>;
17368c0cf40fSJerome Brunet			ranges = <0 0x0 0xfffc0000 0x20000>;
17378c0cf40fSJerome Brunet
17389c2d16bbSJerome Brunet			cpu_scp_lpri: scp-shmem@13000 {
17398c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-scp-shmem";
17408c0cf40fSJerome Brunet				reg = <0x13000 0x400>;
17418c0cf40fSJerome Brunet			};
17428c0cf40fSJerome Brunet
17439c2d16bbSJerome Brunet			cpu_scp_hpri: scp-shmem@13400 {
17448c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-scp-shmem";
17458c0cf40fSJerome Brunet				reg = <0x13400 0x400>;
17468c0cf40fSJerome Brunet			};
17478c0cf40fSJerome Brunet		};
17488c0cf40fSJerome Brunet	};
17498c0cf40fSJerome Brunet
17508c0cf40fSJerome Brunet	timer {
17518c0cf40fSJerome Brunet		compatible = "arm,armv8-timer";
17528c0cf40fSJerome Brunet		interrupts = <GIC_PPI 13
17538c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
17548c0cf40fSJerome Brunet			     <GIC_PPI 14
17558c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
17568c0cf40fSJerome Brunet			     <GIC_PPI 11
17578c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
17588c0cf40fSJerome Brunet			     <GIC_PPI 10
17598c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
17608c0cf40fSJerome Brunet	};
17618c0cf40fSJerome Brunet
17628c0cf40fSJerome Brunet	xtal: xtal-clk {
17638c0cf40fSJerome Brunet		compatible = "fixed-clock";
17648c0cf40fSJerome Brunet		clock-frequency = <24000000>;
17658c0cf40fSJerome Brunet		clock-output-names = "xtal";
17668c0cf40fSJerome Brunet		#clock-cells = <0>;
17679d59b708SYixun Lan	};
17689d59b708SYixun Lan};
1769