1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 29d59b708SYixun Lan/* 39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved. 49d59b708SYixun Lan */ 59d59b708SYixun Lan 69d59b708SYixun Lan#include <dt-bindings/gpio/gpio.h> 79d59b708SYixun Lan#include <dt-bindings/interrupt-controller/irq.h> 89d59b708SYixun Lan#include <dt-bindings/interrupt-controller/arm-gic.h> 98909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h> 1006b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h> 11e03421ecSQiufang Dai#include <dt-bindings/clock/axg-aoclkc.h> 12221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h> 13098e5303SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h> 149d59b708SYixun Lan 159d59b708SYixun Lan/ { 169d59b708SYixun Lan compatible = "amlogic,meson-axg"; 179d59b708SYixun Lan 189d59b708SYixun Lan interrupt-parent = <&gic>; 199d59b708SYixun Lan #address-cells = <2>; 209d59b708SYixun Lan #size-cells = <2>; 219d59b708SYixun Lan 229d59b708SYixun Lan reserved-memory { 239d59b708SYixun Lan #address-cells = <2>; 249d59b708SYixun Lan #size-cells = <2>; 259d59b708SYixun Lan ranges; 269d59b708SYixun Lan 279d59b708SYixun Lan /* 16 MiB reserved for Hardware ROM Firmware */ 289d59b708SYixun Lan hwrom_reserved: hwrom@0 { 299d59b708SYixun Lan reg = <0x0 0x0 0x0 0x1000000>; 309d59b708SYixun Lan no-map; 319d59b708SYixun Lan }; 329d59b708SYixun Lan 339d59b708SYixun Lan /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 34a5494aedSArnd Bergmann secmon_reserved: secmon@5000000 { 359d59b708SYixun Lan reg = <0x0 0x05000000 0x0 0x300000>; 369d59b708SYixun Lan no-map; 379d59b708SYixun Lan }; 389d59b708SYixun Lan }; 399d59b708SYixun Lan 409d59b708SYixun Lan cpus { 419d59b708SYixun Lan #address-cells = <0x2>; 429d59b708SYixun Lan #size-cells = <0x0>; 439d59b708SYixun Lan 449d59b708SYixun Lan cpu0: cpu@0 { 459d59b708SYixun Lan device_type = "cpu"; 469d59b708SYixun Lan compatible = "arm,cortex-a53", "arm,armv8"; 479d59b708SYixun Lan reg = <0x0 0x0>; 489d59b708SYixun Lan enable-method = "psci"; 499d59b708SYixun Lan next-level-cache = <&l2>; 509d59b708SYixun Lan }; 519d59b708SYixun Lan 529d59b708SYixun Lan cpu1: cpu@1 { 539d59b708SYixun Lan device_type = "cpu"; 549d59b708SYixun Lan compatible = "arm,cortex-a53", "arm,armv8"; 559d59b708SYixun Lan reg = <0x0 0x1>; 569d59b708SYixun Lan enable-method = "psci"; 579d59b708SYixun Lan next-level-cache = <&l2>; 589d59b708SYixun Lan }; 599d59b708SYixun Lan 609d59b708SYixun Lan cpu2: cpu@2 { 619d59b708SYixun Lan device_type = "cpu"; 629d59b708SYixun Lan compatible = "arm,cortex-a53", "arm,armv8"; 639d59b708SYixun Lan reg = <0x0 0x2>; 649d59b708SYixun Lan enable-method = "psci"; 659d59b708SYixun Lan next-level-cache = <&l2>; 669d59b708SYixun Lan }; 679d59b708SYixun Lan 689d59b708SYixun Lan cpu3: cpu@3 { 699d59b708SYixun Lan device_type = "cpu"; 709d59b708SYixun Lan compatible = "arm,cortex-a53", "arm,armv8"; 719d59b708SYixun Lan reg = <0x0 0x3>; 729d59b708SYixun Lan enable-method = "psci"; 739d59b708SYixun Lan next-level-cache = <&l2>; 749d59b708SYixun Lan }; 759d59b708SYixun Lan 769d59b708SYixun Lan l2: l2-cache0 { 779d59b708SYixun Lan compatible = "cache"; 789d59b708SYixun Lan }; 799d59b708SYixun Lan }; 809d59b708SYixun Lan 819d59b708SYixun Lan arm-pmu { 829d59b708SYixun Lan compatible = "arm,cortex-a53-pmu"; 839d59b708SYixun Lan interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 849d59b708SYixun Lan <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 859d59b708SYixun Lan <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 869d59b708SYixun Lan <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 879d59b708SYixun Lan interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 889d59b708SYixun Lan }; 899d59b708SYixun Lan 909d59b708SYixun Lan psci { 919d59b708SYixun Lan compatible = "arm,psci-1.0"; 929d59b708SYixun Lan method = "smc"; 939d59b708SYixun Lan }; 949d59b708SYixun Lan 959d59b708SYixun Lan timer { 969d59b708SYixun Lan compatible = "arm,armv8-timer"; 979d59b708SYixun Lan interrupts = <GIC_PPI 13 989d59b708SYixun Lan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 999d59b708SYixun Lan <GIC_PPI 14 1009d59b708SYixun Lan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 1019d59b708SYixun Lan <GIC_PPI 11 1029d59b708SYixun Lan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 1039d59b708SYixun Lan <GIC_PPI 10 1049d59b708SYixun Lan (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 1059d59b708SYixun Lan }; 1069d59b708SYixun Lan 1079d59b708SYixun Lan xtal: xtal-clk { 1089d59b708SYixun Lan compatible = "fixed-clock"; 1099d59b708SYixun Lan clock-frequency = <24000000>; 1109d59b708SYixun Lan clock-output-names = "xtal"; 1119d59b708SYixun Lan #clock-cells = <0>; 1129d59b708SYixun Lan }; 1139d59b708SYixun Lan 1145e395e14SYixun Lan ao_alt_xtal: ao_alt_xtal-clk { 1155e395e14SYixun Lan compatible = "fixed-clock"; 1165e395e14SYixun Lan clock-frequency = <32000000>; 1175e395e14SYixun Lan clock-output-names = "ao_alt_xtal"; 1185e395e14SYixun Lan #clock-cells = <0>; 1195e395e14SYixun Lan }; 1205e395e14SYixun Lan 1219d59b708SYixun Lan soc { 1229d59b708SYixun Lan compatible = "simple-bus"; 1239d59b708SYixun Lan #address-cells = <2>; 1249d59b708SYixun Lan #size-cells = <2>; 1259d59b708SYixun Lan ranges; 1269d59b708SYixun Lan 127221cf34bSNan Li apb: apb@ffe00000 { 128221cf34bSNan Li compatible = "simple-bus"; 129221cf34bSNan Li reg = <0x0 0xffe00000 0x0 0x200000>; 130221cf34bSNan Li #address-cells = <2>; 131221cf34bSNan Li #size-cells = <2>; 132221cf34bSNan Li ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; 133221cf34bSNan Li 134221cf34bSNan Li sd_emmc_b: sd@5000 { 135221cf34bSNan Li compatible = "amlogic,meson-axg-mmc"; 136221cf34bSNan Li reg = <0x0 0x5000 0x0 0x2000>; 137221cf34bSNan Li interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 138221cf34bSNan Li status = "disabled"; 139221cf34bSNan Li clocks = <&clkc CLKID_SD_EMMC_B>, 140221cf34bSNan Li <&clkc CLKID_SD_EMMC_B_CLK0>, 141221cf34bSNan Li <&clkc CLKID_FCLK_DIV2>; 142221cf34bSNan Li clock-names = "core", "clkin0", "clkin1"; 143098e5303SJerome Brunet resets = <&reset RESET_SD_EMMC_B>; 144221cf34bSNan Li }; 145221cf34bSNan Li 146221cf34bSNan Li sd_emmc_c: mmc@7000 { 147221cf34bSNan Li compatible = "amlogic,meson-axg-mmc"; 148221cf34bSNan Li reg = <0x0 0x7000 0x0 0x2000>; 149221cf34bSNan Li interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 150221cf34bSNan Li status = "disabled"; 151221cf34bSNan Li clocks = <&clkc CLKID_SD_EMMC_C>, 152221cf34bSNan Li <&clkc CLKID_SD_EMMC_C_CLK0>, 153221cf34bSNan Li <&clkc CLKID_FCLK_DIV2>; 154221cf34bSNan Li clock-names = "core", "clkin0", "clkin1"; 155098e5303SJerome Brunet resets = <&reset RESET_SD_EMMC_C>; 156221cf34bSNan Li }; 157221cf34bSNan Li }; 158221cf34bSNan Li 1598909e722SJerome Brunet audio: bus@ff642000 { 1608909e722SJerome Brunet compatible = "simple-bus"; 1618909e722SJerome Brunet reg = <0x0 0xff642000 0x0 0x2000>; 1628909e722SJerome Brunet #address-cells = <2>; 1638909e722SJerome Brunet #size-cells = <2>; 1648909e722SJerome Brunet ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>; 1658909e722SJerome Brunet 1668909e722SJerome Brunet clkc_audio: clock-controller@0 { 1678909e722SJerome Brunet compatible = "amlogic,axg-audio-clkc"; 1688909e722SJerome Brunet reg = <0x0 0x0 0x0 0xb4>; 1698909e722SJerome Brunet #clock-cells = <1>; 1708909e722SJerome Brunet 1718909e722SJerome Brunet clocks = <&clkc CLKID_AUDIO>, 1728909e722SJerome Brunet <&clkc CLKID_MPLL0>, 1738909e722SJerome Brunet <&clkc CLKID_MPLL1>, 1748909e722SJerome Brunet <&clkc CLKID_MPLL2>, 1758909e722SJerome Brunet <&clkc CLKID_MPLL3>, 1768909e722SJerome Brunet <&clkc CLKID_HIFI_PLL>, 1778909e722SJerome Brunet <&clkc CLKID_FCLK_DIV3>, 1788909e722SJerome Brunet <&clkc CLKID_FCLK_DIV4>, 1798909e722SJerome Brunet <&clkc CLKID_GP0_PLL>; 1808909e722SJerome Brunet clock-names = "pclk", 1818909e722SJerome Brunet "mst_in0", 1828909e722SJerome Brunet "mst_in1", 1838909e722SJerome Brunet "mst_in2", 1848909e722SJerome Brunet "mst_in3", 1858909e722SJerome Brunet "mst_in4", 1868909e722SJerome Brunet "mst_in5", 1878909e722SJerome Brunet "mst_in6", 1888909e722SJerome Brunet "mst_in7"; 1898909e722SJerome Brunet 1908909e722SJerome Brunet resets = <&reset RESET_AUDIO>; 1918909e722SJerome Brunet }; 19266d58a8fSJerome Brunet 19366d58a8fSJerome Brunet arb: reset-controller@280 { 19466d58a8fSJerome Brunet compatible = "amlogic,meson-axg-audio-arb"; 19566d58a8fSJerome Brunet reg = <0x0 0x280 0x0 0x4>; 19666d58a8fSJerome Brunet #reset-cells = <1>; 19766d58a8fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 19866d58a8fSJerome Brunet }; 199f08c52deSJerome Brunet 200bf8e4790SJerome Brunet tdmin_a: audio-controller@300 { 201bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 202bf8e4790SJerome Brunet reg = <0x0 0x300 0x0 0x40>; 203bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_A"; 204bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 205bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 206bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 207bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 208bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 209bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 210bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 211bf8e4790SJerome Brunet status = "disabled"; 212bf8e4790SJerome Brunet }; 213bf8e4790SJerome Brunet 214bf8e4790SJerome Brunet tdmin_b: audio-controller@340 { 215bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 216bf8e4790SJerome Brunet reg = <0x0 0x340 0x0 0x40>; 217bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_B"; 218bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 219bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 220bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 221bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 222bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 223bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 224bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 225bf8e4790SJerome Brunet status = "disabled"; 226bf8e4790SJerome Brunet }; 227bf8e4790SJerome Brunet 228bf8e4790SJerome Brunet tdmin_c: audio-controller@380 { 229bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 230bf8e4790SJerome Brunet reg = <0x0 0x380 0x0 0x40>; 231bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_C"; 232bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 233bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 234bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 235bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 236bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 237bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 238bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 239bf8e4790SJerome Brunet status = "disabled"; 240bf8e4790SJerome Brunet }; 241bf8e4790SJerome Brunet 242bf8e4790SJerome Brunet tdmin_lb: audio-controller@3c0 { 243bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 244bf8e4790SJerome Brunet reg = <0x0 0x3c0 0x0 0x40>; 245bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_LB"; 246bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 247bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 248bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 249bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 250bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 251bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 252bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 253bf8e4790SJerome Brunet status = "disabled"; 254bf8e4790SJerome Brunet }; 255bf8e4790SJerome Brunet 256f08c52deSJerome Brunet spdifout: audio-controller@480 { 257f08c52deSJerome Brunet compatible = "amlogic,axg-spdifout"; 258f08c52deSJerome Brunet reg = <0x0 0x480 0x0 0x50>; 259f08c52deSJerome Brunet #sound-dai-cells = <0>; 260f08c52deSJerome Brunet sound-name-prefix = "SPDIFOUT"; 261f08c52deSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, 262f08c52deSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; 263f08c52deSJerome Brunet clock-names = "pclk", "mclk"; 264f08c52deSJerome Brunet status = "disabled"; 265f08c52deSJerome Brunet }; 2668909e722SJerome Brunet }; 2678909e722SJerome Brunet 2680cb6c604SKevin Hilman cbus: bus@ffd00000 { 2699d59b708SYixun Lan compatible = "simple-bus"; 2709d59b708SYixun Lan reg = <0x0 0xffd00000 0x0 0x25000>; 2719d59b708SYixun Lan #address-cells = <2>; 2729d59b708SYixun Lan #size-cells = <2>; 2739d59b708SYixun Lan ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; 2749d59b708SYixun Lan 275b0e59f94SYixun Lan gpio_intc: interrupt-controller@f080 { 276b0e59f94SYixun Lan compatible = "amlogic,meson-gpio-intc"; 277b0e59f94SYixun Lan reg = <0x0 0xf080 0x0 0x10>; 278b0e59f94SYixun Lan interrupt-controller; 279b0e59f94SYixun Lan #interrupt-cells = <2>; 280b0e59f94SYixun Lan amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 281b0e59f94SYixun Lan status = "disabled"; 282b0e59f94SYixun Lan }; 283b0e59f94SYixun Lan 2844a81e5ddSJian Hu pwm_ab: pwm@1b000 { 2854a81e5ddSJian Hu compatible = "amlogic,meson-axg-ee-pwm"; 2864a81e5ddSJian Hu reg = <0x0 0x1b000 0x0 0x20>; 2874a81e5ddSJian Hu #pwm-cells = <3>; 2884a81e5ddSJian Hu status = "disabled"; 2894a81e5ddSJian Hu }; 2904a81e5ddSJian Hu 2914a81e5ddSJian Hu pwm_cd: pwm@1a000 { 2924a81e5ddSJian Hu compatible = "amlogic,meson-axg-ee-pwm"; 2934a81e5ddSJian Hu reg = <0x0 0x1a000 0x0 0x20>; 2944a81e5ddSJian Hu #pwm-cells = <3>; 2954a81e5ddSJian Hu status = "disabled"; 2964a81e5ddSJian Hu }; 2974a81e5ddSJian Hu 29843b9f617SYixun Lan reset: reset-controller@1004 { 29943b9f617SYixun Lan compatible = "amlogic,meson-axg-reset"; 30043b9f617SYixun Lan reg = <0x0 0x01004 0x0 0x9c>; 30143b9f617SYixun Lan #reset-cells = <1>; 30243b9f617SYixun Lan }; 30343b9f617SYixun Lan 3048ae4284eSSunny Luo spicc0: spi@13000 { 3058ae4284eSSunny Luo compatible = "amlogic,meson-axg-spicc"; 3068ae4284eSSunny Luo reg = <0x0 0x13000 0x0 0x3c>; 3078ae4284eSSunny Luo interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 3088ae4284eSSunny Luo clocks = <&clkc CLKID_SPICC0>; 3098ae4284eSSunny Luo clock-names = "core"; 3108ae4284eSSunny Luo #address-cells = <1>; 3118ae4284eSSunny Luo #size-cells = <0>; 3128ae4284eSSunny Luo status = "disabled"; 3138ae4284eSSunny Luo }; 3148ae4284eSSunny Luo 3158ae4284eSSunny Luo spicc1: spi@15000 { 3168ae4284eSSunny Luo compatible = "amlogic,meson-axg-spicc"; 3178ae4284eSSunny Luo reg = <0x0 0x15000 0x0 0x3c>; 3188ae4284eSSunny Luo interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 3198ae4284eSSunny Luo clocks = <&clkc CLKID_SPICC1>; 3208ae4284eSSunny Luo clock-names = "core"; 3218ae4284eSSunny Luo #address-cells = <1>; 3228ae4284eSSunny Luo #size-cells = <0>; 3238ae4284eSSunny Luo status = "disabled"; 3248ae4284eSSunny Luo }; 3258ae4284eSSunny Luo 326dc6f858eSJian Hu i2c0: i2c@1f000 { 327dc6f858eSJian Hu compatible = "amlogic,meson-axg-i2c"; 328dc6f858eSJian Hu reg = <0x0 0x1f000 0x0 0x20>; 3292b6ff972SJerome Brunet interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 3302b6ff972SJerome Brunet clocks = <&clkc CLKID_I2C>; 331dc6f858eSJian Hu #address-cells = <1>; 332dc6f858eSJian Hu #size-cells = <0>; 3332b6ff972SJerome Brunet status = "disabled"; 334dc6f858eSJian Hu }; 335dc6f858eSJian Hu 336dc6f858eSJian Hu i2c1: i2c@1e000 { 337dc6f858eSJian Hu compatible = "amlogic,meson-axg-i2c"; 3382b6ff972SJerome Brunet reg = <0x0 0x1e000 0x0 0x20>; 3392b6ff972SJerome Brunet interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 3402b6ff972SJerome Brunet clocks = <&clkc CLKID_I2C>; 341dc6f858eSJian Hu #address-cells = <1>; 342dc6f858eSJian Hu #size-cells = <0>; 343dc6f858eSJian Hu status = "disabled"; 344dc6f858eSJian Hu }; 345dc6f858eSJian Hu 346dc6f858eSJian Hu i2c2: i2c@1d000 { 347dc6f858eSJian Hu compatible = "amlogic,meson-axg-i2c"; 348dc6f858eSJian Hu reg = <0x0 0x1d000 0x0 0x20>; 3492b6ff972SJerome Brunet interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 3502b6ff972SJerome Brunet clocks = <&clkc CLKID_I2C>; 351dc6f858eSJian Hu #address-cells = <1>; 352dc6f858eSJian Hu #size-cells = <0>; 3532b6ff972SJerome Brunet status = "disabled"; 354dc6f858eSJian Hu }; 355dc6f858eSJian Hu 356dc6f858eSJian Hu i2c3: i2c@1c000 { 357dc6f858eSJian Hu compatible = "amlogic,meson-axg-i2c"; 358dc6f858eSJian Hu reg = <0x0 0x1c000 0x0 0x20>; 3592b6ff972SJerome Brunet interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; 3602b6ff972SJerome Brunet clocks = <&clkc CLKID_I2C>; 361dc6f858eSJian Hu #address-cells = <1>; 362dc6f858eSJian Hu #size-cells = <0>; 3632b6ff972SJerome Brunet status = "disabled"; 364dc6f858eSJian Hu }; 365dc6f858eSJian Hu 3669d59b708SYixun Lan uart_A: serial@24000 { 36758662130SYixun Lan compatible = "amlogic,meson-gx-uart"; 36877f5cdbdSYixun Lan reg = <0x0 0x24000 0x0 0x18>; 3699d59b708SYixun Lan interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 3709d59b708SYixun Lan status = "disabled"; 37158662130SYixun Lan clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; 37258662130SYixun Lan clock-names = "xtal", "pclk", "baud"; 3739d59b708SYixun Lan }; 3749d59b708SYixun Lan 3759d59b708SYixun Lan uart_B: serial@23000 { 37658662130SYixun Lan compatible = "amlogic,meson-gx-uart"; 37777f5cdbdSYixun Lan reg = <0x0 0x23000 0x0 0x18>; 3789d59b708SYixun Lan interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 3799d59b708SYixun Lan status = "disabled"; 38058662130SYixun Lan clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; 38158662130SYixun Lan clock-names = "xtal", "pclk", "baud"; 3829d59b708SYixun Lan }; 3839d59b708SYixun Lan }; 3849d59b708SYixun Lan 38529390d27SYixun Lan ethmac: ethernet@ff3f0000 { 38629390d27SYixun Lan compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; 38729390d27SYixun Lan reg = <0x0 0xff3f0000 0x0 0x10000 38829390d27SYixun Lan 0x0 0xff634540 0x0 0x8>; 38929390d27SYixun Lan interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>; 39029390d27SYixun Lan interrupt-names = "macirq"; 39129390d27SYixun Lan clocks = <&clkc CLKID_ETH>, 39229390d27SYixun Lan <&clkc CLKID_FCLK_DIV2>, 39329390d27SYixun Lan <&clkc CLKID_MPLL2>; 39429390d27SYixun Lan clock-names = "stmmaceth", "clkin0", "clkin1"; 39529390d27SYixun Lan status = "disabled"; 39629390d27SYixun Lan }; 39729390d27SYixun Lan 3989d59b708SYixun Lan gic: interrupt-controller@ffc01000 { 3999d59b708SYixun Lan compatible = "arm,gic-400"; 4009d59b708SYixun Lan reg = <0x0 0xffc01000 0 0x1000>, 4019d59b708SYixun Lan <0x0 0xffc02000 0 0x2000>, 4029d59b708SYixun Lan <0x0 0xffc04000 0 0x2000>, 4039d59b708SYixun Lan <0x0 0xffc06000 0 0x2000>; 4049d59b708SYixun Lan interrupt-controller; 4059d59b708SYixun Lan interrupts = <GIC_PPI 9 4069d59b708SYixun Lan (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 4079d59b708SYixun Lan #interrupt-cells = <3>; 4089d59b708SYixun Lan #address-cells = <0>; 4099d59b708SYixun Lan }; 4109d59b708SYixun Lan 411abfc18f9SQiufang Dai hiubus: bus@ff63c000 { 412abfc18f9SQiufang Dai compatible = "simple-bus"; 413abfc18f9SQiufang Dai reg = <0x0 0xff63c000 0x0 0x1c00>; 414abfc18f9SQiufang Dai #address-cells = <2>; 415abfc18f9SQiufang Dai #size-cells = <2>; 416abfc18f9SQiufang Dai ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; 417abfc18f9SQiufang Dai 418cc4d6641SJerome Brunet sysctrl: system-controller@0 { 419cc4d6641SJerome Brunet compatible = "amlogic,meson-axg-hhi-sysctrl", "syscon", "simple-mfd"; 420cc4d6641SJerome Brunet reg = <0 0 0 0x400>; 421cc4d6641SJerome Brunet 422cc4d6641SJerome Brunet clkc: clock-controller { 423abfc18f9SQiufang Dai compatible = "amlogic,axg-clkc"; 424abfc18f9SQiufang Dai #clock-cells = <1>; 425cc4d6641SJerome Brunet }; 426abfc18f9SQiufang Dai }; 427abfc18f9SQiufang Dai }; 428abfc18f9SQiufang Dai 4299d59b708SYixun Lan mailbox: mailbox@ff63dc00 { 4309d59b708SYixun Lan compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; 4319d59b708SYixun Lan reg = <0 0xff63dc00 0 0x400>; 4329d59b708SYixun Lan interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 4339d59b708SYixun Lan <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 4349d59b708SYixun Lan <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 4359d59b708SYixun Lan #mbox-cells = <1>; 4369d59b708SYixun Lan }; 4379d59b708SYixun Lan 438de05ded6SXingyu Chen periphs: periphs@ff634000 { 439de05ded6SXingyu Chen compatible = "simple-bus"; 440de05ded6SXingyu Chen reg = <0x0 0xff634000 0x0 0x2000>; 441de05ded6SXingyu Chen #address-cells = <2>; 442de05ded6SXingyu Chen #size-cells = <2>; 443de05ded6SXingyu Chen ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; 444de05ded6SXingyu Chen 445eafd53d3SJerome Brunet hwrng: rng { 446eafd53d3SJerome Brunet compatible = "amlogic,meson-rng"; 447eafd53d3SJerome Brunet reg = <0x0 0x18 0x0 0x4>; 448eafd53d3SJerome Brunet clocks = <&clkc CLKID_RNG0>; 449eafd53d3SJerome Brunet clock-names = "core"; 450eafd53d3SJerome Brunet }; 451eafd53d3SJerome Brunet 452de05ded6SXingyu Chen pinctrl_periphs: pinctrl@480 { 453de05ded6SXingyu Chen compatible = "amlogic,meson-axg-periphs-pinctrl"; 454de05ded6SXingyu Chen #address-cells = <2>; 455de05ded6SXingyu Chen #size-cells = <2>; 456de05ded6SXingyu Chen ranges; 457de05ded6SXingyu Chen 458de05ded6SXingyu Chen gpio: bank@480 { 459de05ded6SXingyu Chen reg = <0x0 0x00480 0x0 0x40>, 460de05ded6SXingyu Chen <0x0 0x004e8 0x0 0x14>, 461de05ded6SXingyu Chen <0x0 0x00520 0x0 0x14>, 462de05ded6SXingyu Chen <0x0 0x00430 0x0 0x3c>; 463de05ded6SXingyu Chen reg-names = "mux", "pull", "pull-enable", "gpio"; 464de05ded6SXingyu Chen gpio-controller; 465de05ded6SXingyu Chen #gpio-cells = <2>; 466de05ded6SXingyu Chen gpio-ranges = <&pinctrl_periphs 0 0 86>; 467de05ded6SXingyu Chen }; 4684a81e5ddSJian Hu 469221cf34bSNan Li emmc_pins: emmc { 470221cf34bSNan Li mux { 471221cf34bSNan Li groups = "emmc_nand_d0", 472221cf34bSNan Li "emmc_nand_d1", 473221cf34bSNan Li "emmc_nand_d2", 474221cf34bSNan Li "emmc_nand_d3", 475221cf34bSNan Li "emmc_nand_d4", 476221cf34bSNan Li "emmc_nand_d5", 477221cf34bSNan Li "emmc_nand_d6", 478221cf34bSNan Li "emmc_nand_d7", 479221cf34bSNan Li "emmc_clk", 480221cf34bSNan Li "emmc_cmd", 481221cf34bSNan Li "emmc_ds"; 482221cf34bSNan Li function = "emmc"; 483221cf34bSNan Li }; 484221cf34bSNan Li }; 485221cf34bSNan Li 486221cf34bSNan Li emmc_clk_gate_pins: emmc_clk_gate { 487221cf34bSNan Li mux { 488221cf34bSNan Li groups = "BOOT_8"; 489221cf34bSNan Li function = "gpio_periphs"; 490221cf34bSNan Li }; 491221cf34bSNan Li cfg-pull-down { 492221cf34bSNan Li pins = "BOOT_8"; 493221cf34bSNan Li bias-pull-down; 494221cf34bSNan Li }; 495221cf34bSNan Li }; 496221cf34bSNan Li 497221cf34bSNan Li sdio_pins: sdio { 498221cf34bSNan Li mux { 499221cf34bSNan Li groups = "sdio_d0", 500221cf34bSNan Li "sdio_d1", 501221cf34bSNan Li "sdio_d2", 502221cf34bSNan Li "sdio_d3", 503221cf34bSNan Li "sdio_cmd", 504221cf34bSNan Li "sdio_clk"; 505221cf34bSNan Li function = "sdio"; 506221cf34bSNan Li }; 507221cf34bSNan Li }; 508221cf34bSNan Li 509221cf34bSNan Li sdio_clk_gate_pins: sdio_clk_gate { 510221cf34bSNan Li mux { 511221cf34bSNan Li groups = "GPIOX_4"; 512221cf34bSNan Li function = "gpio_periphs"; 513221cf34bSNan Li }; 514221cf34bSNan Li cfg-pull-down { 515221cf34bSNan Li pins = "GPIOX_4"; 516221cf34bSNan Li bias-pull-down; 517221cf34bSNan Li }; 518221cf34bSNan Li }; 519221cf34bSNan Li 520777fa58dSYixun Lan eth_rmii_x_pins: eth-x-rmii { 521777fa58dSYixun Lan mux { 522777fa58dSYixun Lan groups = "eth_mdio_x", 523777fa58dSYixun Lan "eth_mdc_x", 524777fa58dSYixun Lan "eth_rgmii_rx_clk_x", 525777fa58dSYixun Lan "eth_rx_dv_x", 526777fa58dSYixun Lan "eth_rxd0_x", 527777fa58dSYixun Lan "eth_rxd1_x", 528777fa58dSYixun Lan "eth_txen_x", 529777fa58dSYixun Lan "eth_txd0_x", 530777fa58dSYixun Lan "eth_txd1_x"; 531777fa58dSYixun Lan function = "eth"; 532777fa58dSYixun Lan }; 533777fa58dSYixun Lan }; 534777fa58dSYixun Lan 535777fa58dSYixun Lan eth_rmii_y_pins: eth-y-rmii { 536777fa58dSYixun Lan mux { 537777fa58dSYixun Lan groups = "eth_mdio_y", 538777fa58dSYixun Lan "eth_mdc_y", 539777fa58dSYixun Lan "eth_rgmii_rx_clk_y", 540777fa58dSYixun Lan "eth_rx_dv_y", 541777fa58dSYixun Lan "eth_rxd0_y", 542777fa58dSYixun Lan "eth_rxd1_y", 543777fa58dSYixun Lan "eth_txen_y", 544777fa58dSYixun Lan "eth_txd0_y", 545777fa58dSYixun Lan "eth_txd1_y"; 546777fa58dSYixun Lan function = "eth"; 547777fa58dSYixun Lan }; 548777fa58dSYixun Lan }; 549777fa58dSYixun Lan 55029390d27SYixun Lan eth_rgmii_x_pins: eth-x-rgmii { 55129390d27SYixun Lan mux { 55229390d27SYixun Lan groups = "eth_mdio_x", 55329390d27SYixun Lan "eth_mdc_x", 55429390d27SYixun Lan "eth_rgmii_rx_clk_x", 55529390d27SYixun Lan "eth_rx_dv_x", 55629390d27SYixun Lan "eth_rxd0_x", 55729390d27SYixun Lan "eth_rxd1_x", 55829390d27SYixun Lan "eth_rxd2_rgmii", 55929390d27SYixun Lan "eth_rxd3_rgmii", 56029390d27SYixun Lan "eth_rgmii_tx_clk", 56129390d27SYixun Lan "eth_txen_x", 56229390d27SYixun Lan "eth_txd0_x", 56329390d27SYixun Lan "eth_txd1_x", 56429390d27SYixun Lan "eth_txd2_rgmii", 56529390d27SYixun Lan "eth_txd3_rgmii"; 56629390d27SYixun Lan function = "eth"; 56729390d27SYixun Lan }; 56829390d27SYixun Lan }; 56929390d27SYixun Lan 57029390d27SYixun Lan eth_rgmii_y_pins: eth-y-rgmii { 57129390d27SYixun Lan mux { 57229390d27SYixun Lan groups = "eth_mdio_y", 57329390d27SYixun Lan "eth_mdc_y", 57429390d27SYixun Lan "eth_rgmii_rx_clk_y", 57529390d27SYixun Lan "eth_rx_dv_y", 57629390d27SYixun Lan "eth_rxd0_y", 57729390d27SYixun Lan "eth_rxd1_y", 57829390d27SYixun Lan "eth_rxd2_rgmii", 57929390d27SYixun Lan "eth_rxd3_rgmii", 58029390d27SYixun Lan "eth_rgmii_tx_clk", 58129390d27SYixun Lan "eth_txen_y", 58229390d27SYixun Lan "eth_txd0_y", 58329390d27SYixun Lan "eth_txd1_y", 58429390d27SYixun Lan "eth_txd2_rgmii", 58529390d27SYixun Lan "eth_txd3_rgmii"; 58629390d27SYixun Lan function = "eth"; 58729390d27SYixun Lan }; 58829390d27SYixun Lan }; 58929390d27SYixun Lan 59089803e8bSJerome Brunet pdm_dclk_a14_pins: pdm_dclk_a14 { 59189803e8bSJerome Brunet mux { 59289803e8bSJerome Brunet groups = "pdm_dclk_a14"; 59389803e8bSJerome Brunet function = "pdm"; 59489803e8bSJerome Brunet }; 59589803e8bSJerome Brunet }; 59689803e8bSJerome Brunet 59789803e8bSJerome Brunet pdm_dclk_a19_pins: pdm_dclk_a19 { 59889803e8bSJerome Brunet mux { 59989803e8bSJerome Brunet groups = "pdm_dclk_a19"; 60089803e8bSJerome Brunet function = "pdm"; 60189803e8bSJerome Brunet }; 60289803e8bSJerome Brunet }; 60389803e8bSJerome Brunet 60489803e8bSJerome Brunet pdm_din0_pins: pdm_din0 { 60589803e8bSJerome Brunet mux { 60689803e8bSJerome Brunet groups = "pdm_din0"; 60789803e8bSJerome Brunet function = "pdm"; 60889803e8bSJerome Brunet }; 60989803e8bSJerome Brunet }; 61089803e8bSJerome Brunet 61189803e8bSJerome Brunet pdm_din1_pins: pdm_din1 { 61289803e8bSJerome Brunet mux { 61389803e8bSJerome Brunet groups = "pdm_din1"; 61489803e8bSJerome Brunet function = "pdm"; 61589803e8bSJerome Brunet }; 61689803e8bSJerome Brunet }; 61789803e8bSJerome Brunet 61889803e8bSJerome Brunet pdm_din2_pins: pdm_din2 { 61989803e8bSJerome Brunet mux { 62089803e8bSJerome Brunet groups = "pdm_din2"; 62189803e8bSJerome Brunet function = "pdm"; 62289803e8bSJerome Brunet }; 62389803e8bSJerome Brunet }; 62489803e8bSJerome Brunet 62589803e8bSJerome Brunet pdm_din3_pins: pdm_din3 { 62689803e8bSJerome Brunet mux { 62789803e8bSJerome Brunet groups = "pdm_din3"; 62889803e8bSJerome Brunet function = "pdm"; 62989803e8bSJerome Brunet }; 63089803e8bSJerome Brunet }; 63189803e8bSJerome Brunet 6324a81e5ddSJian Hu pwm_a_a_pins: pwm_a_a { 6334a81e5ddSJian Hu mux { 6344a81e5ddSJian Hu groups = "pwm_a_a"; 6354a81e5ddSJian Hu function = "pwm_a"; 6364a81e5ddSJian Hu }; 6374a81e5ddSJian Hu }; 6384a81e5ddSJian Hu 6394a81e5ddSJian Hu pwm_a_x18_pins: pwm_a_x18 { 6404a81e5ddSJian Hu mux { 6414a81e5ddSJian Hu groups = "pwm_a_x18"; 6424a81e5ddSJian Hu function = "pwm_a"; 6434a81e5ddSJian Hu }; 6444a81e5ddSJian Hu }; 6454a81e5ddSJian Hu 6464a81e5ddSJian Hu pwm_a_x20_pins: pwm_a_x20 { 6474a81e5ddSJian Hu mux { 6484a81e5ddSJian Hu groups = "pwm_a_x20"; 6494a81e5ddSJian Hu function = "pwm_a"; 6504a81e5ddSJian Hu }; 6514a81e5ddSJian Hu }; 6524a81e5ddSJian Hu 6534a81e5ddSJian Hu pwm_a_z_pins: pwm_a_z { 6544a81e5ddSJian Hu mux { 6554a81e5ddSJian Hu groups = "pwm_a_z"; 6564a81e5ddSJian Hu function = "pwm_a"; 6574a81e5ddSJian Hu }; 6584a81e5ddSJian Hu }; 6594a81e5ddSJian Hu 6604a81e5ddSJian Hu pwm_b_a_pins: pwm_b_a { 6614a81e5ddSJian Hu mux { 6624a81e5ddSJian Hu groups = "pwm_b_a"; 6634a81e5ddSJian Hu function = "pwm_b"; 6644a81e5ddSJian Hu }; 6654a81e5ddSJian Hu }; 6664a81e5ddSJian Hu 6674a81e5ddSJian Hu pwm_b_x_pins: pwm_b_x { 6684a81e5ddSJian Hu mux { 6694a81e5ddSJian Hu groups = "pwm_b_x"; 6704a81e5ddSJian Hu function = "pwm_b"; 6714a81e5ddSJian Hu }; 6724a81e5ddSJian Hu }; 6734a81e5ddSJian Hu 6744a81e5ddSJian Hu pwm_b_z_pins: pwm_b_z { 6754a81e5ddSJian Hu mux { 6764a81e5ddSJian Hu groups = "pwm_b_z"; 6774a81e5ddSJian Hu function = "pwm_b"; 6784a81e5ddSJian Hu }; 6794a81e5ddSJian Hu }; 6804a81e5ddSJian Hu 6814a81e5ddSJian Hu pwm_c_a_pins: pwm_c_a { 6824a81e5ddSJian Hu mux { 6834a81e5ddSJian Hu groups = "pwm_c_a"; 6844a81e5ddSJian Hu function = "pwm_c"; 6854a81e5ddSJian Hu }; 6864a81e5ddSJian Hu }; 6874a81e5ddSJian Hu 6884a81e5ddSJian Hu pwm_c_x10_pins: pwm_c_x10 { 6894a81e5ddSJian Hu mux { 6904a81e5ddSJian Hu groups = "pwm_c_x10"; 6914a81e5ddSJian Hu function = "pwm_c"; 6924a81e5ddSJian Hu }; 6934a81e5ddSJian Hu }; 6944a81e5ddSJian Hu 6954a81e5ddSJian Hu pwm_c_x17_pins: pwm_c_x17 { 6964a81e5ddSJian Hu mux { 6974a81e5ddSJian Hu groups = "pwm_c_x17"; 6984a81e5ddSJian Hu function = "pwm_c"; 6994a81e5ddSJian Hu }; 7004a81e5ddSJian Hu }; 7014a81e5ddSJian Hu 7024a81e5ddSJian Hu pwm_d_x11_pins: pwm_d_x11 { 7034a81e5ddSJian Hu mux { 7044a81e5ddSJian Hu groups = "pwm_d_x11"; 7054a81e5ddSJian Hu function = "pwm_d"; 7064a81e5ddSJian Hu }; 7074a81e5ddSJian Hu }; 7084a81e5ddSJian Hu 7094a81e5ddSJian Hu pwm_d_x16_pins: pwm_d_x16 { 7104a81e5ddSJian Hu mux { 7114a81e5ddSJian Hu groups = "pwm_d_x16"; 7124a81e5ddSJian Hu function = "pwm_d"; 7134a81e5ddSJian Hu }; 7144a81e5ddSJian Hu }; 7158ae4284eSSunny Luo 716c67ee0a8SJerome Brunet spdif_in_z_pins: spdif_in_z { 717c67ee0a8SJerome Brunet mux { 718c67ee0a8SJerome Brunet groups = "spdif_in_z"; 719c67ee0a8SJerome Brunet function = "spdif_in"; 720c67ee0a8SJerome Brunet }; 721c67ee0a8SJerome Brunet }; 722c67ee0a8SJerome Brunet 723c67ee0a8SJerome Brunet spdif_in_a1_pins: spdif_in_a1 { 724c67ee0a8SJerome Brunet mux { 725c67ee0a8SJerome Brunet groups = "spdif_in_a1"; 726c67ee0a8SJerome Brunet function = "spdif_in"; 727c67ee0a8SJerome Brunet }; 728c67ee0a8SJerome Brunet }; 729c67ee0a8SJerome Brunet 730c67ee0a8SJerome Brunet spdif_in_a7_pins: spdif_in_a7 { 731c67ee0a8SJerome Brunet mux { 732c67ee0a8SJerome Brunet groups = "spdif_in_a7"; 733c67ee0a8SJerome Brunet function = "spdif_in"; 734c67ee0a8SJerome Brunet }; 735c67ee0a8SJerome Brunet }; 736c67ee0a8SJerome Brunet 737c67ee0a8SJerome Brunet spdif_in_a19_pins: spdif_in_a19 { 738c67ee0a8SJerome Brunet mux { 739c67ee0a8SJerome Brunet groups = "spdif_in_a19"; 740c67ee0a8SJerome Brunet function = "spdif_in"; 741c67ee0a8SJerome Brunet }; 742c67ee0a8SJerome Brunet }; 743c67ee0a8SJerome Brunet 744c67ee0a8SJerome Brunet spdif_in_a20_pins: spdif_in_a20 { 745c67ee0a8SJerome Brunet mux { 746c67ee0a8SJerome Brunet groups = "spdif_in_a20"; 747c67ee0a8SJerome Brunet function = "spdif_in"; 748c67ee0a8SJerome Brunet }; 749c67ee0a8SJerome Brunet }; 750c67ee0a8SJerome Brunet 75170d4b64fSJerome Brunet spdif_out_z_pins: spdif_out_z { 75270d4b64fSJerome Brunet mux { 75370d4b64fSJerome Brunet groups = "spdif_out_z"; 75470d4b64fSJerome Brunet function = "spdif_out"; 75570d4b64fSJerome Brunet }; 75670d4b64fSJerome Brunet }; 75770d4b64fSJerome Brunet 75870d4b64fSJerome Brunet spdif_out_a1_pins: spdif_out_a1 { 75970d4b64fSJerome Brunet mux { 76070d4b64fSJerome Brunet groups = "spdif_out_a1"; 76170d4b64fSJerome Brunet function = "spdif_out"; 76270d4b64fSJerome Brunet }; 76370d4b64fSJerome Brunet }; 76470d4b64fSJerome Brunet 76570d4b64fSJerome Brunet spdif_out_a11_pins: spdif_out_a11 { 76670d4b64fSJerome Brunet mux { 76770d4b64fSJerome Brunet groups = "spdif_out_a11"; 76870d4b64fSJerome Brunet function = "spdif_out"; 76970d4b64fSJerome Brunet }; 77070d4b64fSJerome Brunet }; 77170d4b64fSJerome Brunet 77270d4b64fSJerome Brunet spdif_out_a19_pins: spdif_out_a19 { 77370d4b64fSJerome Brunet mux { 77470d4b64fSJerome Brunet groups = "spdif_out_a19"; 77570d4b64fSJerome Brunet function = "spdif_out"; 77670d4b64fSJerome Brunet }; 77770d4b64fSJerome Brunet }; 77870d4b64fSJerome Brunet 77970d4b64fSJerome Brunet spdif_out_a20_pins: spdif_out_a20 { 78070d4b64fSJerome Brunet mux { 78170d4b64fSJerome Brunet groups = "spdif_out_a20"; 78270d4b64fSJerome Brunet function = "spdif_out"; 78370d4b64fSJerome Brunet }; 78470d4b64fSJerome Brunet }; 78570d4b64fSJerome Brunet 7868ae4284eSSunny Luo spi0_pins: spi0 { 7878ae4284eSSunny Luo mux { 7888ae4284eSSunny Luo groups = "spi0_miso", 7898ae4284eSSunny Luo "spi0_mosi", 7908ae4284eSSunny Luo "spi0_clk"; 7918ae4284eSSunny Luo function = "spi0"; 7928ae4284eSSunny Luo }; 7938ae4284eSSunny Luo }; 7948ae4284eSSunny Luo 7958ae4284eSSunny Luo spi0_ss0_pins: spi0_ss0 { 7968ae4284eSSunny Luo mux { 7978ae4284eSSunny Luo groups = "spi0_ss0"; 7988ae4284eSSunny Luo function = "spi0"; 7998ae4284eSSunny Luo }; 8008ae4284eSSunny Luo }; 8018ae4284eSSunny Luo 8028ae4284eSSunny Luo spi0_ss1_pins: spi0_ss1 { 8038ae4284eSSunny Luo mux { 8048ae4284eSSunny Luo groups = "spi0_ss1"; 8058ae4284eSSunny Luo function = "spi0"; 8068ae4284eSSunny Luo }; 8078ae4284eSSunny Luo }; 8088ae4284eSSunny Luo 8098ae4284eSSunny Luo spi0_ss2_pins: spi0_ss2 { 8108ae4284eSSunny Luo mux { 8118ae4284eSSunny Luo groups = "spi0_ss2"; 8128ae4284eSSunny Luo function = "spi0"; 8138ae4284eSSunny Luo }; 8148ae4284eSSunny Luo }; 8158ae4284eSSunny Luo 8168ae4284eSSunny Luo 8178ae4284eSSunny Luo spi1_a_pins: spi1_a { 8188ae4284eSSunny Luo mux { 8198ae4284eSSunny Luo groups = "spi1_miso_a", 8208ae4284eSSunny Luo "spi1_mosi_a", 8218ae4284eSSunny Luo "spi1_clk_a"; 8228ae4284eSSunny Luo function = "spi1"; 8238ae4284eSSunny Luo }; 8248ae4284eSSunny Luo }; 8258ae4284eSSunny Luo 8268ae4284eSSunny Luo spi1_ss0_a_pins: spi1_ss0_a { 8278ae4284eSSunny Luo mux { 8288ae4284eSSunny Luo groups = "spi1_ss0_a"; 8298ae4284eSSunny Luo function = "spi1"; 8308ae4284eSSunny Luo }; 8318ae4284eSSunny Luo }; 8328ae4284eSSunny Luo 8338ae4284eSSunny Luo spi1_ss1_pins: spi1_ss1 { 8348ae4284eSSunny Luo mux { 8358ae4284eSSunny Luo groups = "spi1_ss1"; 8368ae4284eSSunny Luo function = "spi1"; 8378ae4284eSSunny Luo }; 8388ae4284eSSunny Luo }; 8398ae4284eSSunny Luo 8408ae4284eSSunny Luo spi1_x_pins: spi1_x { 8418ae4284eSSunny Luo mux { 8428ae4284eSSunny Luo groups = "spi1_miso_x", 8438ae4284eSSunny Luo "spi1_mosi_x", 8448ae4284eSSunny Luo "spi1_clk_x"; 8458ae4284eSSunny Luo function = "spi1"; 8468ae4284eSSunny Luo }; 8478ae4284eSSunny Luo }; 8488ae4284eSSunny Luo 8498ae4284eSSunny Luo spi1_ss0_x_pins: spi1_ss0_x { 8508ae4284eSSunny Luo mux { 8518ae4284eSSunny Luo groups = "spi1_ss0_x"; 8528ae4284eSSunny Luo function = "spi1"; 8538ae4284eSSunny Luo }; 8548ae4284eSSunny Luo }; 8558a7669a5SJian Hu 8568a7669a5SJian Hu i2c0_pins: i2c0 { 8578a7669a5SJian Hu mux { 8588a7669a5SJian Hu groups = "i2c0_sck", 8598a7669a5SJian Hu "i2c0_sda"; 8608a7669a5SJian Hu function = "i2c0"; 8618a7669a5SJian Hu }; 8628a7669a5SJian Hu }; 8638a7669a5SJian Hu 8648a7669a5SJian Hu i2c1_z_pins: i2c1_z { 8658a7669a5SJian Hu mux { 8668a7669a5SJian Hu groups = "i2c1_sck_z", 8678a7669a5SJian Hu "i2c1_sda_z"; 8688a7669a5SJian Hu function = "i2c1"; 8698a7669a5SJian Hu }; 8708a7669a5SJian Hu }; 8718a7669a5SJian Hu 8728a7669a5SJian Hu i2c1_x_pins: i2c1_x { 8738a7669a5SJian Hu mux { 8748a7669a5SJian Hu groups = "i2c1_sck_x", 8758a7669a5SJian Hu "i2c1_sda_x"; 8768a7669a5SJian Hu function = "i2c1"; 8778a7669a5SJian Hu }; 8788a7669a5SJian Hu }; 8798a7669a5SJian Hu 8808a7669a5SJian Hu i2c2_x_pins: i2c2_x { 8818a7669a5SJian Hu mux { 8828a7669a5SJian Hu groups = "i2c2_sck_x", 8838a7669a5SJian Hu "i2c2_sda_x"; 8848a7669a5SJian Hu function = "i2c2"; 8858a7669a5SJian Hu }; 8868a7669a5SJian Hu }; 8878a7669a5SJian Hu 8888a7669a5SJian Hu i2c2_a_pins: i2c2_a { 8898a7669a5SJian Hu mux { 8908a7669a5SJian Hu groups = "i2c2_sck_a", 8918a7669a5SJian Hu "i2c2_sda_a"; 8928a7669a5SJian Hu function = "i2c2"; 8938a7669a5SJian Hu }; 8948a7669a5SJian Hu }; 8958a7669a5SJian Hu 8968a7669a5SJian Hu i2c3_a6_pins: i2c3_a6 { 8978a7669a5SJian Hu mux { 8988a7669a5SJian Hu groups = "i2c3_sda_a6", 8998a7669a5SJian Hu "i2c3_sck_a7"; 9008a7669a5SJian Hu function = "i2c3"; 9018a7669a5SJian Hu }; 9028a7669a5SJian Hu }; 9038a7669a5SJian Hu 9048a7669a5SJian Hu i2c3_a12_pins: i2c3_a12 { 9058a7669a5SJian Hu mux { 9068a7669a5SJian Hu groups = "i2c3_sda_a12", 9078a7669a5SJian Hu "i2c3_sck_a13"; 9088a7669a5SJian Hu function = "i2c3"; 9098a7669a5SJian Hu }; 9108a7669a5SJian Hu }; 9118a7669a5SJian Hu 9128a7669a5SJian Hu i2c3_a19_pins: i2c3_a19 { 9138a7669a5SJian Hu mux { 9148a7669a5SJian Hu groups = "i2c3_sda_a19", 9158a7669a5SJian Hu "i2c3_sck_a20"; 9168a7669a5SJian Hu function = "i2c3"; 9178a7669a5SJian Hu }; 9188a7669a5SJian Hu }; 9194eae66a6SYixun Lan 9204eae66a6SYixun Lan uart_a_pins: uart_a { 9214eae66a6SYixun Lan mux { 9224eae66a6SYixun Lan groups = "uart_tx_a", 9234eae66a6SYixun Lan "uart_rx_a"; 9244eae66a6SYixun Lan function = "uart_a"; 9254eae66a6SYixun Lan }; 9264eae66a6SYixun Lan }; 9274eae66a6SYixun Lan 9284eae66a6SYixun Lan uart_a_cts_rts_pins: uart_a_cts_rts { 9294eae66a6SYixun Lan mux { 9304eae66a6SYixun Lan groups = "uart_cts_a", 9314eae66a6SYixun Lan "uart_rts_a"; 9324eae66a6SYixun Lan function = "uart_a"; 9334eae66a6SYixun Lan }; 9344eae66a6SYixun Lan }; 9354eae66a6SYixun Lan 9364eae66a6SYixun Lan uart_b_x_pins: uart_b_x { 9374eae66a6SYixun Lan mux { 9384eae66a6SYixun Lan groups = "uart_tx_b_x", 9394eae66a6SYixun Lan "uart_rx_b_x"; 9404eae66a6SYixun Lan function = "uart_b"; 9414eae66a6SYixun Lan }; 9424eae66a6SYixun Lan }; 9434eae66a6SYixun Lan 9444eae66a6SYixun Lan uart_b_x_cts_rts_pins: uart_b_x_cts_rts { 9454eae66a6SYixun Lan mux { 9464eae66a6SYixun Lan groups = "uart_cts_b_x", 9474eae66a6SYixun Lan "uart_rts_b_x"; 9484eae66a6SYixun Lan function = "uart_b"; 9494eae66a6SYixun Lan }; 9504eae66a6SYixun Lan }; 9514eae66a6SYixun Lan 9524eae66a6SYixun Lan uart_b_z_pins: uart_b_z { 9534eae66a6SYixun Lan mux { 9544eae66a6SYixun Lan groups = "uart_tx_b_z", 9554eae66a6SYixun Lan "uart_rx_b_z"; 9564eae66a6SYixun Lan function = "uart_b"; 9574eae66a6SYixun Lan }; 9584eae66a6SYixun Lan }; 9594eae66a6SYixun Lan 9604eae66a6SYixun Lan uart_b_z_cts_rts_pins: uart_b_z_cts_rts { 9614eae66a6SYixun Lan mux { 9624eae66a6SYixun Lan groups = "uart_cts_b_z", 9634eae66a6SYixun Lan "uart_rts_b_z"; 9644eae66a6SYixun Lan function = "uart_b"; 9654eae66a6SYixun Lan }; 9664eae66a6SYixun Lan }; 9674eae66a6SYixun Lan 9684eae66a6SYixun Lan uart_ao_b_z_pins: uart_ao_b_z { 9694eae66a6SYixun Lan mux { 9704eae66a6SYixun Lan groups = "uart_ao_tx_b_z", 9714eae66a6SYixun Lan "uart_ao_rx_b_z"; 9724eae66a6SYixun Lan function = "uart_ao_b_z"; 9734eae66a6SYixun Lan }; 9744eae66a6SYixun Lan }; 9754eae66a6SYixun Lan 9764eae66a6SYixun Lan uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { 9774eae66a6SYixun Lan mux { 9784eae66a6SYixun Lan groups = "uart_ao_cts_b_z", 9794eae66a6SYixun Lan "uart_ao_rts_b_z"; 9804eae66a6SYixun Lan function = "uart_ao_b_z"; 9814eae66a6SYixun Lan }; 9824eae66a6SYixun Lan }; 9830df8fbb9SJerome Brunet 9840df8fbb9SJerome Brunet mclk_b_pins: mclk_b { 9850df8fbb9SJerome Brunet mux { 9860df8fbb9SJerome Brunet groups = "mclk_b"; 9870df8fbb9SJerome Brunet function = "mclk_b"; 9880df8fbb9SJerome Brunet }; 9890df8fbb9SJerome Brunet }; 9900df8fbb9SJerome Brunet 9910df8fbb9SJerome Brunet mclk_c_pins: mclk_c { 9920df8fbb9SJerome Brunet mux { 9930df8fbb9SJerome Brunet groups = "mclk_c"; 9940df8fbb9SJerome Brunet function = "mclk_c"; 9950df8fbb9SJerome Brunet }; 9960df8fbb9SJerome Brunet }; 9970df8fbb9SJerome Brunet 9980df8fbb9SJerome Brunet tdma_sclk_pins: tdma_sclk { 9990df8fbb9SJerome Brunet mux { 10000df8fbb9SJerome Brunet groups = "tdma_sclk"; 10010df8fbb9SJerome Brunet function = "tdma"; 10020df8fbb9SJerome Brunet }; 10030df8fbb9SJerome Brunet }; 10040df8fbb9SJerome Brunet 10050df8fbb9SJerome Brunet tdma_sclk_slv_pins: tdma_sclk_slv { 10060df8fbb9SJerome Brunet mux { 10070df8fbb9SJerome Brunet groups = "tdma_sclk_slv"; 10080df8fbb9SJerome Brunet function = "tdma"; 10090df8fbb9SJerome Brunet }; 10100df8fbb9SJerome Brunet }; 10110df8fbb9SJerome Brunet 10120df8fbb9SJerome Brunet tdma_fs_pins: tdma_fs { 10130df8fbb9SJerome Brunet mux { 10140df8fbb9SJerome Brunet groups = "tdma_fs"; 10150df8fbb9SJerome Brunet function = "tdma"; 10160df8fbb9SJerome Brunet }; 10170df8fbb9SJerome Brunet }; 10180df8fbb9SJerome Brunet 10190df8fbb9SJerome Brunet tdma_fs_slv_pins: tdma_fs_slv { 10200df8fbb9SJerome Brunet mux { 10210df8fbb9SJerome Brunet groups = "tdma_fs_slv"; 10220df8fbb9SJerome Brunet function = "tdma"; 10230df8fbb9SJerome Brunet }; 10240df8fbb9SJerome Brunet }; 10250df8fbb9SJerome Brunet 10260df8fbb9SJerome Brunet tdma_din0_pins: tdma_din0 { 10270df8fbb9SJerome Brunet mux { 10280df8fbb9SJerome Brunet groups = "tdma_din0"; 10290df8fbb9SJerome Brunet function = "tdma"; 10300df8fbb9SJerome Brunet }; 10310df8fbb9SJerome Brunet }; 10320df8fbb9SJerome Brunet 10330df8fbb9SJerome Brunet tdma_dout0_x14_pins: tdma_dout0_x14 { 10340df8fbb9SJerome Brunet mux { 10350df8fbb9SJerome Brunet groups = "tdma_dout0_x14"; 10360df8fbb9SJerome Brunet function = "tdma"; 10370df8fbb9SJerome Brunet }; 10380df8fbb9SJerome Brunet }; 10390df8fbb9SJerome Brunet 10400df8fbb9SJerome Brunet tdma_dout0_x15_pins: tdma_dout0_x15 { 10410df8fbb9SJerome Brunet mux { 10420df8fbb9SJerome Brunet groups = "tdma_dout0_x15"; 10430df8fbb9SJerome Brunet function = "tdma"; 10440df8fbb9SJerome Brunet }; 10450df8fbb9SJerome Brunet }; 10460df8fbb9SJerome Brunet 10470df8fbb9SJerome Brunet tdma_dout1_pins: tdma_dout1 { 10480df8fbb9SJerome Brunet mux { 10490df8fbb9SJerome Brunet groups = "tdma_dout1"; 10500df8fbb9SJerome Brunet function = "tdma"; 10510df8fbb9SJerome Brunet }; 10520df8fbb9SJerome Brunet }; 10530df8fbb9SJerome Brunet 10540df8fbb9SJerome Brunet tdma_din1_pins: tdma_din1 { 10550df8fbb9SJerome Brunet mux { 10560df8fbb9SJerome Brunet groups = "tdma_din1"; 10570df8fbb9SJerome Brunet function = "tdma"; 10580df8fbb9SJerome Brunet }; 10590df8fbb9SJerome Brunet }; 10600df8fbb9SJerome Brunet 10610df8fbb9SJerome Brunet tdmb_sclk_pins: tdmb_sclk { 10620df8fbb9SJerome Brunet mux { 10630df8fbb9SJerome Brunet groups = "tdmb_sclk"; 10640df8fbb9SJerome Brunet function = "tdmb"; 10650df8fbb9SJerome Brunet }; 10660df8fbb9SJerome Brunet }; 10670df8fbb9SJerome Brunet 10680df8fbb9SJerome Brunet tdmb_sclk_slv_pins: tdmb_sclk_slv { 10690df8fbb9SJerome Brunet mux { 10700df8fbb9SJerome Brunet groups = "tdmb_sclk_slv"; 10710df8fbb9SJerome Brunet function = "tdmb"; 10720df8fbb9SJerome Brunet }; 10730df8fbb9SJerome Brunet }; 10740df8fbb9SJerome Brunet 10750df8fbb9SJerome Brunet tdmb_fs_pins: tdmb_fs { 10760df8fbb9SJerome Brunet mux { 10770df8fbb9SJerome Brunet groups = "tdmb_fs"; 10780df8fbb9SJerome Brunet function = "tdmb"; 10790df8fbb9SJerome Brunet }; 10800df8fbb9SJerome Brunet }; 10810df8fbb9SJerome Brunet 10820df8fbb9SJerome Brunet tdmb_fs_slv_pins: tdmb_fs_slv { 10830df8fbb9SJerome Brunet mux { 10840df8fbb9SJerome Brunet groups = "tdmb_fs_slv"; 10850df8fbb9SJerome Brunet function = "tdmb"; 10860df8fbb9SJerome Brunet }; 10870df8fbb9SJerome Brunet }; 10880df8fbb9SJerome Brunet 10890df8fbb9SJerome Brunet tdmb_din0_pins: tdmb_din0 { 10900df8fbb9SJerome Brunet mux { 10910df8fbb9SJerome Brunet groups = "tdmb_din0"; 10920df8fbb9SJerome Brunet function = "tdmb"; 10930df8fbb9SJerome Brunet }; 10940df8fbb9SJerome Brunet }; 10950df8fbb9SJerome Brunet 10960df8fbb9SJerome Brunet tdmb_dout0_pins: tdmb_dout0 { 10970df8fbb9SJerome Brunet mux { 10980df8fbb9SJerome Brunet groups = "tdmb_dout0"; 10990df8fbb9SJerome Brunet function = "tdmb"; 11000df8fbb9SJerome Brunet }; 11010df8fbb9SJerome Brunet }; 11020df8fbb9SJerome Brunet 11030df8fbb9SJerome Brunet tdmb_din1_pins: tdmb_din1 { 11040df8fbb9SJerome Brunet mux { 11050df8fbb9SJerome Brunet groups = "tdmb_din1"; 11060df8fbb9SJerome Brunet function = "tdmb"; 11070df8fbb9SJerome Brunet }; 11080df8fbb9SJerome Brunet }; 11090df8fbb9SJerome Brunet 11100df8fbb9SJerome Brunet tdmb_dout1_pins: tdmb_dout1 { 11110df8fbb9SJerome Brunet mux { 11120df8fbb9SJerome Brunet groups = "tdmb_dout1"; 11130df8fbb9SJerome Brunet function = "tdmb"; 11140df8fbb9SJerome Brunet }; 11150df8fbb9SJerome Brunet }; 11160df8fbb9SJerome Brunet 11170df8fbb9SJerome Brunet tdmb_din2_pins: tdmb_din2 { 11180df8fbb9SJerome Brunet mux { 11190df8fbb9SJerome Brunet groups = "tdmb_din2"; 11200df8fbb9SJerome Brunet function = "tdmb"; 11210df8fbb9SJerome Brunet }; 11220df8fbb9SJerome Brunet }; 11230df8fbb9SJerome Brunet 11240df8fbb9SJerome Brunet tdmb_dout2_pins: tdmb_dout2 { 11250df8fbb9SJerome Brunet mux { 11260df8fbb9SJerome Brunet groups = "tdmb_dout2"; 11270df8fbb9SJerome Brunet function = "tdmb"; 11280df8fbb9SJerome Brunet }; 11290df8fbb9SJerome Brunet }; 11300df8fbb9SJerome Brunet 11310df8fbb9SJerome Brunet tdmb_din3_pins: tdmb_din3 { 11320df8fbb9SJerome Brunet mux { 11330df8fbb9SJerome Brunet groups = "tdmb_din3"; 11340df8fbb9SJerome Brunet function = "tdmb"; 11350df8fbb9SJerome Brunet }; 11360df8fbb9SJerome Brunet }; 11370df8fbb9SJerome Brunet 11380df8fbb9SJerome Brunet tdmb_dout3_pins: tdmb_dout3 { 11390df8fbb9SJerome Brunet mux { 11400df8fbb9SJerome Brunet groups = "tdmb_dout3"; 11410df8fbb9SJerome Brunet function = "tdmb"; 11420df8fbb9SJerome Brunet }; 11430df8fbb9SJerome Brunet }; 11440df8fbb9SJerome Brunet 11450df8fbb9SJerome Brunet tdmc_sclk_pins: tdmc_sclk { 11460df8fbb9SJerome Brunet mux { 11470df8fbb9SJerome Brunet groups = "tdmc_sclk"; 11480df8fbb9SJerome Brunet function = "tdmc"; 11490df8fbb9SJerome Brunet }; 11500df8fbb9SJerome Brunet }; 11510df8fbb9SJerome Brunet 11520df8fbb9SJerome Brunet tdmc_sclk_slv_pins: tdmc_sclk_slv { 11530df8fbb9SJerome Brunet mux { 11540df8fbb9SJerome Brunet groups = "tdmc_sclk_slv"; 11550df8fbb9SJerome Brunet function = "tdmc"; 11560df8fbb9SJerome Brunet }; 11570df8fbb9SJerome Brunet }; 11580df8fbb9SJerome Brunet 11590df8fbb9SJerome Brunet tdmc_fs_pins: tdmc_fs { 11600df8fbb9SJerome Brunet mux { 11610df8fbb9SJerome Brunet groups = "tdmc_fs"; 11620df8fbb9SJerome Brunet function = "tdmc"; 11630df8fbb9SJerome Brunet }; 11640df8fbb9SJerome Brunet }; 11650df8fbb9SJerome Brunet 11660df8fbb9SJerome Brunet tdmc_fs_slv_pins: tdmc_fs_slv { 11670df8fbb9SJerome Brunet mux { 11680df8fbb9SJerome Brunet groups = "tdmc_fs_slv"; 11690df8fbb9SJerome Brunet function = "tdmc"; 11700df8fbb9SJerome Brunet }; 11710df8fbb9SJerome Brunet }; 11720df8fbb9SJerome Brunet 11730df8fbb9SJerome Brunet tdmc_din0_pins: tdmc_din0 { 11740df8fbb9SJerome Brunet mux { 11750df8fbb9SJerome Brunet groups = "tdmc_din0"; 11760df8fbb9SJerome Brunet function = "tdmc"; 11770df8fbb9SJerome Brunet }; 11780df8fbb9SJerome Brunet }; 11790df8fbb9SJerome Brunet 11800df8fbb9SJerome Brunet tdmc_dout0_pins: tdmc_dout0 { 11810df8fbb9SJerome Brunet mux { 11820df8fbb9SJerome Brunet groups = "tdmc_dout0"; 11830df8fbb9SJerome Brunet function = "tdmc"; 11840df8fbb9SJerome Brunet }; 11850df8fbb9SJerome Brunet }; 11860df8fbb9SJerome Brunet 11870df8fbb9SJerome Brunet tdmc_din1_pins: tdmc_din1 { 11880df8fbb9SJerome Brunet mux { 11890df8fbb9SJerome Brunet groups = "tdmc_din1"; 11900df8fbb9SJerome Brunet function = "tdmc"; 11910df8fbb9SJerome Brunet }; 11920df8fbb9SJerome Brunet }; 11930df8fbb9SJerome Brunet 11940df8fbb9SJerome Brunet tdmc_dout1_pins: tdmc_dout1 { 11950df8fbb9SJerome Brunet mux { 11960df8fbb9SJerome Brunet groups = "tdmc_dout1"; 11970df8fbb9SJerome Brunet function = "tdmc"; 11980df8fbb9SJerome Brunet }; 11990df8fbb9SJerome Brunet }; 12000df8fbb9SJerome Brunet 12010df8fbb9SJerome Brunet tdmc_din2_pins: tdmc_din2 { 12020df8fbb9SJerome Brunet mux { 12030df8fbb9SJerome Brunet groups = "tdmc_din2"; 12040df8fbb9SJerome Brunet function = "tdmc"; 12050df8fbb9SJerome Brunet }; 12060df8fbb9SJerome Brunet }; 12070df8fbb9SJerome Brunet 12080df8fbb9SJerome Brunet tdmc_dout2_pins: tdmc_dout2 { 12090df8fbb9SJerome Brunet mux { 12100df8fbb9SJerome Brunet groups = "tdmc_dout2"; 12110df8fbb9SJerome Brunet function = "tdmc"; 12120df8fbb9SJerome Brunet }; 12130df8fbb9SJerome Brunet }; 12140df8fbb9SJerome Brunet 12150df8fbb9SJerome Brunet tdmc_din3_pins: tdmc_din3 { 12160df8fbb9SJerome Brunet mux { 12170df8fbb9SJerome Brunet groups = "tdmc_din3"; 12180df8fbb9SJerome Brunet function = "tdmc"; 12190df8fbb9SJerome Brunet }; 12200df8fbb9SJerome Brunet }; 12210df8fbb9SJerome Brunet 12220df8fbb9SJerome Brunet tdmc_dout3_pins: tdmc_dout3 { 12230df8fbb9SJerome Brunet mux { 12240df8fbb9SJerome Brunet groups = "tdmc_dout3"; 12250df8fbb9SJerome Brunet function = "tdmc"; 12260df8fbb9SJerome Brunet }; 12270df8fbb9SJerome Brunet }; 1228de05ded6SXingyu Chen }; 1229de05ded6SXingyu Chen }; 1230de05ded6SXingyu Chen 12319d59b708SYixun Lan sram: sram@fffc0000 { 12329d59b708SYixun Lan compatible = "amlogic,meson-axg-sram", "mmio-sram"; 12339d59b708SYixun Lan reg = <0x0 0xfffc0000 0x0 0x20000>; 12349d59b708SYixun Lan #address-cells = <1>; 12359d59b708SYixun Lan #size-cells = <1>; 12369d59b708SYixun Lan ranges = <0 0x0 0xfffc0000 0x20000>; 12379d59b708SYixun Lan 12389d59b708SYixun Lan cpu_scp_lpri: scp-shmem@0 { 12399d59b708SYixun Lan compatible = "amlogic,meson-axg-scp-shmem"; 12409d59b708SYixun Lan reg = <0x13000 0x400>; 12419d59b708SYixun Lan }; 12429d59b708SYixun Lan 12439d59b708SYixun Lan cpu_scp_hpri: scp-shmem@200 { 12449d59b708SYixun Lan compatible = "amlogic,meson-axg-scp-shmem"; 12459d59b708SYixun Lan reg = <0x13400 0x400>; 12469d59b708SYixun Lan }; 12479d59b708SYixun Lan }; 12489d59b708SYixun Lan 12490cb6c604SKevin Hilman aobus: bus@ff800000 { 12509d59b708SYixun Lan compatible = "simple-bus"; 12519d59b708SYixun Lan reg = <0x0 0xff800000 0x0 0x100000>; 12529d59b708SYixun Lan #address-cells = <2>; 12539d59b708SYixun Lan #size-cells = <2>; 12549d59b708SYixun Lan ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; 12559d59b708SYixun Lan 1256e03421ecSQiufang Dai sysctrl_AO: sys-ctrl@0 { 1257e03421ecSQiufang Dai compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd"; 1258e03421ecSQiufang Dai reg = <0x0 0x0 0x0 0x100>; 1259e03421ecSQiufang Dai 1260e03421ecSQiufang Dai clkc_AO: clock-controller { 1261e03421ecSQiufang Dai compatible = "amlogic,meson-axg-aoclkc"; 1262e03421ecSQiufang Dai #clock-cells = <1>; 1263e03421ecSQiufang Dai #reset-cells = <1>; 1264e03421ecSQiufang Dai }; 1265e03421ecSQiufang Dai }; 1266e03421ecSQiufang Dai 1267de05ded6SXingyu Chen pinctrl_aobus: pinctrl@14 { 1268de05ded6SXingyu Chen compatible = "amlogic,meson-axg-aobus-pinctrl"; 1269de05ded6SXingyu Chen #address-cells = <2>; 1270de05ded6SXingyu Chen #size-cells = <2>; 1271de05ded6SXingyu Chen ranges; 1272de05ded6SXingyu Chen 1273de05ded6SXingyu Chen gpio_ao: bank@14 { 1274de05ded6SXingyu Chen reg = <0x0 0x00014 0x0 0x8>, 1275de05ded6SXingyu Chen <0x0 0x0002c 0x0 0x4>, 1276de05ded6SXingyu Chen <0x0 0x00024 0x0 0x8>; 1277de05ded6SXingyu Chen reg-names = "mux", "pull", "gpio"; 1278de05ded6SXingyu Chen gpio-controller; 1279de05ded6SXingyu Chen #gpio-cells = <2>; 1280de05ded6SXingyu Chen gpio-ranges = <&pinctrl_aobus 0 0 15>; 1281de05ded6SXingyu Chen }; 12827bd46a79SYixun Lan 1283c054b6c2SJerome Brunet i2c_ao_sck_4_pins: i2c_ao_sck_4 { 1284c054b6c2SJerome Brunet mux { 1285c054b6c2SJerome Brunet groups = "i2c_ao_sck_4"; 1286c054b6c2SJerome Brunet function = "i2c_ao"; 1287c054b6c2SJerome Brunet }; 1288c054b6c2SJerome Brunet }; 1289c054b6c2SJerome Brunet 1290c054b6c2SJerome Brunet i2c_ao_sck_8_pins: i2c_ao_sck_8 { 1291c054b6c2SJerome Brunet mux { 1292c054b6c2SJerome Brunet groups = "i2c_ao_sck_8"; 1293c054b6c2SJerome Brunet function = "i2c_ao"; 1294c054b6c2SJerome Brunet }; 1295c054b6c2SJerome Brunet }; 1296c054b6c2SJerome Brunet 1297c054b6c2SJerome Brunet i2c_ao_sck_10_pins: i2c_ao_sck_10 { 1298c054b6c2SJerome Brunet mux { 1299c054b6c2SJerome Brunet groups = "i2c_ao_sck_10"; 1300c054b6c2SJerome Brunet function = "i2c_ao"; 1301c054b6c2SJerome Brunet }; 1302c054b6c2SJerome Brunet }; 1303c054b6c2SJerome Brunet 1304c054b6c2SJerome Brunet i2c_ao_sda_5_pins: i2c_ao_sda_5 { 1305c054b6c2SJerome Brunet mux { 1306c054b6c2SJerome Brunet groups = "i2c_ao_sda_5"; 1307c054b6c2SJerome Brunet function = "i2c_ao"; 1308c054b6c2SJerome Brunet }; 1309c054b6c2SJerome Brunet }; 1310c054b6c2SJerome Brunet 1311c054b6c2SJerome Brunet i2c_ao_sda_9_pins: i2c_ao_sda_9 { 1312c054b6c2SJerome Brunet mux { 1313c054b6c2SJerome Brunet groups = "i2c_ao_sda_9"; 1314c054b6c2SJerome Brunet function = "i2c_ao"; 1315c054b6c2SJerome Brunet }; 1316c054b6c2SJerome Brunet }; 1317c054b6c2SJerome Brunet 1318c054b6c2SJerome Brunet i2c_ao_sda_11_pins: i2c_ao_sda_11 { 1319c054b6c2SJerome Brunet mux { 1320c054b6c2SJerome Brunet groups = "i2c_ao_sda_11"; 1321c054b6c2SJerome Brunet function = "i2c_ao"; 1322c054b6c2SJerome Brunet }; 1323c054b6c2SJerome Brunet }; 1324c054b6c2SJerome Brunet 13257bd46a79SYixun Lan remote_input_ao_pins: remote_input_ao { 13267bd46a79SYixun Lan mux { 13277bd46a79SYixun Lan groups = "remote_input_ao"; 13287bd46a79SYixun Lan function = "remote_input_ao"; 13297bd46a79SYixun Lan }; 13307bd46a79SYixun Lan }; 13314eae66a6SYixun Lan 13324eae66a6SYixun Lan uart_ao_a_pins: uart_ao_a { 13334eae66a6SYixun Lan mux { 13344eae66a6SYixun Lan groups = "uart_ao_tx_a", 13354eae66a6SYixun Lan "uart_ao_rx_a"; 13364eae66a6SYixun Lan function = "uart_ao_a"; 13374eae66a6SYixun Lan }; 13384eae66a6SYixun Lan }; 13394eae66a6SYixun Lan 13404eae66a6SYixun Lan uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { 13414eae66a6SYixun Lan mux { 13424eae66a6SYixun Lan groups = "uart_ao_cts_a", 13434eae66a6SYixun Lan "uart_ao_rts_a"; 13444eae66a6SYixun Lan function = "uart_ao_a"; 13454eae66a6SYixun Lan }; 13464eae66a6SYixun Lan }; 13474eae66a6SYixun Lan 13484eae66a6SYixun Lan uart_ao_b_pins: uart_ao_b { 13494eae66a6SYixun Lan mux { 13504eae66a6SYixun Lan groups = "uart_ao_tx_b", 13514eae66a6SYixun Lan "uart_ao_rx_b"; 13524eae66a6SYixun Lan function = "uart_ao_b"; 13534eae66a6SYixun Lan }; 13544eae66a6SYixun Lan }; 13554eae66a6SYixun Lan 13564eae66a6SYixun Lan uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { 13574eae66a6SYixun Lan mux { 13584eae66a6SYixun Lan groups = "uart_ao_cts_b", 13594eae66a6SYixun Lan "uart_ao_rts_b"; 13604eae66a6SYixun Lan function = "uart_ao_b"; 13614eae66a6SYixun Lan }; 13624eae66a6SYixun Lan }; 1363de05ded6SXingyu Chen }; 1364de05ded6SXingyu Chen 1365a04c18cbSJerome Brunet sec_AO: ao-secure@140 { 1366a04c18cbSJerome Brunet compatible = "amlogic,meson-gx-ao-secure", "syscon"; 1367a04c18cbSJerome Brunet reg = <0x0 0x140 0x0 0x140>; 1368a04c18cbSJerome Brunet amlogic,has-chip-id; 1369a04c18cbSJerome Brunet }; 1370a04c18cbSJerome Brunet 13714a81e5ddSJian Hu pwm_AO_ab: pwm@7000 { 13724a81e5ddSJian Hu compatible = "amlogic,meson-axg-ao-pwm"; 13734a81e5ddSJian Hu reg = <0x0 0x07000 0x0 0x20>; 13744a81e5ddSJian Hu #pwm-cells = <3>; 13754a81e5ddSJian Hu status = "disabled"; 13764a81e5ddSJian Hu }; 13774a81e5ddSJian Hu 13784a81e5ddSJian Hu pwm_AO_cd: pwm@2000 { 1379b4ff05caSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 13804a81e5ddSJian Hu reg = <0x0 0x02000 0x0 0x20>; 13814a81e5ddSJian Hu #pwm-cells = <3>; 13824a81e5ddSJian Hu status = "disabled"; 13834a81e5ddSJian Hu }; 13844a81e5ddSJian Hu 1385dc6f858eSJian Hu i2c_AO: i2c@5000 { 1386dc6f858eSJian Hu compatible = "amlogic,meson-axg-i2c"; 1387dc6f858eSJian Hu reg = <0x0 0x05000 0x0 0x20>; 1388dc6f858eSJian Hu interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 138909eeaf44SJerome Brunet clocks = <&clkc CLKID_AO_I2C>; 1390dc6f858eSJian Hu #address-cells = <1>; 1391dc6f858eSJian Hu #size-cells = <0>; 13922b6ff972SJerome Brunet status = "disabled"; 1393dc6f858eSJian Hu }; 1394dc6f858eSJian Hu 13959d59b708SYixun Lan uart_AO: serial@3000 { 13969d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 13979d59b708SYixun Lan reg = <0x0 0x3000 0x0 0x18>; 13989d59b708SYixun Lan interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 13999adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; 14009d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 14019d59b708SYixun Lan status = "disabled"; 14029d59b708SYixun Lan }; 14039d59b708SYixun Lan 14049d59b708SYixun Lan uart_AO_B: serial@4000 { 14059d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 14069d59b708SYixun Lan reg = <0x0 0x4000 0x0 0x18>; 14079d59b708SYixun Lan interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 14089adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; 14099d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 14109d59b708SYixun Lan status = "disabled"; 14119d59b708SYixun Lan }; 14127bd46a79SYixun Lan 14137bd46a79SYixun Lan ir: ir@8000 { 14147bd46a79SYixun Lan compatible = "amlogic,meson-gxbb-ir"; 14157bd46a79SYixun Lan reg = <0x0 0x8000 0x0 0x20>; 14167bd46a79SYixun Lan interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 14177bd46a79SYixun Lan status = "disabled"; 14187bd46a79SYixun Lan }; 1419a51b74eaSXingyu Chen 1420a51b74eaSXingyu Chen saradc: adc@9000 { 1421a51b74eaSXingyu Chen compatible = "amlogic,meson-axg-saradc", 1422a51b74eaSXingyu Chen "amlogic,meson-saradc"; 1423a51b74eaSXingyu Chen reg = <0x0 0x9000 0x0 0x38>; 1424a51b74eaSXingyu Chen #io-channel-cells = <1>; 1425a51b74eaSXingyu Chen interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 1426a51b74eaSXingyu Chen clocks = <&xtal>, 1427a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC>, 1428a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_CLK>, 1429a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_SEL>; 1430a51b74eaSXingyu Chen clock-names = "clkin", "core", "adc_clk", "adc_sel"; 1431a51b74eaSXingyu Chen status = "disabled"; 1432a51b74eaSXingyu Chen }; 14339d59b708SYixun Lan }; 14349d59b708SYixun Lan }; 14359d59b708SYixun Lan}; 1436