1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
29d59b708SYixun Lan/*
39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
49d59b708SYixun Lan */
59d59b708SYixun Lan
68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h>
78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h>
806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h>
98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h>
10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h>
118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h>
128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h>
13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
1578a6dcb5SNeil Armstrong#include <dt-bindings/power/meson-axg-power.h>
169d59b708SYixun Lan
179d59b708SYixun Lan/ {
189d59b708SYixun Lan	compatible = "amlogic,meson-axg";
199d59b708SYixun Lan
209d59b708SYixun Lan	interrupt-parent = <&gic>;
219d59b708SYixun Lan	#address-cells = <2>;
229d59b708SYixun Lan	#size-cells = <2>;
239d59b708SYixun Lan
24fbd5cbc5SJerome Brunet	tdmif_a: audio-controller-0 {
258c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
268c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
278c0cf40fSJerome Brunet		sound-name-prefix = "TDM_A";
288c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
298c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
308c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
318c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
328c0cf40fSJerome Brunet		status = "disabled";
339d59b708SYixun Lan	};
349d59b708SYixun Lan
35fbd5cbc5SJerome Brunet	tdmif_b: audio-controller-1 {
368c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
378c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
388c0cf40fSJerome Brunet		sound-name-prefix = "TDM_B";
398c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
408c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
418c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
428c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
438c0cf40fSJerome Brunet		status = "disabled";
449d59b708SYixun Lan	};
458c0cf40fSJerome Brunet
46fbd5cbc5SJerome Brunet	tdmif_c: audio-controller-2 {
478c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
488c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
498c0cf40fSJerome Brunet		sound-name-prefix = "TDM_C";
508c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
518c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
528c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
538c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
548c0cf40fSJerome Brunet		status = "disabled";
558c0cf40fSJerome Brunet	};
568c0cf40fSJerome Brunet
578c0cf40fSJerome Brunet	arm-pmu {
588c0cf40fSJerome Brunet		compatible = "arm,cortex-a53-pmu";
598c0cf40fSJerome Brunet		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
608c0cf40fSJerome Brunet			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
618c0cf40fSJerome Brunet			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
628c0cf40fSJerome Brunet			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
638c0cf40fSJerome Brunet		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
649d59b708SYixun Lan	};
659d59b708SYixun Lan
669d59b708SYixun Lan	cpus {
679d59b708SYixun Lan		#address-cells = <0x2>;
689d59b708SYixun Lan		#size-cells = <0x0>;
699d59b708SYixun Lan
709d59b708SYixun Lan		cpu0: cpu@0 {
719d59b708SYixun Lan			device_type = "cpu";
7231af04cdSRob Herring			compatible = "arm,cortex-a53";
739d59b708SYixun Lan			reg = <0x0 0x0>;
749d59b708SYixun Lan			enable-method = "psci";
759d59b708SYixun Lan			next-level-cache = <&l2>;
762c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
779d59b708SYixun Lan		};
789d59b708SYixun Lan
799d59b708SYixun Lan		cpu1: cpu@1 {
809d59b708SYixun Lan			device_type = "cpu";
8131af04cdSRob Herring			compatible = "arm,cortex-a53";
829d59b708SYixun Lan			reg = <0x0 0x1>;
839d59b708SYixun Lan			enable-method = "psci";
849d59b708SYixun Lan			next-level-cache = <&l2>;
852c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
869d59b708SYixun Lan		};
879d59b708SYixun Lan
889d59b708SYixun Lan		cpu2: cpu@2 {
899d59b708SYixun Lan			device_type = "cpu";
9031af04cdSRob Herring			compatible = "arm,cortex-a53";
919d59b708SYixun Lan			reg = <0x0 0x2>;
929d59b708SYixun Lan			enable-method = "psci";
939d59b708SYixun Lan			next-level-cache = <&l2>;
942c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
959d59b708SYixun Lan		};
969d59b708SYixun Lan
979d59b708SYixun Lan		cpu3: cpu@3 {
989d59b708SYixun Lan			device_type = "cpu";
9931af04cdSRob Herring			compatible = "arm,cortex-a53";
1009d59b708SYixun Lan			reg = <0x0 0x3>;
1019d59b708SYixun Lan			enable-method = "psci";
1029d59b708SYixun Lan			next-level-cache = <&l2>;
1032c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
1049d59b708SYixun Lan		};
1059d59b708SYixun Lan
1069d59b708SYixun Lan		l2: l2-cache0 {
1079d59b708SYixun Lan			compatible = "cache";
1089d59b708SYixun Lan		};
1099d59b708SYixun Lan	};
1109d59b708SYixun Lan
11196dc5702SJerome Brunet	sm: secure-monitor {
11296dc5702SJerome Brunet		compatible = "amlogic,meson-gxbb-sm";
11396dc5702SJerome Brunet	};
11496dc5702SJerome Brunet
1159ab2d15cSJerome Brunet	efuse: efuse {
1169ab2d15cSJerome Brunet		compatible = "amlogic,meson-gxbb-efuse";
1179ab2d15cSJerome Brunet		clocks = <&clkc CLKID_EFUSE>;
1189ab2d15cSJerome Brunet		#address-cells = <1>;
1199ab2d15cSJerome Brunet		#size-cells = <1>;
1209ab2d15cSJerome Brunet		read-only;
121de82e74aSCarlo Caione		secure-monitor = <&sm>;
1229ab2d15cSJerome Brunet	};
1239ab2d15cSJerome Brunet
1249d59b708SYixun Lan	psci {
1259d59b708SYixun Lan		compatible = "arm,psci-1.0";
1269d59b708SYixun Lan		method = "smc";
1279d59b708SYixun Lan	};
1289d59b708SYixun Lan
1298c0cf40fSJerome Brunet	reserved-memory {
1308c0cf40fSJerome Brunet		#address-cells = <2>;
1318c0cf40fSJerome Brunet		#size-cells = <2>;
1328c0cf40fSJerome Brunet		ranges;
1338c0cf40fSJerome Brunet
1348c0cf40fSJerome Brunet		/* 16 MiB reserved for Hardware ROM Firmware */
1358c0cf40fSJerome Brunet		hwrom_reserved: hwrom@0 {
1368c0cf40fSJerome Brunet			reg = <0x0 0x0 0x0 0x1000000>;
1378c0cf40fSJerome Brunet			no-map;
13808307aabSJerome Brunet		};
13908307aabSJerome Brunet
1408c0cf40fSJerome Brunet		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
1418c0cf40fSJerome Brunet		secmon_reserved: secmon@5000000 {
1428c0cf40fSJerome Brunet			reg = <0x0 0x05000000 0x0 0x300000>;
1438c0cf40fSJerome Brunet			no-map;
14408307aabSJerome Brunet		};
1455e395e14SYixun Lan	};
1465e395e14SYixun Lan
1472c130695SJerome Brunet	scpi {
1482c130695SJerome Brunet		compatible = "arm,scpi-pre-1.0";
1492c130695SJerome Brunet		mboxes = <&mailbox 1 &mailbox 2>;
1502c130695SJerome Brunet		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
1512c130695SJerome Brunet
1522c130695SJerome Brunet		scpi_clocks: clocks {
1532c130695SJerome Brunet			compatible = "arm,scpi-clocks";
1542c130695SJerome Brunet
1552c130695SJerome Brunet			scpi_dvfs: clock-controller {
1562c130695SJerome Brunet				compatible = "arm,scpi-dvfs-clocks";
1572c130695SJerome Brunet				#clock-cells = <1>;
1582c130695SJerome Brunet				clock-indices = <0>;
1592c130695SJerome Brunet				clock-output-names = "vcpu";
1602c130695SJerome Brunet			};
1612c130695SJerome Brunet		};
1622c130695SJerome Brunet
1632c130695SJerome Brunet		scpi_sensors: sensors {
1642c130695SJerome Brunet			compatible = "amlogic,meson-gxbb-scpi-sensors";
1652c130695SJerome Brunet			#thermal-sensor-cells = <1>;
1662c130695SJerome Brunet		};
1672c130695SJerome Brunet	};
1682c130695SJerome Brunet
1699d59b708SYixun Lan	soc {
1709d59b708SYixun Lan		compatible = "simple-bus";
1719d59b708SYixun Lan		#address-cells = <2>;
1729d59b708SYixun Lan		#size-cells = <2>;
1739d59b708SYixun Lan		ranges;
1749d59b708SYixun Lan
1755b3a9c20SNeil Armstrong		pcieA: pcie@f9800000 {
1765b3a9c20SNeil Armstrong			compatible = "amlogic,axg-pcie", "snps,dw-pcie";
1775b3a9c20SNeil Armstrong			reg = <0x0 0xf9800000 0x0 0x400000>,
1785b3a9c20SNeil Armstrong			      <0x0 0xff646000 0x0 0x2000>,
1795b3a9c20SNeil Armstrong			      <0x0 0xf9f00000 0x0 0x100000>;
1805b3a9c20SNeil Armstrong			reg-names = "elbi", "cfg", "config";
1815b3a9c20SNeil Armstrong			interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
1825b3a9c20SNeil Armstrong			#interrupt-cells = <1>;
1835b3a9c20SNeil Armstrong			interrupt-map-mask = <0 0 0 0>;
1845b3a9c20SNeil Armstrong			interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
1855b3a9c20SNeil Armstrong			bus-range = <0x0 0xff>;
1865b3a9c20SNeil Armstrong			#address-cells = <3>;
1875b3a9c20SNeil Armstrong			#size-cells = <2>;
1885b3a9c20SNeil Armstrong			device_type = "pci";
1895b3a9c20SNeil Armstrong			ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>;
1905b3a9c20SNeil Armstrong
1915b3a9c20SNeil Armstrong			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
1925b3a9c20SNeil Armstrong			clock-names = "general", "pclk", "port";
1935b3a9c20SNeil Armstrong			resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>;
1945b3a9c20SNeil Armstrong			reset-names = "port", "apb";
1955b3a9c20SNeil Armstrong			num-lanes = <1>;
1965b3a9c20SNeil Armstrong			phys = <&pcie_phy>;
1975b3a9c20SNeil Armstrong			phy-names = "pcie";
1985b3a9c20SNeil Armstrong			status = "disabled";
1995b3a9c20SNeil Armstrong		};
2005b3a9c20SNeil Armstrong
2015b3a9c20SNeil Armstrong		pcieB: pcie@fa000000 {
2025b3a9c20SNeil Armstrong			compatible = "amlogic,axg-pcie", "snps,dw-pcie";
2035b3a9c20SNeil Armstrong			reg = <0x0 0xfa000000 0x0 0x400000>,
2045b3a9c20SNeil Armstrong			      <0x0 0xff648000 0x0 0x2000>,
2055b3a9c20SNeil Armstrong			      <0x0 0xfa400000 0x0 0x100000>;
2065b3a9c20SNeil Armstrong			reg-names = "elbi", "cfg", "config";
2075b3a9c20SNeil Armstrong			interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
2085b3a9c20SNeil Armstrong			#interrupt-cells = <1>;
2095b3a9c20SNeil Armstrong			interrupt-map-mask = <0 0 0 0>;
2105b3a9c20SNeil Armstrong			interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
2115b3a9c20SNeil Armstrong			bus-range = <0x0 0xff>;
2125b3a9c20SNeil Armstrong			#address-cells = <3>;
2135b3a9c20SNeil Armstrong			#size-cells = <2>;
2145b3a9c20SNeil Armstrong			device_type = "pci";
2155b3a9c20SNeil Armstrong			ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>;
2165b3a9c20SNeil Armstrong
2175b3a9c20SNeil Armstrong			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
2185b3a9c20SNeil Armstrong			clock-names = "general", "pclk", "port";
2195b3a9c20SNeil Armstrong			resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>;
2205b3a9c20SNeil Armstrong			reset-names = "port", "apb";
2215b3a9c20SNeil Armstrong			num-lanes = <1>;
2225b3a9c20SNeil Armstrong			phys = <&pcie_phy>;
2235b3a9c20SNeil Armstrong			phy-names = "pcie";
2245b3a9c20SNeil Armstrong			status = "disabled";
2255b3a9c20SNeil Armstrong		};
2265b3a9c20SNeil Armstrong
2271b208babSNeil Armstrong		usb: usb@ffe09080 {
2281b208babSNeil Armstrong			compatible = "amlogic,meson-axg-usb-ctrl";
2291b208babSNeil Armstrong			reg = <0x0 0xffe09080 0x0 0x20>;
2301b208babSNeil Armstrong			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2311b208babSNeil Armstrong			#address-cells = <2>;
2321b208babSNeil Armstrong			#size-cells = <2>;
2331b208babSNeil Armstrong			ranges;
2341b208babSNeil Armstrong
2351b208babSNeil Armstrong			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
2361b208babSNeil Armstrong			clock-names = "usb_ctrl", "ddr";
2371b208babSNeil Armstrong			resets = <&reset RESET_USB_OTG>;
2381b208babSNeil Armstrong
2391b208babSNeil Armstrong			dr_mode = "otg";
2401b208babSNeil Armstrong
2411b208babSNeil Armstrong			phys = <&usb2_phy1>;
2421b208babSNeil Armstrong			phy-names = "usb2-phy1";
2431b208babSNeil Armstrong
2441b208babSNeil Armstrong			dwc2: usb@ff400000 {
2451b208babSNeil Armstrong				compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2461b208babSNeil Armstrong				reg = <0x0 0xff400000 0x0 0x40000>;
2471b208babSNeil Armstrong				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2481b208babSNeil Armstrong				clocks = <&clkc CLKID_USB1>;
2491b208babSNeil Armstrong				clock-names = "otg";
2501b208babSNeil Armstrong				phys = <&usb2_phy1>;
2511b208babSNeil Armstrong				dr_mode = "peripheral";
2521b208babSNeil Armstrong				g-rx-fifo-size = <192>;
2531b208babSNeil Armstrong				g-np-tx-fifo-size = <128>;
2541b208babSNeil Armstrong				g-tx-fifo-size = <128 128 16 16 16>;
2551b208babSNeil Armstrong			};
2561b208babSNeil Armstrong
2571b208babSNeil Armstrong			dwc3: usb@ff500000 {
2581b208babSNeil Armstrong				compatible = "snps,dwc3";
2591b208babSNeil Armstrong				reg = <0x0 0xff500000 0x0 0x100000>;
2601b208babSNeil Armstrong				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2611b208babSNeil Armstrong				dr_mode = "host";
2621b208babSNeil Armstrong				maximum-speed = "high-speed";
2631b208babSNeil Armstrong				snps,dis_u2_susphy_quirk;
2641b208babSNeil Armstrong			};
2651b208babSNeil Armstrong		};
2661b208babSNeil Armstrong
2678c0cf40fSJerome Brunet		ethmac: ethernet@ff3f0000 {
2689d63f5d1SJerome Brunet			compatible = "amlogic,meson-axg-dwmac",
2699d63f5d1SJerome Brunet				     "snps,dwmac-3.70a",
2709d63f5d1SJerome Brunet				     "snps,dwmac";
2713ad6c9e3SNeil Armstrong			reg = <0x0 0xff3f0000 0x0 0x10000>,
2723ad6c9e3SNeil Armstrong			      <0x0 0xff634540 0x0 0x8>;
2738b3e6f89SCarlo Caione			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
2748c0cf40fSJerome Brunet			interrupt-names = "macirq";
2758c0cf40fSJerome Brunet			clocks = <&clkc CLKID_ETH>,
2768c0cf40fSJerome Brunet				 <&clkc CLKID_FCLK_DIV2>,
27732b5f4b6SMartin Blumenstingl				 <&clkc CLKID_MPLL2>,
27832b5f4b6SMartin Blumenstingl				 <&clkc CLKID_FCLK_DIV2>;
27932b5f4b6SMartin Blumenstingl			clock-names = "stmmaceth", "clkin0", "clkin1",
28032b5f4b6SMartin Blumenstingl				      "timing-adjustment";
281ef68984eSJerome Brunet			rx-fifo-depth = <4096>;
282ef68984eSJerome Brunet			tx-fifo-depth = <2048>;
283f3362f0cSAnand Moon			resets = <&reset RESET_ETHERNET>;
284f3362f0cSAnand Moon			reset-names = "stmmaceth";
28578a6dcb5SNeil Armstrong			power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
2868c0cf40fSJerome Brunet			status = "disabled";
2878c0cf40fSJerome Brunet		};
2888c0cf40fSJerome Brunet
2895b3a9c20SNeil Armstrong		pcie_phy: phy@ff644000 {
2905b3a9c20SNeil Armstrong			compatible = "amlogic,axg-pcie-phy";
2915b3a9c20SNeil Armstrong			reg = <0x0 0xff644000 0x0 0x1c>;
2925b3a9c20SNeil Armstrong			resets = <&reset RESET_PCIE_PHY>;
2935b3a9c20SNeil Armstrong			phys = <&mipi_pcie_analog_dphy>;
2945b3a9c20SNeil Armstrong			phy-names = "analog";
2955b3a9c20SNeil Armstrong			#phy-cells = <0>;
2965b3a9c20SNeil Armstrong		};
2975b3a9c20SNeil Armstrong
298c362e4e0SJerome Brunet		pdm: audio-controller@ff632000 {
299c362e4e0SJerome Brunet			compatible = "amlogic,axg-pdm";
300c362e4e0SJerome Brunet			reg = <0x0 0xff632000 0x0 0x34>;
301c362e4e0SJerome Brunet			#sound-dai-cells = <0>;
302c362e4e0SJerome Brunet			sound-name-prefix = "PDM";
303c362e4e0SJerome Brunet			clocks = <&clkc_audio AUD_CLKID_PDM>,
304c362e4e0SJerome Brunet				 <&clkc_audio AUD_CLKID_PDM_DCLK>,
305c362e4e0SJerome Brunet				 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
306c362e4e0SJerome Brunet			clock-names = "pclk", "dclk", "sysclk";
307c362e4e0SJerome Brunet			status = "disabled";
308c362e4e0SJerome Brunet		};
309c362e4e0SJerome Brunet
3108c0cf40fSJerome Brunet		periphs: bus@ff634000 {
311221cf34bSNan Li			compatible = "simple-bus";
3128c0cf40fSJerome Brunet			reg = <0x0 0xff634000 0x0 0x2000>;
313221cf34bSNan Li			#address-cells = <2>;
314221cf34bSNan Li			#size-cells = <2>;
3158c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
316221cf34bSNan Li
3178c0cf40fSJerome Brunet			hwrng: rng@18 {
3188c0cf40fSJerome Brunet				compatible = "amlogic,meson-rng";
3198c0cf40fSJerome Brunet				reg = <0x0 0x18 0x0 0x4>;
3208c0cf40fSJerome Brunet				clocks = <&clkc CLKID_RNG0>;
3218c0cf40fSJerome Brunet				clock-names = "core";
322221cf34bSNan Li			};
323221cf34bSNan Li
3248c0cf40fSJerome Brunet			pinctrl_periphs: pinctrl@480 {
3258c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-periphs-pinctrl";
3268c0cf40fSJerome Brunet				#address-cells = <2>;
3278c0cf40fSJerome Brunet				#size-cells = <2>;
3288c0cf40fSJerome Brunet				ranges;
3298c0cf40fSJerome Brunet
3308c0cf40fSJerome Brunet				gpio: bank@480 {
3318c0cf40fSJerome Brunet					reg = <0x0 0x00480 0x0 0x40>,
3328c0cf40fSJerome Brunet					      <0x0 0x004e8 0x0 0x14>,
3338c0cf40fSJerome Brunet					      <0x0 0x00520 0x0 0x14>,
3348c0cf40fSJerome Brunet					      <0x0 0x00430 0x0 0x3c>;
3358c0cf40fSJerome Brunet					reg-names = "mux", "pull", "pull-enable", "gpio";
3368c0cf40fSJerome Brunet					gpio-controller;
3378c0cf40fSJerome Brunet					#gpio-cells = <2>;
3388c0cf40fSJerome Brunet					gpio-ranges = <&pinctrl_periphs 0 0 86>;
339221cf34bSNan Li				};
3408c0cf40fSJerome Brunet
3418c0cf40fSJerome Brunet				i2c0_pins: i2c0 {
3428c0cf40fSJerome Brunet					mux {
3438c0cf40fSJerome Brunet						groups = "i2c0_sck",
3448c0cf40fSJerome Brunet							 "i2c0_sda";
3458c0cf40fSJerome Brunet						function = "i2c0";
3461c5cc1c8SJerome Brunet						bias-disable;
3478c0cf40fSJerome Brunet					};
3488c0cf40fSJerome Brunet				};
3498c0cf40fSJerome Brunet
3508c0cf40fSJerome Brunet				i2c1_x_pins: i2c1_x {
3518c0cf40fSJerome Brunet					mux {
3528c0cf40fSJerome Brunet						groups = "i2c1_sck_x",
3538c0cf40fSJerome Brunet							 "i2c1_sda_x";
3548c0cf40fSJerome Brunet						function = "i2c1";
3551c5cc1c8SJerome Brunet						bias-disable;
3568c0cf40fSJerome Brunet					};
3578c0cf40fSJerome Brunet				};
3588c0cf40fSJerome Brunet
3598c0cf40fSJerome Brunet				i2c1_z_pins: i2c1_z {
3608c0cf40fSJerome Brunet					mux {
3618c0cf40fSJerome Brunet						groups = "i2c1_sck_z",
3628c0cf40fSJerome Brunet							 "i2c1_sda_z";
3638c0cf40fSJerome Brunet						function = "i2c1";
3641c5cc1c8SJerome Brunet						bias-disable;
3658c0cf40fSJerome Brunet					};
3668c0cf40fSJerome Brunet				};
3678c0cf40fSJerome Brunet
3688c0cf40fSJerome Brunet				i2c2_a_pins: i2c2_a {
3698c0cf40fSJerome Brunet					mux {
3708c0cf40fSJerome Brunet						groups = "i2c2_sck_a",
3718c0cf40fSJerome Brunet							 "i2c2_sda_a";
3728c0cf40fSJerome Brunet						function = "i2c2";
3731c5cc1c8SJerome Brunet						bias-disable;
3748c0cf40fSJerome Brunet					};
3758c0cf40fSJerome Brunet				};
3768c0cf40fSJerome Brunet
3778c0cf40fSJerome Brunet				i2c2_x_pins: i2c2_x {
3788c0cf40fSJerome Brunet					mux {
3798c0cf40fSJerome Brunet						groups = "i2c2_sck_x",
3808c0cf40fSJerome Brunet							 "i2c2_sda_x";
3818c0cf40fSJerome Brunet						function = "i2c2";
3821c5cc1c8SJerome Brunet						bias-disable;
3838c0cf40fSJerome Brunet					};
3848c0cf40fSJerome Brunet				};
3858c0cf40fSJerome Brunet
3868c0cf40fSJerome Brunet				i2c3_a6_pins: i2c3_a6 {
3878c0cf40fSJerome Brunet					mux {
3888c0cf40fSJerome Brunet						groups = "i2c3_sda_a6",
3898c0cf40fSJerome Brunet							 "i2c3_sck_a7";
3908c0cf40fSJerome Brunet						function = "i2c3";
3911c5cc1c8SJerome Brunet						bias-disable;
3928c0cf40fSJerome Brunet					};
3938c0cf40fSJerome Brunet				};
3948c0cf40fSJerome Brunet
3958c0cf40fSJerome Brunet				i2c3_a12_pins: i2c3_a12 {
3968c0cf40fSJerome Brunet					mux {
3978c0cf40fSJerome Brunet						groups = "i2c3_sda_a12",
3988c0cf40fSJerome Brunet							 "i2c3_sck_a13";
3998c0cf40fSJerome Brunet						function = "i2c3";
4001c5cc1c8SJerome Brunet						bias-disable;
4018c0cf40fSJerome Brunet					};
4028c0cf40fSJerome Brunet				};
4038c0cf40fSJerome Brunet
4048c0cf40fSJerome Brunet				i2c3_a19_pins: i2c3_a19 {
4058c0cf40fSJerome Brunet					mux {
4068c0cf40fSJerome Brunet						groups = "i2c3_sda_a19",
4078c0cf40fSJerome Brunet							 "i2c3_sck_a20";
4088c0cf40fSJerome Brunet						function = "i2c3";
4091c5cc1c8SJerome Brunet						bias-disable;
4108c0cf40fSJerome Brunet					};
4118c0cf40fSJerome Brunet				};
4128c0cf40fSJerome Brunet
4138c0cf40fSJerome Brunet				emmc_pins: emmc {
414b43033b1SJerome Brunet					mux-0 {
4158c0cf40fSJerome Brunet						groups = "emmc_nand_d0",
4168c0cf40fSJerome Brunet							 "emmc_nand_d1",
4178c0cf40fSJerome Brunet							 "emmc_nand_d2",
4188c0cf40fSJerome Brunet							 "emmc_nand_d3",
4198c0cf40fSJerome Brunet							 "emmc_nand_d4",
4208c0cf40fSJerome Brunet							 "emmc_nand_d5",
4218c0cf40fSJerome Brunet							 "emmc_nand_d6",
4228c0cf40fSJerome Brunet							 "emmc_nand_d7",
423b43033b1SJerome Brunet							 "emmc_cmd";
424b43033b1SJerome Brunet						function = "emmc";
425b43033b1SJerome Brunet						bias-pull-up;
426b43033b1SJerome Brunet					};
427b43033b1SJerome Brunet
428b43033b1SJerome Brunet					mux-1 {
429b43033b1SJerome Brunet						groups = "emmc_clk";
4308c0cf40fSJerome Brunet						function = "emmc";
43196a13691SJerome Brunet						bias-disable;
4328c0cf40fSJerome Brunet					};
4338c0cf40fSJerome Brunet				};
4348c0cf40fSJerome Brunet
435b43033b1SJerome Brunet				emmc_ds_pins: emmc_ds {
436b43033b1SJerome Brunet					mux {
437b43033b1SJerome Brunet						groups = "emmc_ds";
438b43033b1SJerome Brunet						function = "emmc";
439b43033b1SJerome Brunet						bias-pull-down;
440b43033b1SJerome Brunet					};
441b43033b1SJerome Brunet				};
442b43033b1SJerome Brunet
4438c0cf40fSJerome Brunet				emmc_clk_gate_pins: emmc_clk_gate {
4448c0cf40fSJerome Brunet					mux {
4458c0cf40fSJerome Brunet						groups = "BOOT_8";
4468c0cf40fSJerome Brunet						function = "gpio_periphs";
4478c0cf40fSJerome Brunet						bias-pull-down;
4488c0cf40fSJerome Brunet					};
4498c0cf40fSJerome Brunet				};
4508c0cf40fSJerome Brunet
4518c0cf40fSJerome Brunet				eth_rgmii_x_pins: eth-x-rgmii {
4528c0cf40fSJerome Brunet					mux {
4538c0cf40fSJerome Brunet						groups = "eth_mdio_x",
4548c0cf40fSJerome Brunet							 "eth_mdc_x",
4558c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_x",
4568c0cf40fSJerome Brunet							 "eth_rx_dv_x",
4578c0cf40fSJerome Brunet							 "eth_rxd0_x",
4588c0cf40fSJerome Brunet							 "eth_rxd1_x",
4598c0cf40fSJerome Brunet							 "eth_rxd2_rgmii",
4608c0cf40fSJerome Brunet							 "eth_rxd3_rgmii",
4618c0cf40fSJerome Brunet							 "eth_rgmii_tx_clk",
4628c0cf40fSJerome Brunet							 "eth_txen_x",
4638c0cf40fSJerome Brunet							 "eth_txd0_x",
4648c0cf40fSJerome Brunet							 "eth_txd1_x",
4658c0cf40fSJerome Brunet							 "eth_txd2_rgmii",
4668c0cf40fSJerome Brunet							 "eth_txd3_rgmii";
4678c0cf40fSJerome Brunet						function = "eth";
4681c5cc1c8SJerome Brunet						bias-disable;
4698c0cf40fSJerome Brunet					};
4708c0cf40fSJerome Brunet				};
4718c0cf40fSJerome Brunet
4728c0cf40fSJerome Brunet				eth_rgmii_y_pins: eth-y-rgmii {
4738c0cf40fSJerome Brunet					mux {
4748c0cf40fSJerome Brunet						groups = "eth_mdio_y",
4758c0cf40fSJerome Brunet							 "eth_mdc_y",
4768c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_y",
4778c0cf40fSJerome Brunet							 "eth_rx_dv_y",
4788c0cf40fSJerome Brunet							 "eth_rxd0_y",
4798c0cf40fSJerome Brunet							 "eth_rxd1_y",
4808c0cf40fSJerome Brunet							 "eth_rxd2_rgmii",
4818c0cf40fSJerome Brunet							 "eth_rxd3_rgmii",
4828c0cf40fSJerome Brunet							 "eth_rgmii_tx_clk",
4838c0cf40fSJerome Brunet							 "eth_txen_y",
4848c0cf40fSJerome Brunet							 "eth_txd0_y",
4858c0cf40fSJerome Brunet							 "eth_txd1_y",
4868c0cf40fSJerome Brunet							 "eth_txd2_rgmii",
4878c0cf40fSJerome Brunet							 "eth_txd3_rgmii";
4888c0cf40fSJerome Brunet						function = "eth";
4891c5cc1c8SJerome Brunet						bias-disable;
4908c0cf40fSJerome Brunet					};
4918c0cf40fSJerome Brunet				};
4928c0cf40fSJerome Brunet
4938c0cf40fSJerome Brunet				eth_rmii_x_pins: eth-x-rmii {
4948c0cf40fSJerome Brunet					mux {
4958c0cf40fSJerome Brunet						groups = "eth_mdio_x",
4968c0cf40fSJerome Brunet							 "eth_mdc_x",
4978c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_x",
4988c0cf40fSJerome Brunet							 "eth_rx_dv_x",
4998c0cf40fSJerome Brunet							 "eth_rxd0_x",
5008c0cf40fSJerome Brunet							 "eth_rxd1_x",
5018c0cf40fSJerome Brunet							 "eth_txen_x",
5028c0cf40fSJerome Brunet							 "eth_txd0_x",
5038c0cf40fSJerome Brunet							 "eth_txd1_x";
5048c0cf40fSJerome Brunet						function = "eth";
5051c5cc1c8SJerome Brunet						bias-disable;
5068c0cf40fSJerome Brunet					};
5078c0cf40fSJerome Brunet				};
5088c0cf40fSJerome Brunet
5098c0cf40fSJerome Brunet				eth_rmii_y_pins: eth-y-rmii {
5108c0cf40fSJerome Brunet					mux {
5118c0cf40fSJerome Brunet						groups = "eth_mdio_y",
5128c0cf40fSJerome Brunet							 "eth_mdc_y",
5138c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_y",
5148c0cf40fSJerome Brunet							 "eth_rx_dv_y",
5158c0cf40fSJerome Brunet							 "eth_rxd0_y",
5168c0cf40fSJerome Brunet							 "eth_rxd1_y",
5178c0cf40fSJerome Brunet							 "eth_txen_y",
5188c0cf40fSJerome Brunet							 "eth_txd0_y",
5198c0cf40fSJerome Brunet							 "eth_txd1_y";
5208c0cf40fSJerome Brunet						function = "eth";
5211c5cc1c8SJerome Brunet						bias-disable;
5228c0cf40fSJerome Brunet					};
5238c0cf40fSJerome Brunet				};
5248c0cf40fSJerome Brunet
5258c0cf40fSJerome Brunet				mclk_b_pins: mclk_b {
5268c0cf40fSJerome Brunet					mux {
5278c0cf40fSJerome Brunet						groups = "mclk_b";
5288c0cf40fSJerome Brunet						function = "mclk_b";
5291c5cc1c8SJerome Brunet						bias-disable;
5308c0cf40fSJerome Brunet					};
5318c0cf40fSJerome Brunet				};
5328c0cf40fSJerome Brunet
5338c0cf40fSJerome Brunet				mclk_c_pins: mclk_c {
5348c0cf40fSJerome Brunet					mux {
5358c0cf40fSJerome Brunet						groups = "mclk_c";
5368c0cf40fSJerome Brunet						function = "mclk_c";
5371c5cc1c8SJerome Brunet						bias-disable;
5388c0cf40fSJerome Brunet					};
5398c0cf40fSJerome Brunet				};
5408c0cf40fSJerome Brunet
5418c0cf40fSJerome Brunet				pdm_dclk_a14_pins: pdm_dclk_a14 {
5428c0cf40fSJerome Brunet					mux {
5438c0cf40fSJerome Brunet						groups = "pdm_dclk_a14";
5448c0cf40fSJerome Brunet						function = "pdm";
5451c5cc1c8SJerome Brunet						bias-disable;
5468c0cf40fSJerome Brunet					};
5478c0cf40fSJerome Brunet				};
5488c0cf40fSJerome Brunet
5498c0cf40fSJerome Brunet				pdm_dclk_a19_pins: pdm_dclk_a19 {
5508c0cf40fSJerome Brunet					mux {
5518c0cf40fSJerome Brunet						groups = "pdm_dclk_a19";
5528c0cf40fSJerome Brunet						function = "pdm";
5531c5cc1c8SJerome Brunet						bias-disable;
5548c0cf40fSJerome Brunet					};
5558c0cf40fSJerome Brunet				};
5568c0cf40fSJerome Brunet
5578c0cf40fSJerome Brunet				pdm_din0_pins: pdm_din0 {
5588c0cf40fSJerome Brunet					mux {
5598c0cf40fSJerome Brunet						groups = "pdm_din0";
5608c0cf40fSJerome Brunet						function = "pdm";
5611c5cc1c8SJerome Brunet						bias-disable;
5628c0cf40fSJerome Brunet					};
5638c0cf40fSJerome Brunet				};
5648c0cf40fSJerome Brunet
5658c0cf40fSJerome Brunet				pdm_din1_pins: pdm_din1 {
5668c0cf40fSJerome Brunet					mux {
5678c0cf40fSJerome Brunet						groups = "pdm_din1";
5688c0cf40fSJerome Brunet						function = "pdm";
5691c5cc1c8SJerome Brunet						bias-disable;
5708c0cf40fSJerome Brunet					};
5718c0cf40fSJerome Brunet				};
5728c0cf40fSJerome Brunet
5738c0cf40fSJerome Brunet				pdm_din2_pins: pdm_din2 {
5748c0cf40fSJerome Brunet					mux {
5758c0cf40fSJerome Brunet						groups = "pdm_din2";
5768c0cf40fSJerome Brunet						function = "pdm";
5771c5cc1c8SJerome Brunet						bias-disable;
5788c0cf40fSJerome Brunet					};
5798c0cf40fSJerome Brunet				};
5808c0cf40fSJerome Brunet
5818c0cf40fSJerome Brunet				pdm_din3_pins: pdm_din3 {
5828c0cf40fSJerome Brunet					mux {
5838c0cf40fSJerome Brunet						groups = "pdm_din3";
5848c0cf40fSJerome Brunet						function = "pdm";
5851c5cc1c8SJerome Brunet						bias-disable;
5868c0cf40fSJerome Brunet					};
5878c0cf40fSJerome Brunet				};
5888c0cf40fSJerome Brunet
5898c0cf40fSJerome Brunet				pwm_a_a_pins: pwm_a_a {
5908c0cf40fSJerome Brunet					mux {
5918c0cf40fSJerome Brunet						groups = "pwm_a_a";
5928c0cf40fSJerome Brunet						function = "pwm_a";
5931c5cc1c8SJerome Brunet						bias-disable;
5948c0cf40fSJerome Brunet					};
5958c0cf40fSJerome Brunet				};
5968c0cf40fSJerome Brunet
5978c0cf40fSJerome Brunet				pwm_a_x18_pins: pwm_a_x18 {
5988c0cf40fSJerome Brunet					mux {
5998c0cf40fSJerome Brunet						groups = "pwm_a_x18";
6008c0cf40fSJerome Brunet						function = "pwm_a";
6011c5cc1c8SJerome Brunet						bias-disable;
6028c0cf40fSJerome Brunet					};
6038c0cf40fSJerome Brunet				};
6048c0cf40fSJerome Brunet
6058c0cf40fSJerome Brunet				pwm_a_x20_pins: pwm_a_x20 {
6068c0cf40fSJerome Brunet					mux {
6078c0cf40fSJerome Brunet						groups = "pwm_a_x20";
6088c0cf40fSJerome Brunet						function = "pwm_a";
6091c5cc1c8SJerome Brunet						bias-disable;
6108c0cf40fSJerome Brunet					};
6118c0cf40fSJerome Brunet				};
6128c0cf40fSJerome Brunet
6138c0cf40fSJerome Brunet				pwm_a_z_pins: pwm_a_z {
6148c0cf40fSJerome Brunet					mux {
6158c0cf40fSJerome Brunet						groups = "pwm_a_z";
6168c0cf40fSJerome Brunet						function = "pwm_a";
6171c5cc1c8SJerome Brunet						bias-disable;
6188c0cf40fSJerome Brunet					};
6198c0cf40fSJerome Brunet				};
6208c0cf40fSJerome Brunet
6218c0cf40fSJerome Brunet				pwm_b_a_pins: pwm_b_a {
6228c0cf40fSJerome Brunet					mux {
6238c0cf40fSJerome Brunet						groups = "pwm_b_a";
6248c0cf40fSJerome Brunet						function = "pwm_b";
6251c5cc1c8SJerome Brunet						bias-disable;
6268c0cf40fSJerome Brunet					};
6278c0cf40fSJerome Brunet				};
6288c0cf40fSJerome Brunet
6298c0cf40fSJerome Brunet				pwm_b_x_pins: pwm_b_x {
6308c0cf40fSJerome Brunet					mux {
6318c0cf40fSJerome Brunet						groups = "pwm_b_x";
6328c0cf40fSJerome Brunet						function = "pwm_b";
6331c5cc1c8SJerome Brunet						bias-disable;
6348c0cf40fSJerome Brunet					};
6358c0cf40fSJerome Brunet				};
6368c0cf40fSJerome Brunet
6378c0cf40fSJerome Brunet				pwm_b_z_pins: pwm_b_z {
6388c0cf40fSJerome Brunet					mux {
6398c0cf40fSJerome Brunet						groups = "pwm_b_z";
6408c0cf40fSJerome Brunet						function = "pwm_b";
6411c5cc1c8SJerome Brunet						bias-disable;
6428c0cf40fSJerome Brunet					};
6438c0cf40fSJerome Brunet				};
6448c0cf40fSJerome Brunet
6458c0cf40fSJerome Brunet				pwm_c_a_pins: pwm_c_a {
6468c0cf40fSJerome Brunet					mux {
6478c0cf40fSJerome Brunet						groups = "pwm_c_a";
6488c0cf40fSJerome Brunet						function = "pwm_c";
6491c5cc1c8SJerome Brunet						bias-disable;
6508c0cf40fSJerome Brunet					};
6518c0cf40fSJerome Brunet				};
6528c0cf40fSJerome Brunet
6538c0cf40fSJerome Brunet				pwm_c_x10_pins: pwm_c_x10 {
6548c0cf40fSJerome Brunet					mux {
6558c0cf40fSJerome Brunet						groups = "pwm_c_x10";
6568c0cf40fSJerome Brunet						function = "pwm_c";
6571c5cc1c8SJerome Brunet						bias-disable;
6588c0cf40fSJerome Brunet					};
6598c0cf40fSJerome Brunet				};
6608c0cf40fSJerome Brunet
6618c0cf40fSJerome Brunet				pwm_c_x17_pins: pwm_c_x17 {
6628c0cf40fSJerome Brunet					mux {
6638c0cf40fSJerome Brunet						groups = "pwm_c_x17";
6648c0cf40fSJerome Brunet						function = "pwm_c";
6651c5cc1c8SJerome Brunet						bias-disable;
6668c0cf40fSJerome Brunet					};
6678c0cf40fSJerome Brunet				};
6688c0cf40fSJerome Brunet
6698c0cf40fSJerome Brunet				pwm_d_x11_pins: pwm_d_x11 {
6708c0cf40fSJerome Brunet					mux {
6718c0cf40fSJerome Brunet						groups = "pwm_d_x11";
6728c0cf40fSJerome Brunet						function = "pwm_d";
6731c5cc1c8SJerome Brunet						bias-disable;
6748c0cf40fSJerome Brunet					};
6758c0cf40fSJerome Brunet				};
6768c0cf40fSJerome Brunet
6778c0cf40fSJerome Brunet				pwm_d_x16_pins: pwm_d_x16 {
6788c0cf40fSJerome Brunet					mux {
6798c0cf40fSJerome Brunet						groups = "pwm_d_x16";
6808c0cf40fSJerome Brunet						function = "pwm_d";
6811c5cc1c8SJerome Brunet						bias-disable;
6828c0cf40fSJerome Brunet					};
6838c0cf40fSJerome Brunet				};
6848c0cf40fSJerome Brunet
6858c0cf40fSJerome Brunet				sdio_pins: sdio {
686b43033b1SJerome Brunet					mux-0 {
6878c0cf40fSJerome Brunet						groups = "sdio_d0",
6888c0cf40fSJerome Brunet							 "sdio_d1",
6898c0cf40fSJerome Brunet							 "sdio_d2",
6908c0cf40fSJerome Brunet							 "sdio_d3",
691b43033b1SJerome Brunet							 "sdio_cmd";
692b43033b1SJerome Brunet						function = "sdio";
693b43033b1SJerome Brunet						bias-pull-up;
694b43033b1SJerome Brunet					};
695b43033b1SJerome Brunet
696b43033b1SJerome Brunet					mux-1 {
697b43033b1SJerome Brunet						groups = "sdio_clk";
6988c0cf40fSJerome Brunet						function = "sdio";
69996a13691SJerome Brunet						bias-disable;
7008c0cf40fSJerome Brunet					};
7018c0cf40fSJerome Brunet				};
7028c0cf40fSJerome Brunet
7038c0cf40fSJerome Brunet				sdio_clk_gate_pins: sdio_clk_gate {
7048c0cf40fSJerome Brunet					mux {
7058c0cf40fSJerome Brunet						groups = "GPIOX_4";
7068c0cf40fSJerome Brunet						function = "gpio_periphs";
7078c0cf40fSJerome Brunet						bias-pull-down;
7088c0cf40fSJerome Brunet					};
7098c0cf40fSJerome Brunet				};
7108c0cf40fSJerome Brunet
7118c0cf40fSJerome Brunet				spdif_in_z_pins: spdif_in_z {
7128c0cf40fSJerome Brunet					mux {
7138c0cf40fSJerome Brunet						groups = "spdif_in_z";
7148c0cf40fSJerome Brunet						function = "spdif_in";
7151c5cc1c8SJerome Brunet						bias-disable;
7168c0cf40fSJerome Brunet					};
7178c0cf40fSJerome Brunet				};
7188c0cf40fSJerome Brunet
7198c0cf40fSJerome Brunet				spdif_in_a1_pins: spdif_in_a1 {
7208c0cf40fSJerome Brunet					mux {
7218c0cf40fSJerome Brunet						groups = "spdif_in_a1";
7228c0cf40fSJerome Brunet						function = "spdif_in";
7231c5cc1c8SJerome Brunet						bias-disable;
7248c0cf40fSJerome Brunet					};
7258c0cf40fSJerome Brunet				};
7268c0cf40fSJerome Brunet
7278c0cf40fSJerome Brunet				spdif_in_a7_pins: spdif_in_a7 {
7288c0cf40fSJerome Brunet					mux {
7298c0cf40fSJerome Brunet						groups = "spdif_in_a7";
7308c0cf40fSJerome Brunet						function = "spdif_in";
7311c5cc1c8SJerome Brunet						bias-disable;
7328c0cf40fSJerome Brunet					};
7338c0cf40fSJerome Brunet				};
7348c0cf40fSJerome Brunet
7358c0cf40fSJerome Brunet				spdif_in_a19_pins: spdif_in_a19 {
7368c0cf40fSJerome Brunet					mux {
7378c0cf40fSJerome Brunet						groups = "spdif_in_a19";
7388c0cf40fSJerome Brunet						function = "spdif_in";
7391c5cc1c8SJerome Brunet						bias-disable;
7408c0cf40fSJerome Brunet					};
7418c0cf40fSJerome Brunet				};
7428c0cf40fSJerome Brunet
7438c0cf40fSJerome Brunet				spdif_in_a20_pins: spdif_in_a20 {
7448c0cf40fSJerome Brunet					mux {
7458c0cf40fSJerome Brunet						groups = "spdif_in_a20";
7468c0cf40fSJerome Brunet						function = "spdif_in";
7471c5cc1c8SJerome Brunet						bias-disable;
7488c0cf40fSJerome Brunet					};
7498c0cf40fSJerome Brunet				};
7508c0cf40fSJerome Brunet
7518c0cf40fSJerome Brunet				spdif_out_a1_pins: spdif_out_a1 {
7528c0cf40fSJerome Brunet					mux {
7538c0cf40fSJerome Brunet						groups = "spdif_out_a1";
7548c0cf40fSJerome Brunet						function = "spdif_out";
7551c5cc1c8SJerome Brunet						bias-disable;
7568c0cf40fSJerome Brunet					};
7578c0cf40fSJerome Brunet				};
7588c0cf40fSJerome Brunet
7598c0cf40fSJerome Brunet				spdif_out_a11_pins: spdif_out_a11 {
7608c0cf40fSJerome Brunet					mux {
7618c0cf40fSJerome Brunet						groups = "spdif_out_a11";
7628c0cf40fSJerome Brunet						function = "spdif_out";
7631c5cc1c8SJerome Brunet						bias-disable;
7648c0cf40fSJerome Brunet					};
7658c0cf40fSJerome Brunet				};
7668c0cf40fSJerome Brunet
7678c0cf40fSJerome Brunet				spdif_out_a19_pins: spdif_out_a19 {
7688c0cf40fSJerome Brunet					mux {
7698c0cf40fSJerome Brunet						groups = "spdif_out_a19";
7708c0cf40fSJerome Brunet						function = "spdif_out";
7711c5cc1c8SJerome Brunet						bias-disable;
7728c0cf40fSJerome Brunet					};
7738c0cf40fSJerome Brunet				};
7748c0cf40fSJerome Brunet
7758c0cf40fSJerome Brunet				spdif_out_a20_pins: spdif_out_a20 {
7768c0cf40fSJerome Brunet					mux {
7778c0cf40fSJerome Brunet						groups = "spdif_out_a20";
7788c0cf40fSJerome Brunet						function = "spdif_out";
7791c5cc1c8SJerome Brunet						bias-disable;
7808c0cf40fSJerome Brunet					};
7818c0cf40fSJerome Brunet				};
7828c0cf40fSJerome Brunet
7838c0cf40fSJerome Brunet				spdif_out_z_pins: spdif_out_z {
7848c0cf40fSJerome Brunet					mux {
7858c0cf40fSJerome Brunet						groups = "spdif_out_z";
7868c0cf40fSJerome Brunet						function = "spdif_out";
7871c5cc1c8SJerome Brunet						bias-disable;
7888c0cf40fSJerome Brunet					};
7898c0cf40fSJerome Brunet				};
7908c0cf40fSJerome Brunet
7918c0cf40fSJerome Brunet				spi0_pins: spi0 {
7928c0cf40fSJerome Brunet					mux {
7938c0cf40fSJerome Brunet						groups = "spi0_miso",
7948c0cf40fSJerome Brunet							 "spi0_mosi",
7958c0cf40fSJerome Brunet							 "spi0_clk";
7968c0cf40fSJerome Brunet						function = "spi0";
7971c5cc1c8SJerome Brunet						bias-disable;
7988c0cf40fSJerome Brunet					};
7998c0cf40fSJerome Brunet				};
8008c0cf40fSJerome Brunet
8018c0cf40fSJerome Brunet				spi0_ss0_pins: spi0_ss0 {
8028c0cf40fSJerome Brunet					mux {
8038c0cf40fSJerome Brunet						groups = "spi0_ss0";
8048c0cf40fSJerome Brunet						function = "spi0";
8051c5cc1c8SJerome Brunet						bias-disable;
8068c0cf40fSJerome Brunet					};
8078c0cf40fSJerome Brunet				};
8088c0cf40fSJerome Brunet
8098c0cf40fSJerome Brunet				spi0_ss1_pins: spi0_ss1 {
8108c0cf40fSJerome Brunet					mux {
8118c0cf40fSJerome Brunet						groups = "spi0_ss1";
8128c0cf40fSJerome Brunet						function = "spi0";
8131c5cc1c8SJerome Brunet						bias-disable;
8148c0cf40fSJerome Brunet					};
8158c0cf40fSJerome Brunet				};
8168c0cf40fSJerome Brunet
8178c0cf40fSJerome Brunet				spi0_ss2_pins: spi0_ss2 {
8188c0cf40fSJerome Brunet					mux {
8198c0cf40fSJerome Brunet						groups = "spi0_ss2";
8208c0cf40fSJerome Brunet						function = "spi0";
8211c5cc1c8SJerome Brunet						bias-disable;
8228c0cf40fSJerome Brunet					};
8238c0cf40fSJerome Brunet				};
8248c0cf40fSJerome Brunet
8258c0cf40fSJerome Brunet				spi1_a_pins: spi1_a {
8268c0cf40fSJerome Brunet					mux {
8278c0cf40fSJerome Brunet						groups = "spi1_miso_a",
8288c0cf40fSJerome Brunet							 "spi1_mosi_a",
8298c0cf40fSJerome Brunet							 "spi1_clk_a";
8308c0cf40fSJerome Brunet						function = "spi1";
8311c5cc1c8SJerome Brunet						bias-disable;
8328c0cf40fSJerome Brunet					};
8338c0cf40fSJerome Brunet				};
8348c0cf40fSJerome Brunet
8358c0cf40fSJerome Brunet				spi1_ss0_a_pins: spi1_ss0_a {
8368c0cf40fSJerome Brunet					mux {
8378c0cf40fSJerome Brunet						groups = "spi1_ss0_a";
8388c0cf40fSJerome Brunet						function = "spi1";
8391c5cc1c8SJerome Brunet						bias-disable;
8408c0cf40fSJerome Brunet					};
8418c0cf40fSJerome Brunet				};
8428c0cf40fSJerome Brunet
8438c0cf40fSJerome Brunet				spi1_ss1_pins: spi1_ss1 {
8448c0cf40fSJerome Brunet					mux {
8458c0cf40fSJerome Brunet						groups = "spi1_ss1";
8468c0cf40fSJerome Brunet						function = "spi1";
8471c5cc1c8SJerome Brunet						bias-disable;
8488c0cf40fSJerome Brunet					};
8498c0cf40fSJerome Brunet				};
8508c0cf40fSJerome Brunet
8518c0cf40fSJerome Brunet				spi1_x_pins: spi1_x {
8528c0cf40fSJerome Brunet					mux {
8538c0cf40fSJerome Brunet						groups = "spi1_miso_x",
8548c0cf40fSJerome Brunet							 "spi1_mosi_x",
8558c0cf40fSJerome Brunet							 "spi1_clk_x";
8568c0cf40fSJerome Brunet						function = "spi1";
8571c5cc1c8SJerome Brunet						bias-disable;
8588c0cf40fSJerome Brunet					};
8598c0cf40fSJerome Brunet				};
8608c0cf40fSJerome Brunet
8618c0cf40fSJerome Brunet				spi1_ss0_x_pins: spi1_ss0_x {
8628c0cf40fSJerome Brunet					mux {
8638c0cf40fSJerome Brunet						groups = "spi1_ss0_x";
8648c0cf40fSJerome Brunet						function = "spi1";
8651c5cc1c8SJerome Brunet						bias-disable;
8668c0cf40fSJerome Brunet					};
8678c0cf40fSJerome Brunet				};
8688c0cf40fSJerome Brunet
8698c0cf40fSJerome Brunet				tdma_din0_pins: tdma_din0 {
8708c0cf40fSJerome Brunet					mux {
8718c0cf40fSJerome Brunet						groups = "tdma_din0";
8728c0cf40fSJerome Brunet						function = "tdma";
8731c5cc1c8SJerome Brunet						bias-disable;
8748c0cf40fSJerome Brunet					};
8758c0cf40fSJerome Brunet				};
8768c0cf40fSJerome Brunet
8778c0cf40fSJerome Brunet				tdma_dout0_x14_pins: tdma_dout0_x14 {
8788c0cf40fSJerome Brunet					mux {
8798c0cf40fSJerome Brunet						groups = "tdma_dout0_x14";
8808c0cf40fSJerome Brunet						function = "tdma";
8811c5cc1c8SJerome Brunet						bias-disable;
8828c0cf40fSJerome Brunet					};
8838c0cf40fSJerome Brunet				};
8848c0cf40fSJerome Brunet
8858c0cf40fSJerome Brunet				tdma_dout0_x15_pins: tdma_dout0_x15 {
8868c0cf40fSJerome Brunet					mux {
8878c0cf40fSJerome Brunet						groups = "tdma_dout0_x15";
8888c0cf40fSJerome Brunet						function = "tdma";
8891c5cc1c8SJerome Brunet						bias-disable;
8908c0cf40fSJerome Brunet					};
8918c0cf40fSJerome Brunet				};
8928c0cf40fSJerome Brunet
8938c0cf40fSJerome Brunet				tdma_dout1_pins: tdma_dout1 {
8948c0cf40fSJerome Brunet					mux {
8958c0cf40fSJerome Brunet						groups = "tdma_dout1";
8968c0cf40fSJerome Brunet						function = "tdma";
8971c5cc1c8SJerome Brunet						bias-disable;
8988c0cf40fSJerome Brunet					};
8998c0cf40fSJerome Brunet				};
9008c0cf40fSJerome Brunet
9018c0cf40fSJerome Brunet				tdma_din1_pins: tdma_din1 {
9028c0cf40fSJerome Brunet					mux {
9038c0cf40fSJerome Brunet						groups = "tdma_din1";
9048c0cf40fSJerome Brunet						function = "tdma";
9051c5cc1c8SJerome Brunet						bias-disable;
9068c0cf40fSJerome Brunet					};
9078c0cf40fSJerome Brunet				};
9088c0cf40fSJerome Brunet
9098c0cf40fSJerome Brunet				tdma_fs_pins: tdma_fs {
9108c0cf40fSJerome Brunet					mux {
9118c0cf40fSJerome Brunet						groups = "tdma_fs";
9128c0cf40fSJerome Brunet						function = "tdma";
9131c5cc1c8SJerome Brunet						bias-disable;
9148c0cf40fSJerome Brunet					};
9158c0cf40fSJerome Brunet				};
9168c0cf40fSJerome Brunet
9178c0cf40fSJerome Brunet				tdma_fs_slv_pins: tdma_fs_slv {
9188c0cf40fSJerome Brunet					mux {
9198c0cf40fSJerome Brunet						groups = "tdma_fs_slv";
9208c0cf40fSJerome Brunet						function = "tdma";
9211c5cc1c8SJerome Brunet						bias-disable;
9228c0cf40fSJerome Brunet					};
9238c0cf40fSJerome Brunet				};
9248c0cf40fSJerome Brunet
9258c0cf40fSJerome Brunet				tdma_sclk_pins: tdma_sclk {
9268c0cf40fSJerome Brunet					mux {
9278c0cf40fSJerome Brunet						groups = "tdma_sclk";
9288c0cf40fSJerome Brunet						function = "tdma";
9291c5cc1c8SJerome Brunet						bias-disable;
9308c0cf40fSJerome Brunet					};
9318c0cf40fSJerome Brunet				};
9328c0cf40fSJerome Brunet
9338c0cf40fSJerome Brunet				tdma_sclk_slv_pins: tdma_sclk_slv {
9348c0cf40fSJerome Brunet					mux {
9358c0cf40fSJerome Brunet						groups = "tdma_sclk_slv";
9368c0cf40fSJerome Brunet						function = "tdma";
9371c5cc1c8SJerome Brunet						bias-disable;
9388c0cf40fSJerome Brunet					};
9398c0cf40fSJerome Brunet				};
9408c0cf40fSJerome Brunet
9418c0cf40fSJerome Brunet				tdmb_din0_pins: tdmb_din0 {
9428c0cf40fSJerome Brunet					mux {
9438c0cf40fSJerome Brunet						groups = "tdmb_din0";
9448c0cf40fSJerome Brunet						function = "tdmb";
9451c5cc1c8SJerome Brunet						bias-disable;
9468c0cf40fSJerome Brunet					};
9478c0cf40fSJerome Brunet				};
9488c0cf40fSJerome Brunet
9498c0cf40fSJerome Brunet				tdmb_din1_pins: tdmb_din1 {
9508c0cf40fSJerome Brunet					mux {
9518c0cf40fSJerome Brunet						groups = "tdmb_din1";
9528c0cf40fSJerome Brunet						function = "tdmb";
9531c5cc1c8SJerome Brunet						bias-disable;
9548c0cf40fSJerome Brunet					};
9558c0cf40fSJerome Brunet				};
9568c0cf40fSJerome Brunet
9578c0cf40fSJerome Brunet				tdmb_din2_pins: tdmb_din2 {
9588c0cf40fSJerome Brunet					mux {
9598c0cf40fSJerome Brunet						groups = "tdmb_din2";
9608c0cf40fSJerome Brunet						function = "tdmb";
9611c5cc1c8SJerome Brunet						bias-disable;
9628c0cf40fSJerome Brunet					};
9638c0cf40fSJerome Brunet				};
9648c0cf40fSJerome Brunet
9658c0cf40fSJerome Brunet				tdmb_din3_pins: tdmb_din3 {
9668c0cf40fSJerome Brunet					mux {
9678c0cf40fSJerome Brunet						groups = "tdmb_din3";
9688c0cf40fSJerome Brunet						function = "tdmb";
9691c5cc1c8SJerome Brunet						bias-disable;
9708c0cf40fSJerome Brunet					};
9718c0cf40fSJerome Brunet				};
9728c0cf40fSJerome Brunet
9738c0cf40fSJerome Brunet				tdmb_dout0_pins: tdmb_dout0 {
9748c0cf40fSJerome Brunet					mux {
9758c0cf40fSJerome Brunet						groups = "tdmb_dout0";
9768c0cf40fSJerome Brunet						function = "tdmb";
9771c5cc1c8SJerome Brunet						bias-disable;
9788c0cf40fSJerome Brunet					};
9798c0cf40fSJerome Brunet				};
9808c0cf40fSJerome Brunet
9818c0cf40fSJerome Brunet				tdmb_dout1_pins: tdmb_dout1 {
9828c0cf40fSJerome Brunet					mux {
9838c0cf40fSJerome Brunet						groups = "tdmb_dout1";
9848c0cf40fSJerome Brunet						function = "tdmb";
9851c5cc1c8SJerome Brunet						bias-disable;
9868c0cf40fSJerome Brunet					};
9878c0cf40fSJerome Brunet				};
9888c0cf40fSJerome Brunet
9898c0cf40fSJerome Brunet				tdmb_dout2_pins: tdmb_dout2 {
9908c0cf40fSJerome Brunet					mux {
9918c0cf40fSJerome Brunet						groups = "tdmb_dout2";
9928c0cf40fSJerome Brunet						function = "tdmb";
9931c5cc1c8SJerome Brunet						bias-disable;
9948c0cf40fSJerome Brunet					};
9958c0cf40fSJerome Brunet				};
9968c0cf40fSJerome Brunet
9978c0cf40fSJerome Brunet				tdmb_dout3_pins: tdmb_dout3 {
9988c0cf40fSJerome Brunet					mux {
9998c0cf40fSJerome Brunet						groups = "tdmb_dout3";
10008c0cf40fSJerome Brunet						function = "tdmb";
10011c5cc1c8SJerome Brunet						bias-disable;
10028c0cf40fSJerome Brunet					};
10038c0cf40fSJerome Brunet				};
10048c0cf40fSJerome Brunet
10058c0cf40fSJerome Brunet				tdmb_fs_pins: tdmb_fs {
10068c0cf40fSJerome Brunet					mux {
10078c0cf40fSJerome Brunet						groups = "tdmb_fs";
10088c0cf40fSJerome Brunet						function = "tdmb";
10091c5cc1c8SJerome Brunet						bias-disable;
10108c0cf40fSJerome Brunet					};
10118c0cf40fSJerome Brunet				};
10128c0cf40fSJerome Brunet
10138c0cf40fSJerome Brunet				tdmb_fs_slv_pins: tdmb_fs_slv {
10148c0cf40fSJerome Brunet					mux {
10158c0cf40fSJerome Brunet						groups = "tdmb_fs_slv";
10168c0cf40fSJerome Brunet						function = "tdmb";
10171c5cc1c8SJerome Brunet						bias-disable;
10188c0cf40fSJerome Brunet					};
10198c0cf40fSJerome Brunet				};
10208c0cf40fSJerome Brunet
10218c0cf40fSJerome Brunet				tdmb_sclk_pins: tdmb_sclk {
10228c0cf40fSJerome Brunet					mux {
10238c0cf40fSJerome Brunet						groups = "tdmb_sclk";
10248c0cf40fSJerome Brunet						function = "tdmb";
10251c5cc1c8SJerome Brunet						bias-disable;
10268c0cf40fSJerome Brunet					};
10278c0cf40fSJerome Brunet				};
10288c0cf40fSJerome Brunet
10298c0cf40fSJerome Brunet				tdmb_sclk_slv_pins: tdmb_sclk_slv {
10308c0cf40fSJerome Brunet					mux {
10318c0cf40fSJerome Brunet						groups = "tdmb_sclk_slv";
10328c0cf40fSJerome Brunet						function = "tdmb";
10331c5cc1c8SJerome Brunet						bias-disable;
10348c0cf40fSJerome Brunet					};
10358c0cf40fSJerome Brunet				};
10368c0cf40fSJerome Brunet
10378c0cf40fSJerome Brunet				tdmc_fs_pins: tdmc_fs {
10388c0cf40fSJerome Brunet					mux {
10398c0cf40fSJerome Brunet						groups = "tdmc_fs";
10408c0cf40fSJerome Brunet						function = "tdmc";
10411c5cc1c8SJerome Brunet						bias-disable;
10428c0cf40fSJerome Brunet					};
10438c0cf40fSJerome Brunet				};
10448c0cf40fSJerome Brunet
10458c0cf40fSJerome Brunet				tdmc_fs_slv_pins: tdmc_fs_slv {
10468c0cf40fSJerome Brunet					mux {
10478c0cf40fSJerome Brunet						groups = "tdmc_fs_slv";
10488c0cf40fSJerome Brunet						function = "tdmc";
10491c5cc1c8SJerome Brunet						bias-disable;
10508c0cf40fSJerome Brunet					};
10518c0cf40fSJerome Brunet				};
10528c0cf40fSJerome Brunet
10538c0cf40fSJerome Brunet				tdmc_sclk_pins: tdmc_sclk {
10548c0cf40fSJerome Brunet					mux {
10558c0cf40fSJerome Brunet						groups = "tdmc_sclk";
10568c0cf40fSJerome Brunet						function = "tdmc";
10571c5cc1c8SJerome Brunet						bias-disable;
10588c0cf40fSJerome Brunet					};
10598c0cf40fSJerome Brunet				};
10608c0cf40fSJerome Brunet
10618c0cf40fSJerome Brunet				tdmc_sclk_slv_pins: tdmc_sclk_slv {
10628c0cf40fSJerome Brunet					mux {
10638c0cf40fSJerome Brunet						groups = "tdmc_sclk_slv";
10648c0cf40fSJerome Brunet						function = "tdmc";
10651c5cc1c8SJerome Brunet						bias-disable;
10668c0cf40fSJerome Brunet					};
10678c0cf40fSJerome Brunet				};
10688c0cf40fSJerome Brunet
10698c0cf40fSJerome Brunet				tdmc_din0_pins: tdmc_din0 {
10708c0cf40fSJerome Brunet					mux {
10718c0cf40fSJerome Brunet						groups = "tdmc_din0";
10728c0cf40fSJerome Brunet						function = "tdmc";
10731c5cc1c8SJerome Brunet						bias-disable;
10748c0cf40fSJerome Brunet					};
10758c0cf40fSJerome Brunet				};
10768c0cf40fSJerome Brunet
10778c0cf40fSJerome Brunet				tdmc_din1_pins: tdmc_din1 {
10788c0cf40fSJerome Brunet					mux {
10798c0cf40fSJerome Brunet						groups = "tdmc_din1";
10808c0cf40fSJerome Brunet						function = "tdmc";
10811c5cc1c8SJerome Brunet						bias-disable;
10828c0cf40fSJerome Brunet					};
10838c0cf40fSJerome Brunet				};
10848c0cf40fSJerome Brunet
10858c0cf40fSJerome Brunet				tdmc_din2_pins: tdmc_din2 {
10868c0cf40fSJerome Brunet					mux {
10878c0cf40fSJerome Brunet						groups = "tdmc_din2";
10888c0cf40fSJerome Brunet						function = "tdmc";
10891c5cc1c8SJerome Brunet						bias-disable;
10908c0cf40fSJerome Brunet					};
10918c0cf40fSJerome Brunet				};
10928c0cf40fSJerome Brunet
10938c0cf40fSJerome Brunet				tdmc_din3_pins: tdmc_din3 {
10948c0cf40fSJerome Brunet					mux {
10958c0cf40fSJerome Brunet						groups = "tdmc_din3";
10968c0cf40fSJerome Brunet						function = "tdmc";
10971c5cc1c8SJerome Brunet						bias-disable;
10988c0cf40fSJerome Brunet					};
10998c0cf40fSJerome Brunet				};
11008c0cf40fSJerome Brunet
11018c0cf40fSJerome Brunet				tdmc_dout0_pins: tdmc_dout0 {
11028c0cf40fSJerome Brunet					mux {
11038c0cf40fSJerome Brunet						groups = "tdmc_dout0";
11048c0cf40fSJerome Brunet						function = "tdmc";
11051c5cc1c8SJerome Brunet						bias-disable;
11068c0cf40fSJerome Brunet					};
11078c0cf40fSJerome Brunet				};
11088c0cf40fSJerome Brunet
11098c0cf40fSJerome Brunet				tdmc_dout1_pins: tdmc_dout1 {
11108c0cf40fSJerome Brunet					mux {
11118c0cf40fSJerome Brunet						groups = "tdmc_dout1";
11128c0cf40fSJerome Brunet						function = "tdmc";
11131c5cc1c8SJerome Brunet						bias-disable;
11148c0cf40fSJerome Brunet					};
11158c0cf40fSJerome Brunet				};
11168c0cf40fSJerome Brunet
11178c0cf40fSJerome Brunet				tdmc_dout2_pins: tdmc_dout2 {
11188c0cf40fSJerome Brunet					mux {
11198c0cf40fSJerome Brunet						groups = "tdmc_dout2";
11208c0cf40fSJerome Brunet						function = "tdmc";
11211c5cc1c8SJerome Brunet						bias-disable;
11228c0cf40fSJerome Brunet					};
11238c0cf40fSJerome Brunet				};
11248c0cf40fSJerome Brunet
11258c0cf40fSJerome Brunet				tdmc_dout3_pins: tdmc_dout3 {
11268c0cf40fSJerome Brunet					mux {
11278c0cf40fSJerome Brunet						groups = "tdmc_dout3";
11288c0cf40fSJerome Brunet						function = "tdmc";
11291c5cc1c8SJerome Brunet						bias-disable;
11308c0cf40fSJerome Brunet					};
11318c0cf40fSJerome Brunet				};
11328c0cf40fSJerome Brunet
11338c0cf40fSJerome Brunet				uart_a_pins: uart_a {
11348c0cf40fSJerome Brunet					mux {
11358c0cf40fSJerome Brunet						groups = "uart_tx_a",
11368c0cf40fSJerome Brunet							 "uart_rx_a";
11378c0cf40fSJerome Brunet						function = "uart_a";
11381c5cc1c8SJerome Brunet						bias-disable;
11398c0cf40fSJerome Brunet					};
11408c0cf40fSJerome Brunet				};
11418c0cf40fSJerome Brunet
11428c0cf40fSJerome Brunet				uart_a_cts_rts_pins: uart_a_cts_rts {
11438c0cf40fSJerome Brunet					mux {
11448c0cf40fSJerome Brunet						groups = "uart_cts_a",
11458c0cf40fSJerome Brunet							 "uart_rts_a";
11468c0cf40fSJerome Brunet						function = "uart_a";
11471c5cc1c8SJerome Brunet						bias-disable;
11488c0cf40fSJerome Brunet					};
11498c0cf40fSJerome Brunet				};
11508c0cf40fSJerome Brunet
11518c0cf40fSJerome Brunet				uart_b_x_pins: uart_b_x {
11528c0cf40fSJerome Brunet					mux {
11538c0cf40fSJerome Brunet						groups = "uart_tx_b_x",
11548c0cf40fSJerome Brunet							 "uart_rx_b_x";
11558c0cf40fSJerome Brunet						function = "uart_b";
11561c5cc1c8SJerome Brunet						bias-disable;
11578c0cf40fSJerome Brunet					};
11588c0cf40fSJerome Brunet				};
11598c0cf40fSJerome Brunet
11608c0cf40fSJerome Brunet				uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
11618c0cf40fSJerome Brunet					mux {
11628c0cf40fSJerome Brunet						groups = "uart_cts_b_x",
11638c0cf40fSJerome Brunet							 "uart_rts_b_x";
11648c0cf40fSJerome Brunet						function = "uart_b";
11651c5cc1c8SJerome Brunet						bias-disable;
11668c0cf40fSJerome Brunet					};
11678c0cf40fSJerome Brunet				};
11688c0cf40fSJerome Brunet
11698c0cf40fSJerome Brunet				uart_b_z_pins: uart_b_z {
11708c0cf40fSJerome Brunet					mux {
11718c0cf40fSJerome Brunet						groups = "uart_tx_b_z",
11728c0cf40fSJerome Brunet							 "uart_rx_b_z";
11738c0cf40fSJerome Brunet						function = "uart_b";
11741c5cc1c8SJerome Brunet						bias-disable;
11758c0cf40fSJerome Brunet					};
11768c0cf40fSJerome Brunet				};
11778c0cf40fSJerome Brunet
11788c0cf40fSJerome Brunet				uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
11798c0cf40fSJerome Brunet					mux {
11808c0cf40fSJerome Brunet						groups = "uart_cts_b_z",
11818c0cf40fSJerome Brunet							 "uart_rts_b_z";
11828c0cf40fSJerome Brunet						function = "uart_b";
11831c5cc1c8SJerome Brunet						bias-disable;
11848c0cf40fSJerome Brunet					};
11858c0cf40fSJerome Brunet				};
11868c0cf40fSJerome Brunet
11878c0cf40fSJerome Brunet				uart_ao_b_z_pins: uart_ao_b_z {
11888c0cf40fSJerome Brunet					mux {
11898c0cf40fSJerome Brunet						groups = "uart_ao_tx_b_z",
11908c0cf40fSJerome Brunet							 "uart_ao_rx_b_z";
11918c0cf40fSJerome Brunet						function = "uart_ao_b_z";
11921c5cc1c8SJerome Brunet						bias-disable;
11938c0cf40fSJerome Brunet					};
11948c0cf40fSJerome Brunet				};
11958c0cf40fSJerome Brunet
11968c0cf40fSJerome Brunet				uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
11978c0cf40fSJerome Brunet					mux {
11988c0cf40fSJerome Brunet						groups = "uart_ao_cts_b_z",
11998c0cf40fSJerome Brunet							 "uart_ao_rts_b_z";
12008c0cf40fSJerome Brunet						function = "uart_ao_b_z";
12011c5cc1c8SJerome Brunet						bias-disable;
12028c0cf40fSJerome Brunet					};
12038c0cf40fSJerome Brunet				};
12048c0cf40fSJerome Brunet			};
12058c0cf40fSJerome Brunet		};
12068c0cf40fSJerome Brunet
12078c0cf40fSJerome Brunet		hiubus: bus@ff63c000 {
12088c0cf40fSJerome Brunet			compatible = "simple-bus";
12098c0cf40fSJerome Brunet			reg = <0x0 0xff63c000 0x0 0x1c00>;
12108c0cf40fSJerome Brunet			#address-cells = <2>;
12118c0cf40fSJerome Brunet			#size-cells = <2>;
12128c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
12138c0cf40fSJerome Brunet
12148c0cf40fSJerome Brunet			sysctrl: system-controller@0 {
12158c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-hhi-sysctrl",
1216445f2bdaSNeil Armstrong					     "simple-mfd", "syscon";
12178c0cf40fSJerome Brunet				reg = <0 0 0 0x400>;
12188c0cf40fSJerome Brunet
12198c0cf40fSJerome Brunet				clkc: clock-controller {
12208c0cf40fSJerome Brunet					compatible = "amlogic,axg-clkc";
12218c0cf40fSJerome Brunet					#clock-cells = <1>;
122216361ff2SJerome Brunet					clocks = <&xtal>;
122316361ff2SJerome Brunet					clock-names = "xtal";
12248c0cf40fSJerome Brunet				};
122578a6dcb5SNeil Armstrong
122678a6dcb5SNeil Armstrong				pwrc: power-controller {
122778a6dcb5SNeil Armstrong					compatible = "amlogic,meson-axg-pwrc";
122878a6dcb5SNeil Armstrong					#power-domain-cells = <1>;
122978a6dcb5SNeil Armstrong					amlogic,ao-sysctrl = <&sysctrl_AO>;
123078a6dcb5SNeil Armstrong					resets = <&reset RESET_VIU>,
123178a6dcb5SNeil Armstrong						 <&reset RESET_VENC>,
123278a6dcb5SNeil Armstrong						 <&reset RESET_VCBUS>,
123378a6dcb5SNeil Armstrong						 <&reset RESET_VENCL>,
123478a6dcb5SNeil Armstrong						 <&reset RESET_VID_LOCK>;
123578a6dcb5SNeil Armstrong					reset-names = "viu", "venc", "vcbus",
123678a6dcb5SNeil Armstrong						      "vencl", "vid_lock";
123778a6dcb5SNeil Armstrong					clocks = <&clkc CLKID_VPU>,
123878a6dcb5SNeil Armstrong						 <&clkc CLKID_VAPB>;
123978a6dcb5SNeil Armstrong					clock-names = "vpu", "vapb";
124078a6dcb5SNeil Armstrong					/*
124178a6dcb5SNeil Armstrong					 * VPU clocking is provided by two identical clock paths
124278a6dcb5SNeil Armstrong					 * VPU_0 and VPU_1 muxed to a single clock by a glitch
124378a6dcb5SNeil Armstrong					 * free mux to safely change frequency while running.
124478a6dcb5SNeil Armstrong					 * Same for VAPB but with a final gate after the glitch free mux.
124578a6dcb5SNeil Armstrong					 */
124678a6dcb5SNeil Armstrong					assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
124778a6dcb5SNeil Armstrong							  <&clkc CLKID_VPU_0>,
124878a6dcb5SNeil Armstrong							  <&clkc CLKID_VPU>, /* Glitch free mux */
124978a6dcb5SNeil Armstrong							  <&clkc CLKID_VAPB_0_SEL>,
125078a6dcb5SNeil Armstrong							  <&clkc CLKID_VAPB_0>,
125178a6dcb5SNeil Armstrong							  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
125278a6dcb5SNeil Armstrong					assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
125378a6dcb5SNeil Armstrong								 <0>, /* Do Nothing */
125478a6dcb5SNeil Armstrong								 <&clkc CLKID_VPU_0>,
125578a6dcb5SNeil Armstrong								 <&clkc CLKID_FCLK_DIV4>,
125678a6dcb5SNeil Armstrong								 <0>, /* Do Nothing */
125778a6dcb5SNeil Armstrong								 <&clkc CLKID_VAPB_0>;
125878a6dcb5SNeil Armstrong					assigned-clock-rates = <0>, /* Do Nothing */
125978a6dcb5SNeil Armstrong							       <250000000>,
126078a6dcb5SNeil Armstrong							       <0>, /* Do Nothing */
126178a6dcb5SNeil Armstrong							       <0>, /* Do Nothing */
126278a6dcb5SNeil Armstrong							       <250000000>,
126378a6dcb5SNeil Armstrong							       <0>; /* Do Nothing */
126478a6dcb5SNeil Armstrong				};
12653d3f1dfaSNeil Armstrong
12663d3f1dfaSNeil Armstrong				mipi_pcie_analog_dphy: phy {
12673d3f1dfaSNeil Armstrong					compatible = "amlogic,axg-mipi-pcie-analog-phy";
12683d3f1dfaSNeil Armstrong					#phy-cells = <0>;
12693d3f1dfaSNeil Armstrong					status = "disabled";
12703d3f1dfaSNeil Armstrong				};
12718c0cf40fSJerome Brunet			};
12728c0cf40fSJerome Brunet		};
12738c0cf40fSJerome Brunet
12749fdff382SJerome Brunet		mailbox: mailbox@ff63c404 {
127501efc19cSNeil Armstrong			compatible = "amlogic,meson-gxbb-mhu";
12769fdff382SJerome Brunet			reg = <0 0xff63c404 0 0x4c>;
12778c0cf40fSJerome Brunet			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
12788c0cf40fSJerome Brunet				     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
12798c0cf40fSJerome Brunet				     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
12808c0cf40fSJerome Brunet			#mbox-cells = <1>;
1281221cf34bSNan Li		};
1282221cf34bSNan Li
12833d3f1dfaSNeil Armstrong		mipi_dphy: phy@ff640000 {
12843d3f1dfaSNeil Armstrong			compatible = "amlogic,axg-mipi-dphy";
12853d3f1dfaSNeil Armstrong			reg = <0x0 0xff640000 0x0 0x100>;
12863d3f1dfaSNeil Armstrong			clocks = <&clkc CLKID_MIPI_DSI_PHY>;
12873d3f1dfaSNeil Armstrong			clock-names = "pclk";
12883d3f1dfaSNeil Armstrong			resets = <&reset RESET_MIPI_PHY>;
12893d3f1dfaSNeil Armstrong			reset-names = "phy";
12903d3f1dfaSNeil Armstrong			phys = <&mipi_pcie_analog_dphy>;
12913d3f1dfaSNeil Armstrong			phy-names = "analog";
12923d3f1dfaSNeil Armstrong			#phy-cells = <0>;
12933d3f1dfaSNeil Armstrong			status = "disabled";
12943d3f1dfaSNeil Armstrong		};
12953d3f1dfaSNeil Armstrong
12968909e722SJerome Brunet		audio: bus@ff642000 {
12978909e722SJerome Brunet			compatible = "simple-bus";
12988909e722SJerome Brunet			reg = <0x0 0xff642000 0x0 0x2000>;
12998909e722SJerome Brunet			#address-cells = <2>;
13008909e722SJerome Brunet			#size-cells = <2>;
13018909e722SJerome Brunet			ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
13028909e722SJerome Brunet
13038909e722SJerome Brunet			clkc_audio: clock-controller@0 {
13048909e722SJerome Brunet				compatible = "amlogic,axg-audio-clkc";
13058909e722SJerome Brunet				reg = <0x0 0x0 0x0 0xb4>;
13068909e722SJerome Brunet				#clock-cells = <1>;
13078909e722SJerome Brunet
13088909e722SJerome Brunet				clocks = <&clkc CLKID_AUDIO>,
13098909e722SJerome Brunet					 <&clkc CLKID_MPLL0>,
13108909e722SJerome Brunet					 <&clkc CLKID_MPLL1>,
13118909e722SJerome Brunet					 <&clkc CLKID_MPLL2>,
13128909e722SJerome Brunet					 <&clkc CLKID_MPLL3>,
13138909e722SJerome Brunet					 <&clkc CLKID_HIFI_PLL>,
13148909e722SJerome Brunet					 <&clkc CLKID_FCLK_DIV3>,
13158909e722SJerome Brunet					 <&clkc CLKID_FCLK_DIV4>,
13168909e722SJerome Brunet					 <&clkc CLKID_GP0_PLL>;
13178909e722SJerome Brunet				clock-names = "pclk",
13188909e722SJerome Brunet					      "mst_in0",
13198909e722SJerome Brunet					      "mst_in1",
13208909e722SJerome Brunet					      "mst_in2",
13218909e722SJerome Brunet					      "mst_in3",
13228909e722SJerome Brunet					      "mst_in4",
13238909e722SJerome Brunet					      "mst_in5",
13248909e722SJerome Brunet					      "mst_in6",
13258909e722SJerome Brunet					      "mst_in7";
13268909e722SJerome Brunet
13278909e722SJerome Brunet				resets = <&reset RESET_AUDIO>;
13288909e722SJerome Brunet			};
132966d58a8fSJerome Brunet
1330f2b8f6a9SJerome Brunet			toddr_a: audio-controller@100 {
1331f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1332301b94d4SJerome Brunet				reg = <0x0 0x100 0x0 0x2c>;
1333f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1334f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_A";
1335f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
1336f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1337f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_A>;
1338be638075SJerome Brunet				amlogic,fifo-depth = <512>;
1339f2b8f6a9SJerome Brunet				status = "disabled";
1340f2b8f6a9SJerome Brunet			};
1341f2b8f6a9SJerome Brunet
1342f2b8f6a9SJerome Brunet			toddr_b: audio-controller@140 {
1343f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1344301b94d4SJerome Brunet				reg = <0x0 0x140 0x0 0x2c>;
1345f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1346f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_B";
1347f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
1348f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1349f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_B>;
1350be638075SJerome Brunet				amlogic,fifo-depth = <256>;
1351f2b8f6a9SJerome Brunet				status = "disabled";
1352f2b8f6a9SJerome Brunet			};
1353f2b8f6a9SJerome Brunet
1354f2b8f6a9SJerome Brunet			toddr_c: audio-controller@180 {
1355f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1356301b94d4SJerome Brunet				reg = <0x0 0x180 0x0 0x2c>;
1357f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1358f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_C";
1359f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
1360f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1361f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_C>;
1362be638075SJerome Brunet				amlogic,fifo-depth = <256>;
1363f2b8f6a9SJerome Brunet				status = "disabled";
1364f2b8f6a9SJerome Brunet			};
1365f2b8f6a9SJerome Brunet
1366f2b8f6a9SJerome Brunet			frddr_a: audio-controller@1c0 {
1367f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1368301b94d4SJerome Brunet				reg = <0x0 0x1c0 0x0 0x2c>;
1369f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1370f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_A";
1371f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
1372f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1373f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_A>;
1374be638075SJerome Brunet				amlogic,fifo-depth = <512>;
1375f2b8f6a9SJerome Brunet				status = "disabled";
1376f2b8f6a9SJerome Brunet			};
1377f2b8f6a9SJerome Brunet
1378f2b8f6a9SJerome Brunet			frddr_b: audio-controller@200 {
1379f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1380301b94d4SJerome Brunet				reg = <0x0 0x200 0x0 0x2c>;
1381f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1382f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_B";
1383f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
1384f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1385f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_B>;
1386be638075SJerome Brunet				amlogic,fifo-depth = <256>;
1387f2b8f6a9SJerome Brunet				status = "disabled";
1388f2b8f6a9SJerome Brunet			};
1389f2b8f6a9SJerome Brunet
1390f2b8f6a9SJerome Brunet			frddr_c: audio-controller@240 {
1391f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1392301b94d4SJerome Brunet				reg = <0x0 0x240 0x0 0x2c>;
1393f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1394f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_C";
1395f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
1396f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1397f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_C>;
1398be638075SJerome Brunet				amlogic,fifo-depth = <256>;
1399f2b8f6a9SJerome Brunet				status = "disabled";
1400f2b8f6a9SJerome Brunet			};
1401f2b8f6a9SJerome Brunet
140266d58a8fSJerome Brunet			arb: reset-controller@280 {
140366d58a8fSJerome Brunet				compatible = "amlogic,meson-axg-audio-arb";
140466d58a8fSJerome Brunet				reg = <0x0 0x280 0x0 0x4>;
140566d58a8fSJerome Brunet				#reset-cells = <1>;
140666d58a8fSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
140766d58a8fSJerome Brunet			};
1408f08c52deSJerome Brunet
1409bf8e4790SJerome Brunet			tdmin_a: audio-controller@300 {
1410bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1411bf8e4790SJerome Brunet				reg = <0x0 0x300 0x0 0x40>;
1412bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_A";
1413bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1414bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1415bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1416bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1417bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1418bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1419bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1420bf8e4790SJerome Brunet				status = "disabled";
1421bf8e4790SJerome Brunet			};
1422bf8e4790SJerome Brunet
1423bf8e4790SJerome Brunet			tdmin_b: audio-controller@340 {
1424bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1425bf8e4790SJerome Brunet				reg = <0x0 0x340 0x0 0x40>;
1426bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_B";
1427bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1428bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1429bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1430bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1431bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1432bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1433bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1434bf8e4790SJerome Brunet				status = "disabled";
1435bf8e4790SJerome Brunet			};
1436bf8e4790SJerome Brunet
1437bf8e4790SJerome Brunet			tdmin_c: audio-controller@380 {
1438bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1439bf8e4790SJerome Brunet				reg = <0x0 0x380 0x0 0x40>;
1440bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_C";
1441bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1442bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1443bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1444bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1445bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1446bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1447bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1448bf8e4790SJerome Brunet				status = "disabled";
1449bf8e4790SJerome Brunet			};
1450bf8e4790SJerome Brunet
1451bf8e4790SJerome Brunet			tdmin_lb: audio-controller@3c0 {
1452bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1453bf8e4790SJerome Brunet				reg = <0x0 0x3c0 0x0 0x40>;
1454bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_LB";
1455bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1456bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1457bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1458bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1459bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1460bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1461bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1462bf8e4790SJerome Brunet				status = "disabled";
1463bf8e4790SJerome Brunet			};
1464bf8e4790SJerome Brunet
14655e6a18acSJerome Brunet			spdifin: audio-controller@400 {
14665e6a18acSJerome Brunet				compatible = "amlogic,axg-spdifin";
14675e6a18acSJerome Brunet				reg = <0x0 0x400 0x0 0x30>;
14685e6a18acSJerome Brunet				#sound-dai-cells = <0>;
14695e6a18acSJerome Brunet				sound-name-prefix = "SPDIFIN";
14705e6a18acSJerome Brunet				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
14715e6a18acSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
14725e6a18acSJerome Brunet					 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
14735e6a18acSJerome Brunet				clock-names = "pclk", "refclk";
14745e6a18acSJerome Brunet				status = "disabled";
14755e6a18acSJerome Brunet			};
14765e6a18acSJerome Brunet
1477f08c52deSJerome Brunet			spdifout: audio-controller@480 {
1478f08c52deSJerome Brunet				compatible = "amlogic,axg-spdifout";
1479f08c52deSJerome Brunet				reg = <0x0 0x480 0x0 0x50>;
1480f08c52deSJerome Brunet				#sound-dai-cells = <0>;
1481f08c52deSJerome Brunet				sound-name-prefix = "SPDIFOUT";
1482f08c52deSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1483f08c52deSJerome Brunet					 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1484f08c52deSJerome Brunet				clock-names = "pclk", "mclk";
1485f08c52deSJerome Brunet				status = "disabled";
1486f08c52deSJerome Brunet			};
1487fd916739SJerome Brunet
1488fd916739SJerome Brunet			tdmout_a: audio-controller@500 {
1489fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1490fd916739SJerome Brunet				reg = <0x0 0x500 0x0 0x40>;
1491fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_A";
1492fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1493fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1494fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1495fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1496fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1497fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1498fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1499fd916739SJerome Brunet				status = "disabled";
1500fd916739SJerome Brunet			};
1501fd916739SJerome Brunet
1502fd916739SJerome Brunet			tdmout_b: audio-controller@540 {
1503fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1504fd916739SJerome Brunet				reg = <0x0 0x540 0x0 0x40>;
1505fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_B";
1506fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1507fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1508fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1509fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1510fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1511fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1512fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1513fd916739SJerome Brunet				status = "disabled";
1514fd916739SJerome Brunet			};
1515fd916739SJerome Brunet
1516fd916739SJerome Brunet			tdmout_c: audio-controller@580 {
1517fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1518fd916739SJerome Brunet				reg = <0x0 0x580 0x0 0x40>;
1519fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_C";
1520fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1521fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1522fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1523fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1524fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1525fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1526fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1527fd916739SJerome Brunet				status = "disabled";
1528fd916739SJerome Brunet			};
15298909e722SJerome Brunet		};
15308909e722SJerome Brunet
15310cb6c604SKevin Hilman		aobus: bus@ff800000 {
15329d59b708SYixun Lan			compatible = "simple-bus";
15339d59b708SYixun Lan			reg = <0x0 0xff800000 0x0 0x100000>;
15349d59b708SYixun Lan			#address-cells = <2>;
15359d59b708SYixun Lan			#size-cells = <2>;
15369d59b708SYixun Lan			ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
15379d59b708SYixun Lan
1538e03421ecSQiufang Dai			sysctrl_AO: sys-ctrl@0 {
1539445f2bdaSNeil Armstrong				compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
1540e03421ecSQiufang Dai				reg =  <0x0 0x0 0x0 0x100>;
1541e03421ecSQiufang Dai
1542e03421ecSQiufang Dai				clkc_AO: clock-controller {
1543e03421ecSQiufang Dai					compatible = "amlogic,meson-axg-aoclkc";
1544e03421ecSQiufang Dai					#clock-cells = <1>;
1545e03421ecSQiufang Dai					#reset-cells = <1>;
154616361ff2SJerome Brunet					clocks = <&xtal>, <&clkc CLKID_CLK81>;
154716361ff2SJerome Brunet					clock-names = "xtal", "mpeg-clk";
1548e03421ecSQiufang Dai				};
1549e03421ecSQiufang Dai			};
1550e03421ecSQiufang Dai
1551de05ded6SXingyu Chen			pinctrl_aobus: pinctrl@14 {
1552de05ded6SXingyu Chen				compatible = "amlogic,meson-axg-aobus-pinctrl";
1553de05ded6SXingyu Chen				#address-cells = <2>;
1554de05ded6SXingyu Chen				#size-cells = <2>;
1555de05ded6SXingyu Chen				ranges;
1556de05ded6SXingyu Chen
1557de05ded6SXingyu Chen				gpio_ao: bank@14 {
1558de05ded6SXingyu Chen					reg = <0x0 0x00014 0x0 0x8>,
1559de05ded6SXingyu Chen					      <0x0 0x0002c 0x0 0x4>,
1560de05ded6SXingyu Chen					      <0x0 0x00024 0x0 0x8>;
1561de05ded6SXingyu Chen					reg-names = "mux", "pull", "gpio";
1562de05ded6SXingyu Chen					gpio-controller;
1563de05ded6SXingyu Chen					#gpio-cells = <2>;
1564de05ded6SXingyu Chen					gpio-ranges = <&pinctrl_aobus 0 0 15>;
1565de05ded6SXingyu Chen				};
15667bd46a79SYixun Lan
1567c054b6c2SJerome Brunet				i2c_ao_sck_4_pins: i2c_ao_sck_4 {
1568c054b6c2SJerome Brunet					mux {
1569c054b6c2SJerome Brunet						groups = "i2c_ao_sck_4";
1570c054b6c2SJerome Brunet						function = "i2c_ao";
15711c5cc1c8SJerome Brunet						bias-disable;
1572c054b6c2SJerome Brunet					};
1573c054b6c2SJerome Brunet				};
1574c054b6c2SJerome Brunet
1575c054b6c2SJerome Brunet				i2c_ao_sck_8_pins: i2c_ao_sck_8 {
1576c054b6c2SJerome Brunet					mux {
1577c054b6c2SJerome Brunet						groups = "i2c_ao_sck_8";
1578c054b6c2SJerome Brunet						function = "i2c_ao";
15791c5cc1c8SJerome Brunet						bias-disable;
1580c054b6c2SJerome Brunet					};
1581c054b6c2SJerome Brunet				};
1582c054b6c2SJerome Brunet
1583c054b6c2SJerome Brunet				i2c_ao_sck_10_pins: i2c_ao_sck_10 {
1584c054b6c2SJerome Brunet					mux {
1585c054b6c2SJerome Brunet						groups = "i2c_ao_sck_10";
1586c054b6c2SJerome Brunet						function = "i2c_ao";
15871c5cc1c8SJerome Brunet						bias-disable;
1588c054b6c2SJerome Brunet					};
1589c054b6c2SJerome Brunet				};
1590c054b6c2SJerome Brunet
1591c054b6c2SJerome Brunet				i2c_ao_sda_5_pins: i2c_ao_sda_5 {
1592c054b6c2SJerome Brunet					mux {
1593c054b6c2SJerome Brunet						groups = "i2c_ao_sda_5";
1594c054b6c2SJerome Brunet						function = "i2c_ao";
15951c5cc1c8SJerome Brunet						bias-disable;
1596c054b6c2SJerome Brunet					};
1597c054b6c2SJerome Brunet				};
1598c054b6c2SJerome Brunet
1599c054b6c2SJerome Brunet				i2c_ao_sda_9_pins: i2c_ao_sda_9 {
1600c054b6c2SJerome Brunet					mux {
1601c054b6c2SJerome Brunet						groups = "i2c_ao_sda_9";
1602c054b6c2SJerome Brunet						function = "i2c_ao";
16031c5cc1c8SJerome Brunet						bias-disable;
1604c054b6c2SJerome Brunet					};
1605c054b6c2SJerome Brunet				};
1606c054b6c2SJerome Brunet
1607c054b6c2SJerome Brunet				i2c_ao_sda_11_pins: i2c_ao_sda_11 {
1608c054b6c2SJerome Brunet					mux {
1609c054b6c2SJerome Brunet						groups = "i2c_ao_sda_11";
1610c054b6c2SJerome Brunet						function = "i2c_ao";
16111c5cc1c8SJerome Brunet						bias-disable;
1612c054b6c2SJerome Brunet					};
1613c054b6c2SJerome Brunet				};
1614c054b6c2SJerome Brunet
16157bd46a79SYixun Lan				remote_input_ao_pins: remote_input_ao {
16167bd46a79SYixun Lan					mux {
16177bd46a79SYixun Lan						groups = "remote_input_ao";
16187bd46a79SYixun Lan						function = "remote_input_ao";
16191c5cc1c8SJerome Brunet						bias-disable;
16207bd46a79SYixun Lan					};
16217bd46a79SYixun Lan				};
16224eae66a6SYixun Lan
16234eae66a6SYixun Lan				uart_ao_a_pins: uart_ao_a {
16244eae66a6SYixun Lan					mux {
16254eae66a6SYixun Lan						groups = "uart_ao_tx_a",
16264eae66a6SYixun Lan							 "uart_ao_rx_a";
16274eae66a6SYixun Lan						function = "uart_ao_a";
16281c5cc1c8SJerome Brunet						bias-disable;
16294eae66a6SYixun Lan					};
16304eae66a6SYixun Lan				};
16314eae66a6SYixun Lan
16324eae66a6SYixun Lan				uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
16334eae66a6SYixun Lan					mux {
16344eae66a6SYixun Lan						groups = "uart_ao_cts_a",
16354eae66a6SYixun Lan							 "uart_ao_rts_a";
16364eae66a6SYixun Lan						function = "uart_ao_a";
16371c5cc1c8SJerome Brunet						bias-disable;
16384eae66a6SYixun Lan					};
16394eae66a6SYixun Lan				};
16404eae66a6SYixun Lan
16414eae66a6SYixun Lan				uart_ao_b_pins: uart_ao_b {
16424eae66a6SYixun Lan					mux {
16434eae66a6SYixun Lan						groups = "uart_ao_tx_b",
16444eae66a6SYixun Lan							 "uart_ao_rx_b";
16454eae66a6SYixun Lan						function = "uart_ao_b";
16461c5cc1c8SJerome Brunet						bias-disable;
16474eae66a6SYixun Lan					};
16484eae66a6SYixun Lan				};
16494eae66a6SYixun Lan
16504eae66a6SYixun Lan				uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
16514eae66a6SYixun Lan					mux {
16524eae66a6SYixun Lan						groups = "uart_ao_cts_b",
16534eae66a6SYixun Lan							 "uart_ao_rts_b";
16544eae66a6SYixun Lan						function = "uart_ao_b";
16551c5cc1c8SJerome Brunet						bias-disable;
16564eae66a6SYixun Lan					};
16574eae66a6SYixun Lan				};
1658de05ded6SXingyu Chen			};
1659de05ded6SXingyu Chen
1660a04c18cbSJerome Brunet			sec_AO: ao-secure@140 {
1661a04c18cbSJerome Brunet				compatible = "amlogic,meson-gx-ao-secure", "syscon";
1662a04c18cbSJerome Brunet				reg = <0x0 0x140 0x0 0x140>;
1663a04c18cbSJerome Brunet				amlogic,has-chip-id;
1664a04c18cbSJerome Brunet			};
1665a04c18cbSJerome Brunet
16664a81e5ddSJian Hu			pwm_AO_cd: pwm@2000 {
1667b4ff05caSJerome Brunet				compatible = "amlogic,meson-axg-ao-pwm";
16684a81e5ddSJian Hu				reg = <0x0 0x02000  0x0 0x20>;
16694a81e5ddSJian Hu				#pwm-cells = <3>;
16704a81e5ddSJian Hu				status = "disabled";
16714a81e5ddSJian Hu			};
16724a81e5ddSJian Hu
16739d59b708SYixun Lan			uart_AO: serial@3000 {
16749d59b708SYixun Lan				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
16759d59b708SYixun Lan				reg = <0x0 0x3000 0x0 0x18>;
16769d59b708SYixun Lan				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
16779adda353SYixun Lan				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
16789d59b708SYixun Lan				clock-names = "xtal", "pclk", "baud";
16799d59b708SYixun Lan				status = "disabled";
16809d59b708SYixun Lan			};
16819d59b708SYixun Lan
16829d59b708SYixun Lan			uart_AO_B: serial@4000 {
16839d59b708SYixun Lan				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
16849d59b708SYixun Lan				reg = <0x0 0x4000 0x0 0x18>;
16859d59b708SYixun Lan				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
16869adda353SYixun Lan				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
16879d59b708SYixun Lan				clock-names = "xtal", "pclk", "baud";
16889d59b708SYixun Lan				status = "disabled";
16899d59b708SYixun Lan			};
16907bd46a79SYixun Lan
16918c0cf40fSJerome Brunet			i2c_AO: i2c@5000 {
16928c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16938c0cf40fSJerome Brunet				reg = <0x0 0x05000 0x0 0x20>;
16948c0cf40fSJerome Brunet				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
16958c0cf40fSJerome Brunet				clocks = <&clkc CLKID_AO_I2C>;
16968c0cf40fSJerome Brunet				#address-cells = <1>;
16978c0cf40fSJerome Brunet				#size-cells = <0>;
16988c0cf40fSJerome Brunet				status = "disabled";
16998c0cf40fSJerome Brunet			};
17008c0cf40fSJerome Brunet
17018c0cf40fSJerome Brunet			pwm_AO_ab: pwm@7000 {
17028c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ao-pwm";
17038c0cf40fSJerome Brunet				reg = <0x0 0x07000 0x0 0x20>;
17048c0cf40fSJerome Brunet				#pwm-cells = <3>;
17058c0cf40fSJerome Brunet				status = "disabled";
17068c0cf40fSJerome Brunet			};
17078c0cf40fSJerome Brunet
17087bd46a79SYixun Lan			ir: ir@8000 {
17097bd46a79SYixun Lan				compatible = "amlogic,meson-gxbb-ir";
17107bd46a79SYixun Lan				reg = <0x0 0x8000 0x0 0x20>;
17117bd46a79SYixun Lan				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
17127bd46a79SYixun Lan				status = "disabled";
17137bd46a79SYixun Lan			};
1714a51b74eaSXingyu Chen
1715a51b74eaSXingyu Chen			saradc: adc@9000 {
1716a51b74eaSXingyu Chen				compatible = "amlogic,meson-axg-saradc",
1717a51b74eaSXingyu Chen					"amlogic,meson-saradc";
1718a51b74eaSXingyu Chen				reg = <0x0 0x9000 0x0 0x38>;
1719a51b74eaSXingyu Chen				#io-channel-cells = <1>;
1720a51b74eaSXingyu Chen				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
1721a51b74eaSXingyu Chen				clocks = <&xtal>,
1722a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC>,
1723a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
1724a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
1725a51b74eaSXingyu Chen				clock-names = "clkin", "core", "adc_clk", "adc_sel";
1726a51b74eaSXingyu Chen				status = "disabled";
1727a51b74eaSXingyu Chen			};
17289d59b708SYixun Lan		};
17298c0cf40fSJerome Brunet
1730*b03455aeSNeil Armstrong		ge2d: ge2d@ff940000 {
1731*b03455aeSNeil Armstrong			compatible = "amlogic,axg-ge2d";
1732*b03455aeSNeil Armstrong			reg = <0x0 0xff940000 0x0 0x10000>;
1733*b03455aeSNeil Armstrong			interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
1734*b03455aeSNeil Armstrong			clocks = <&clkc CLKID_VAPB>;
1735*b03455aeSNeil Armstrong			resets = <&reset RESET_GE2D>;
1736*b03455aeSNeil Armstrong			reset-names = "core";
1737*b03455aeSNeil Armstrong		};
1738*b03455aeSNeil Armstrong
17398c0cf40fSJerome Brunet		gic: interrupt-controller@ffc01000 {
17408c0cf40fSJerome Brunet			compatible = "arm,gic-400";
17418c0cf40fSJerome Brunet			reg = <0x0 0xffc01000 0 0x1000>,
17428c0cf40fSJerome Brunet			      <0x0 0xffc02000 0 0x2000>,
17438c0cf40fSJerome Brunet			      <0x0 0xffc04000 0 0x2000>,
17448c0cf40fSJerome Brunet			      <0x0 0xffc06000 0 0x2000>;
17458c0cf40fSJerome Brunet			interrupt-controller;
17468c0cf40fSJerome Brunet			interrupts = <GIC_PPI 9
17478c0cf40fSJerome Brunet				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
17488c0cf40fSJerome Brunet			#interrupt-cells = <3>;
17498c0cf40fSJerome Brunet			#address-cells = <0>;
17508c0cf40fSJerome Brunet		};
17518c0cf40fSJerome Brunet
17528c0cf40fSJerome Brunet		cbus: bus@ffd00000 {
17538c0cf40fSJerome Brunet			compatible = "simple-bus";
17548c0cf40fSJerome Brunet			reg = <0x0 0xffd00000 0x0 0x25000>;
17558c0cf40fSJerome Brunet			#address-cells = <2>;
17568c0cf40fSJerome Brunet			#size-cells = <2>;
17578c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
17588c0cf40fSJerome Brunet
17598c0cf40fSJerome Brunet			reset: reset-controller@1004 {
17608c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-reset";
17618c0cf40fSJerome Brunet				reg = <0x0 0x01004 0x0 0x9c>;
17628c0cf40fSJerome Brunet				#reset-cells = <1>;
17638c0cf40fSJerome Brunet			};
17648c0cf40fSJerome Brunet
17658c0cf40fSJerome Brunet			gpio_intc: interrupt-controller@f080 {
1766cbddb02eSCarlo Caione				compatible = "amlogic,meson-axg-gpio-intc",
1767cbddb02eSCarlo Caione					     "amlogic,meson-gpio-intc";
17688c0cf40fSJerome Brunet				reg = <0x0 0xf080 0x0 0x10>;
17698c0cf40fSJerome Brunet				interrupt-controller;
17708c0cf40fSJerome Brunet				#interrupt-cells = <2>;
17718c0cf40fSJerome Brunet				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
17728c0cf40fSJerome Brunet			};
17738c0cf40fSJerome Brunet
17746f31ba17SCarlo Caione			watchdog@f0d0 {
17756f31ba17SCarlo Caione				compatible = "amlogic,meson-gxbb-wdt";
17766f31ba17SCarlo Caione				reg = <0x0 0xf0d0 0x0 0x10>;
17776f31ba17SCarlo Caione				clocks = <&xtal>;
17786f31ba17SCarlo Caione			};
17796f31ba17SCarlo Caione
17808c0cf40fSJerome Brunet			pwm_ab: pwm@1b000 {
17818c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ee-pwm";
17828c0cf40fSJerome Brunet				reg = <0x0 0x1b000 0x0 0x20>;
17838c0cf40fSJerome Brunet				#pwm-cells = <3>;
17848c0cf40fSJerome Brunet				status = "disabled";
17858c0cf40fSJerome Brunet			};
17868c0cf40fSJerome Brunet
17878c0cf40fSJerome Brunet			pwm_cd: pwm@1a000 {
17888c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ee-pwm";
17898c0cf40fSJerome Brunet				reg = <0x0 0x1a000 0x0 0x20>;
17908c0cf40fSJerome Brunet				#pwm-cells = <3>;
17918c0cf40fSJerome Brunet				status = "disabled";
17928c0cf40fSJerome Brunet			};
17938c0cf40fSJerome Brunet
17948c0cf40fSJerome Brunet			spicc0: spi@13000 {
17958c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-spicc";
17968c0cf40fSJerome Brunet				reg = <0x0 0x13000 0x0 0x3c>;
17978c0cf40fSJerome Brunet				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
17988c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SPICC0>;
17998c0cf40fSJerome Brunet				clock-names = "core";
18008c0cf40fSJerome Brunet				#address-cells = <1>;
18018c0cf40fSJerome Brunet				#size-cells = <0>;
18028c0cf40fSJerome Brunet				status = "disabled";
18038c0cf40fSJerome Brunet			};
18048c0cf40fSJerome Brunet
18058c0cf40fSJerome Brunet			spicc1: spi@15000 {
18068c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-spicc";
18078c0cf40fSJerome Brunet				reg = <0x0 0x15000 0x0 0x3c>;
18088c0cf40fSJerome Brunet				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
18098c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SPICC1>;
18108c0cf40fSJerome Brunet				clock-names = "core";
18118c0cf40fSJerome Brunet				#address-cells = <1>;
18128c0cf40fSJerome Brunet				#size-cells = <0>;
18138c0cf40fSJerome Brunet				status = "disabled";
18148c0cf40fSJerome Brunet			};
18158c0cf40fSJerome Brunet
1816fea888bdSJerome Brunet			clk_msr: clock-measure@18000 {
1817fea888bdSJerome Brunet				compatible = "amlogic,meson-axg-clk-measure";
1818fea888bdSJerome Brunet				reg = <0x0 0x18000 0x0 0x10>;
1819fea888bdSJerome Brunet			};
1820fea888bdSJerome Brunet
18218c0cf40fSJerome Brunet			i2c3: i2c@1c000 {
18228c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
18238c0cf40fSJerome Brunet				reg = <0x0 0x1c000 0x0 0x20>;
18248c0cf40fSJerome Brunet				interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
18258c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
18268c0cf40fSJerome Brunet				#address-cells = <1>;
18278c0cf40fSJerome Brunet				#size-cells = <0>;
18288c0cf40fSJerome Brunet				status = "disabled";
18298c0cf40fSJerome Brunet			};
18308c0cf40fSJerome Brunet
18318c0cf40fSJerome Brunet			i2c2: i2c@1d000 {
18328c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
18338c0cf40fSJerome Brunet				reg = <0x0 0x1d000 0x0 0x20>;
18348c0cf40fSJerome Brunet				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
18358c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
18368c0cf40fSJerome Brunet				#address-cells = <1>;
18378c0cf40fSJerome Brunet				#size-cells = <0>;
18388c0cf40fSJerome Brunet				status = "disabled";
18398c0cf40fSJerome Brunet			};
18408c0cf40fSJerome Brunet
18418c0cf40fSJerome Brunet			i2c1: i2c@1e000 {
18428c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
18438c0cf40fSJerome Brunet				reg = <0x0 0x1e000 0x0 0x20>;
18448c0cf40fSJerome Brunet				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
18458c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
18468c0cf40fSJerome Brunet				#address-cells = <1>;
18478c0cf40fSJerome Brunet				#size-cells = <0>;
18488c0cf40fSJerome Brunet				status = "disabled";
18498c0cf40fSJerome Brunet			};
18508c0cf40fSJerome Brunet
18518c0cf40fSJerome Brunet			i2c0: i2c@1f000 {
18528c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
18538c0cf40fSJerome Brunet				reg = <0x0 0x1f000 0x0 0x20>;
18548c0cf40fSJerome Brunet				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
18558c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
18568c0cf40fSJerome Brunet				#address-cells = <1>;
18578c0cf40fSJerome Brunet				#size-cells = <0>;
18588c0cf40fSJerome Brunet				status = "disabled";
18598c0cf40fSJerome Brunet			};
18608c0cf40fSJerome Brunet
18618c0cf40fSJerome Brunet			uart_B: serial@23000 {
18628c0cf40fSJerome Brunet				compatible = "amlogic,meson-gx-uart";
18638c0cf40fSJerome Brunet				reg = <0x0 0x23000 0x0 0x18>;
18648c0cf40fSJerome Brunet				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
18658c0cf40fSJerome Brunet				status = "disabled";
18668c0cf40fSJerome Brunet				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
18678c0cf40fSJerome Brunet				clock-names = "xtal", "pclk", "baud";
18688c0cf40fSJerome Brunet			};
18698c0cf40fSJerome Brunet
18708c0cf40fSJerome Brunet			uart_A: serial@24000 {
18718c0cf40fSJerome Brunet				compatible = "amlogic,meson-gx-uart";
18728c0cf40fSJerome Brunet				reg = <0x0 0x24000 0x0 0x18>;
18738c0cf40fSJerome Brunet				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
18748c0cf40fSJerome Brunet				status = "disabled";
18758c0cf40fSJerome Brunet				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
18768c0cf40fSJerome Brunet				clock-names = "xtal", "pclk", "baud";
18778c0cf40fSJerome Brunet			};
18788c0cf40fSJerome Brunet		};
18798c0cf40fSJerome Brunet
18808c0cf40fSJerome Brunet		apb: bus@ffe00000 {
18818c0cf40fSJerome Brunet			compatible = "simple-bus";
18828c0cf40fSJerome Brunet			reg = <0x0 0xffe00000 0x0 0x200000>;
18838c0cf40fSJerome Brunet			#address-cells = <2>;
18848c0cf40fSJerome Brunet			#size-cells = <2>;
18858c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
18868c0cf40fSJerome Brunet
18878c0cf40fSJerome Brunet			sd_emmc_b: sd@5000 {
18888c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-mmc";
18898c0cf40fSJerome Brunet				reg = <0x0 0x5000 0x0 0x800>;
18908c0cf40fSJerome Brunet				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
18918c0cf40fSJerome Brunet				status = "disabled";
18928c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SD_EMMC_B>,
18938c0cf40fSJerome Brunet					<&clkc CLKID_SD_EMMC_B_CLK0>,
18948c0cf40fSJerome Brunet					<&clkc CLKID_FCLK_DIV2>;
18958c0cf40fSJerome Brunet				clock-names = "core", "clkin0", "clkin1";
18968c0cf40fSJerome Brunet				resets = <&reset RESET_SD_EMMC_B>;
18978c0cf40fSJerome Brunet			};
18988c0cf40fSJerome Brunet
18998c0cf40fSJerome Brunet			sd_emmc_c: mmc@7000 {
19008c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-mmc";
19018c0cf40fSJerome Brunet				reg = <0x0 0x7000 0x0 0x800>;
19028c0cf40fSJerome Brunet				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
19038c0cf40fSJerome Brunet				status = "disabled";
19048c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SD_EMMC_C>,
19058c0cf40fSJerome Brunet					<&clkc CLKID_SD_EMMC_C_CLK0>,
19068c0cf40fSJerome Brunet					<&clkc CLKID_FCLK_DIV2>;
19078c0cf40fSJerome Brunet				clock-names = "core", "clkin0", "clkin1";
19088c0cf40fSJerome Brunet				resets = <&reset RESET_SD_EMMC_C>;
19098c0cf40fSJerome Brunet			};
19101b208babSNeil Armstrong
19111b208babSNeil Armstrong			usb2_phy1: phy@9020 {
19121b208babSNeil Armstrong				compatible = "amlogic,meson-gxl-usb2-phy";
19131b208babSNeil Armstrong				#phy-cells = <0>;
19141b208babSNeil Armstrong				reg = <0x0 0x9020 0x0 0x20>;
19151b208babSNeil Armstrong				clocks = <&clkc CLKID_USB>;
19161b208babSNeil Armstrong				clock-names = "phy";
19171b208babSNeil Armstrong				resets = <&reset RESET_USB_OTG>;
19181b208babSNeil Armstrong				reset-names = "phy";
19191b208babSNeil Armstrong			};
19208c0cf40fSJerome Brunet		};
19218c0cf40fSJerome Brunet
19228c0cf40fSJerome Brunet		sram: sram@fffc0000 {
19239ecded10SNeil Armstrong			compatible = "mmio-sram";
19248c0cf40fSJerome Brunet			reg = <0x0 0xfffc0000 0x0 0x20000>;
19258c0cf40fSJerome Brunet			#address-cells = <1>;
19268c0cf40fSJerome Brunet			#size-cells = <1>;
19278c0cf40fSJerome Brunet			ranges = <0 0x0 0xfffc0000 0x20000>;
19288c0cf40fSJerome Brunet
19299ecded10SNeil Armstrong			cpu_scp_lpri: scp-sram@13000 {
19308c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-scp-shmem";
19318c0cf40fSJerome Brunet				reg = <0x13000 0x400>;
19328c0cf40fSJerome Brunet			};
19338c0cf40fSJerome Brunet
19349ecded10SNeil Armstrong			cpu_scp_hpri: scp-sram@13400 {
19358c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-scp-shmem";
19368c0cf40fSJerome Brunet				reg = <0x13400 0x400>;
19378c0cf40fSJerome Brunet			};
19388c0cf40fSJerome Brunet		};
19398c0cf40fSJerome Brunet	};
19408c0cf40fSJerome Brunet
19418c0cf40fSJerome Brunet	timer {
19428c0cf40fSJerome Brunet		compatible = "arm,armv8-timer";
19438c0cf40fSJerome Brunet		interrupts = <GIC_PPI 13
19448c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
19458c0cf40fSJerome Brunet			     <GIC_PPI 14
19468c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
19478c0cf40fSJerome Brunet			     <GIC_PPI 11
19488c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
19498c0cf40fSJerome Brunet			     <GIC_PPI 10
19508c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
19518c0cf40fSJerome Brunet	};
19528c0cf40fSJerome Brunet
19538c0cf40fSJerome Brunet	xtal: xtal-clk {
19548c0cf40fSJerome Brunet		compatible = "fixed-clock";
19558c0cf40fSJerome Brunet		clock-frequency = <24000000>;
19568c0cf40fSJerome Brunet		clock-output-names = "xtal";
19578c0cf40fSJerome Brunet		#clock-cells = <0>;
19589d59b708SYixun Lan	};
19599d59b708SYixun Lan};
1960