1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 29d59b708SYixun Lan/* 39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved. 49d59b708SYixun Lan */ 59d59b708SYixun Lan 68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h> 78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h> 806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h> 98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h> 10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h> 118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h> 128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h> 13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h> 159d59b708SYixun Lan 169d59b708SYixun Lan/ { 179d59b708SYixun Lan compatible = "amlogic,meson-axg"; 189d59b708SYixun Lan 199d59b708SYixun Lan interrupt-parent = <&gic>; 209d59b708SYixun Lan #address-cells = <2>; 219d59b708SYixun Lan #size-cells = <2>; 229d59b708SYixun Lan 23fbd5cbc5SJerome Brunet tdmif_a: audio-controller-0 { 248c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 258c0cf40fSJerome Brunet #sound-dai-cells = <0>; 268c0cf40fSJerome Brunet sound-name-prefix = "TDM_A"; 278c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, 288c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_SCLK>, 298c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_LRCLK>; 308c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 318c0cf40fSJerome Brunet status = "disabled"; 329d59b708SYixun Lan }; 339d59b708SYixun Lan 34fbd5cbc5SJerome Brunet tdmif_b: audio-controller-1 { 358c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 368c0cf40fSJerome Brunet #sound-dai-cells = <0>; 378c0cf40fSJerome Brunet sound-name-prefix = "TDM_B"; 388c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, 398c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_SCLK>, 408c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_LRCLK>; 418c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 428c0cf40fSJerome Brunet status = "disabled"; 439d59b708SYixun Lan }; 448c0cf40fSJerome Brunet 45fbd5cbc5SJerome Brunet tdmif_c: audio-controller-2 { 468c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 478c0cf40fSJerome Brunet #sound-dai-cells = <0>; 488c0cf40fSJerome Brunet sound-name-prefix = "TDM_C"; 498c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, 508c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_SCLK>, 518c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_LRCLK>; 528c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 538c0cf40fSJerome Brunet status = "disabled"; 548c0cf40fSJerome Brunet }; 558c0cf40fSJerome Brunet 568c0cf40fSJerome Brunet arm-pmu { 578c0cf40fSJerome Brunet compatible = "arm,cortex-a53-pmu"; 588c0cf40fSJerome Brunet interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 598c0cf40fSJerome Brunet <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 608c0cf40fSJerome Brunet <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 618c0cf40fSJerome Brunet <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 628c0cf40fSJerome Brunet interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 639d59b708SYixun Lan }; 649d59b708SYixun Lan 659d59b708SYixun Lan cpus { 669d59b708SYixun Lan #address-cells = <0x2>; 679d59b708SYixun Lan #size-cells = <0x0>; 689d59b708SYixun Lan 699d59b708SYixun Lan cpu0: cpu@0 { 709d59b708SYixun Lan device_type = "cpu"; 7131af04cdSRob Herring compatible = "arm,cortex-a53"; 729d59b708SYixun Lan reg = <0x0 0x0>; 739d59b708SYixun Lan enable-method = "psci"; 749d59b708SYixun Lan next-level-cache = <&l2>; 752c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 769d59b708SYixun Lan }; 779d59b708SYixun Lan 789d59b708SYixun Lan cpu1: cpu@1 { 799d59b708SYixun Lan device_type = "cpu"; 8031af04cdSRob Herring compatible = "arm,cortex-a53"; 819d59b708SYixun Lan reg = <0x0 0x1>; 829d59b708SYixun Lan enable-method = "psci"; 839d59b708SYixun Lan next-level-cache = <&l2>; 842c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 859d59b708SYixun Lan }; 869d59b708SYixun Lan 879d59b708SYixun Lan cpu2: cpu@2 { 889d59b708SYixun Lan device_type = "cpu"; 8931af04cdSRob Herring compatible = "arm,cortex-a53"; 909d59b708SYixun Lan reg = <0x0 0x2>; 919d59b708SYixun Lan enable-method = "psci"; 929d59b708SYixun Lan next-level-cache = <&l2>; 932c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 949d59b708SYixun Lan }; 959d59b708SYixun Lan 969d59b708SYixun Lan cpu3: cpu@3 { 979d59b708SYixun Lan device_type = "cpu"; 9831af04cdSRob Herring compatible = "arm,cortex-a53"; 999d59b708SYixun Lan reg = <0x0 0x3>; 1009d59b708SYixun Lan enable-method = "psci"; 1019d59b708SYixun Lan next-level-cache = <&l2>; 1022c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 1039d59b708SYixun Lan }; 1049d59b708SYixun Lan 1059d59b708SYixun Lan l2: l2-cache0 { 1069d59b708SYixun Lan compatible = "cache"; 1079d59b708SYixun Lan }; 1089d59b708SYixun Lan }; 1099d59b708SYixun Lan 11096dc5702SJerome Brunet sm: secure-monitor { 11196dc5702SJerome Brunet compatible = "amlogic,meson-gxbb-sm"; 11296dc5702SJerome Brunet }; 11396dc5702SJerome Brunet 1149ab2d15cSJerome Brunet efuse: efuse { 1159ab2d15cSJerome Brunet compatible = "amlogic,meson-gxbb-efuse"; 1169ab2d15cSJerome Brunet clocks = <&clkc CLKID_EFUSE>; 1179ab2d15cSJerome Brunet #address-cells = <1>; 1189ab2d15cSJerome Brunet #size-cells = <1>; 1199ab2d15cSJerome Brunet read-only; 1209ab2d15cSJerome Brunet }; 1219ab2d15cSJerome Brunet 1229d59b708SYixun Lan psci { 1239d59b708SYixun Lan compatible = "arm,psci-1.0"; 1249d59b708SYixun Lan method = "smc"; 1259d59b708SYixun Lan }; 1269d59b708SYixun Lan 1278c0cf40fSJerome Brunet reserved-memory { 1288c0cf40fSJerome Brunet #address-cells = <2>; 1298c0cf40fSJerome Brunet #size-cells = <2>; 1308c0cf40fSJerome Brunet ranges; 1318c0cf40fSJerome Brunet 1328c0cf40fSJerome Brunet /* 16 MiB reserved for Hardware ROM Firmware */ 1338c0cf40fSJerome Brunet hwrom_reserved: hwrom@0 { 1348c0cf40fSJerome Brunet reg = <0x0 0x0 0x0 0x1000000>; 1358c0cf40fSJerome Brunet no-map; 13608307aabSJerome Brunet }; 13708307aabSJerome Brunet 1388c0cf40fSJerome Brunet /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 1398c0cf40fSJerome Brunet secmon_reserved: secmon@5000000 { 1408c0cf40fSJerome Brunet reg = <0x0 0x05000000 0x0 0x300000>; 1418c0cf40fSJerome Brunet no-map; 14208307aabSJerome Brunet }; 1435e395e14SYixun Lan }; 1445e395e14SYixun Lan 1452c130695SJerome Brunet scpi { 1462c130695SJerome Brunet compatible = "arm,scpi-pre-1.0"; 1472c130695SJerome Brunet mboxes = <&mailbox 1 &mailbox 2>; 1482c130695SJerome Brunet shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 1492c130695SJerome Brunet 1502c130695SJerome Brunet scpi_clocks: clocks { 1512c130695SJerome Brunet compatible = "arm,scpi-clocks"; 1522c130695SJerome Brunet 1532c130695SJerome Brunet scpi_dvfs: clock-controller { 1542c130695SJerome Brunet compatible = "arm,scpi-dvfs-clocks"; 1552c130695SJerome Brunet #clock-cells = <1>; 1562c130695SJerome Brunet clock-indices = <0>; 1572c130695SJerome Brunet clock-output-names = "vcpu"; 1582c130695SJerome Brunet }; 1592c130695SJerome Brunet }; 1602c130695SJerome Brunet 1612c130695SJerome Brunet scpi_sensors: sensors { 1622c130695SJerome Brunet compatible = "amlogic,meson-gxbb-scpi-sensors"; 1632c130695SJerome Brunet #thermal-sensor-cells = <1>; 1642c130695SJerome Brunet }; 1652c130695SJerome Brunet }; 1662c130695SJerome Brunet 1679d59b708SYixun Lan soc { 1689d59b708SYixun Lan compatible = "simple-bus"; 1699d59b708SYixun Lan #address-cells = <2>; 1709d59b708SYixun Lan #size-cells = <2>; 1719d59b708SYixun Lan ranges; 1729d59b708SYixun Lan 1738c0cf40fSJerome Brunet ethmac: ethernet@ff3f0000 { 1749d63f5d1SJerome Brunet compatible = "amlogic,meson-axg-dwmac", 1759d63f5d1SJerome Brunet "snps,dwmac-3.70a", 1769d63f5d1SJerome Brunet "snps,dwmac"; 1778c0cf40fSJerome Brunet reg = <0x0 0xff3f0000 0x0 0x10000 1788c0cf40fSJerome Brunet 0x0 0xff634540 0x0 0x8>; 1798b3e6f89SCarlo Caione interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 1808c0cf40fSJerome Brunet interrupt-names = "macirq"; 1818c0cf40fSJerome Brunet clocks = <&clkc CLKID_ETH>, 1828c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>, 1838c0cf40fSJerome Brunet <&clkc CLKID_MPLL2>; 1848c0cf40fSJerome Brunet clock-names = "stmmaceth", "clkin0", "clkin1"; 1858c0cf40fSJerome Brunet status = "disabled"; 1868c0cf40fSJerome Brunet }; 1878c0cf40fSJerome Brunet 188c362e4e0SJerome Brunet pdm: audio-controller@ff632000 { 189c362e4e0SJerome Brunet compatible = "amlogic,axg-pdm"; 190c362e4e0SJerome Brunet reg = <0x0 0xff632000 0x0 0x34>; 191c362e4e0SJerome Brunet #sound-dai-cells = <0>; 192c362e4e0SJerome Brunet sound-name-prefix = "PDM"; 193c362e4e0SJerome Brunet clocks = <&clkc_audio AUD_CLKID_PDM>, 194c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_DCLK>, 195c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_SYSCLK>; 196c362e4e0SJerome Brunet clock-names = "pclk", "dclk", "sysclk"; 197c362e4e0SJerome Brunet status = "disabled"; 198c362e4e0SJerome Brunet }; 199c362e4e0SJerome Brunet 2008c0cf40fSJerome Brunet periphs: bus@ff634000 { 201221cf34bSNan Li compatible = "simple-bus"; 2028c0cf40fSJerome Brunet reg = <0x0 0xff634000 0x0 0x2000>; 203221cf34bSNan Li #address-cells = <2>; 204221cf34bSNan Li #size-cells = <2>; 2058c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; 206221cf34bSNan Li 2078c0cf40fSJerome Brunet hwrng: rng@18 { 2088c0cf40fSJerome Brunet compatible = "amlogic,meson-rng"; 2098c0cf40fSJerome Brunet reg = <0x0 0x18 0x0 0x4>; 2108c0cf40fSJerome Brunet clocks = <&clkc CLKID_RNG0>; 2118c0cf40fSJerome Brunet clock-names = "core"; 212221cf34bSNan Li }; 213221cf34bSNan Li 2148c0cf40fSJerome Brunet pinctrl_periphs: pinctrl@480 { 2158c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-periphs-pinctrl"; 2168c0cf40fSJerome Brunet #address-cells = <2>; 2178c0cf40fSJerome Brunet #size-cells = <2>; 2188c0cf40fSJerome Brunet ranges; 2198c0cf40fSJerome Brunet 2208c0cf40fSJerome Brunet gpio: bank@480 { 2218c0cf40fSJerome Brunet reg = <0x0 0x00480 0x0 0x40>, 2228c0cf40fSJerome Brunet <0x0 0x004e8 0x0 0x14>, 2238c0cf40fSJerome Brunet <0x0 0x00520 0x0 0x14>, 2248c0cf40fSJerome Brunet <0x0 0x00430 0x0 0x3c>; 2258c0cf40fSJerome Brunet reg-names = "mux", "pull", "pull-enable", "gpio"; 2268c0cf40fSJerome Brunet gpio-controller; 2278c0cf40fSJerome Brunet #gpio-cells = <2>; 2288c0cf40fSJerome Brunet gpio-ranges = <&pinctrl_periphs 0 0 86>; 229221cf34bSNan Li }; 2308c0cf40fSJerome Brunet 2318c0cf40fSJerome Brunet i2c0_pins: i2c0 { 2328c0cf40fSJerome Brunet mux { 2338c0cf40fSJerome Brunet groups = "i2c0_sck", 2348c0cf40fSJerome Brunet "i2c0_sda"; 2358c0cf40fSJerome Brunet function = "i2c0"; 2361c5cc1c8SJerome Brunet bias-disable; 2378c0cf40fSJerome Brunet }; 2388c0cf40fSJerome Brunet }; 2398c0cf40fSJerome Brunet 2408c0cf40fSJerome Brunet i2c1_x_pins: i2c1_x { 2418c0cf40fSJerome Brunet mux { 2428c0cf40fSJerome Brunet groups = "i2c1_sck_x", 2438c0cf40fSJerome Brunet "i2c1_sda_x"; 2448c0cf40fSJerome Brunet function = "i2c1"; 2451c5cc1c8SJerome Brunet bias-disable; 2468c0cf40fSJerome Brunet }; 2478c0cf40fSJerome Brunet }; 2488c0cf40fSJerome Brunet 2498c0cf40fSJerome Brunet i2c1_z_pins: i2c1_z { 2508c0cf40fSJerome Brunet mux { 2518c0cf40fSJerome Brunet groups = "i2c1_sck_z", 2528c0cf40fSJerome Brunet "i2c1_sda_z"; 2538c0cf40fSJerome Brunet function = "i2c1"; 2541c5cc1c8SJerome Brunet bias-disable; 2558c0cf40fSJerome Brunet }; 2568c0cf40fSJerome Brunet }; 2578c0cf40fSJerome Brunet 2588c0cf40fSJerome Brunet i2c2_a_pins: i2c2_a { 2598c0cf40fSJerome Brunet mux { 2608c0cf40fSJerome Brunet groups = "i2c2_sck_a", 2618c0cf40fSJerome Brunet "i2c2_sda_a"; 2628c0cf40fSJerome Brunet function = "i2c2"; 2631c5cc1c8SJerome Brunet bias-disable; 2648c0cf40fSJerome Brunet }; 2658c0cf40fSJerome Brunet }; 2668c0cf40fSJerome Brunet 2678c0cf40fSJerome Brunet i2c2_x_pins: i2c2_x { 2688c0cf40fSJerome Brunet mux { 2698c0cf40fSJerome Brunet groups = "i2c2_sck_x", 2708c0cf40fSJerome Brunet "i2c2_sda_x"; 2718c0cf40fSJerome Brunet function = "i2c2"; 2721c5cc1c8SJerome Brunet bias-disable; 2738c0cf40fSJerome Brunet }; 2748c0cf40fSJerome Brunet }; 2758c0cf40fSJerome Brunet 2768c0cf40fSJerome Brunet i2c3_a6_pins: i2c3_a6 { 2778c0cf40fSJerome Brunet mux { 2788c0cf40fSJerome Brunet groups = "i2c3_sda_a6", 2798c0cf40fSJerome Brunet "i2c3_sck_a7"; 2808c0cf40fSJerome Brunet function = "i2c3"; 2811c5cc1c8SJerome Brunet bias-disable; 2828c0cf40fSJerome Brunet }; 2838c0cf40fSJerome Brunet }; 2848c0cf40fSJerome Brunet 2858c0cf40fSJerome Brunet i2c3_a12_pins: i2c3_a12 { 2868c0cf40fSJerome Brunet mux { 2878c0cf40fSJerome Brunet groups = "i2c3_sda_a12", 2888c0cf40fSJerome Brunet "i2c3_sck_a13"; 2898c0cf40fSJerome Brunet function = "i2c3"; 2901c5cc1c8SJerome Brunet bias-disable; 2918c0cf40fSJerome Brunet }; 2928c0cf40fSJerome Brunet }; 2938c0cf40fSJerome Brunet 2948c0cf40fSJerome Brunet i2c3_a19_pins: i2c3_a19 { 2958c0cf40fSJerome Brunet mux { 2968c0cf40fSJerome Brunet groups = "i2c3_sda_a19", 2978c0cf40fSJerome Brunet "i2c3_sck_a20"; 2988c0cf40fSJerome Brunet function = "i2c3"; 2991c5cc1c8SJerome Brunet bias-disable; 3008c0cf40fSJerome Brunet }; 3018c0cf40fSJerome Brunet }; 3028c0cf40fSJerome Brunet 3038c0cf40fSJerome Brunet emmc_pins: emmc { 304b43033b1SJerome Brunet mux-0 { 3058c0cf40fSJerome Brunet groups = "emmc_nand_d0", 3068c0cf40fSJerome Brunet "emmc_nand_d1", 3078c0cf40fSJerome Brunet "emmc_nand_d2", 3088c0cf40fSJerome Brunet "emmc_nand_d3", 3098c0cf40fSJerome Brunet "emmc_nand_d4", 3108c0cf40fSJerome Brunet "emmc_nand_d5", 3118c0cf40fSJerome Brunet "emmc_nand_d6", 3128c0cf40fSJerome Brunet "emmc_nand_d7", 313b43033b1SJerome Brunet "emmc_cmd"; 314b43033b1SJerome Brunet function = "emmc"; 315b43033b1SJerome Brunet bias-pull-up; 316b43033b1SJerome Brunet }; 317b43033b1SJerome Brunet 318b43033b1SJerome Brunet mux-1 { 319b43033b1SJerome Brunet groups = "emmc_clk"; 3208c0cf40fSJerome Brunet function = "emmc"; 32196a13691SJerome Brunet bias-disable; 3228c0cf40fSJerome Brunet }; 3238c0cf40fSJerome Brunet }; 3248c0cf40fSJerome Brunet 325b43033b1SJerome Brunet emmc_ds_pins: emmc_ds { 326b43033b1SJerome Brunet mux { 327b43033b1SJerome Brunet groups = "emmc_ds"; 328b43033b1SJerome Brunet function = "emmc"; 329b43033b1SJerome Brunet bias-pull-down; 330b43033b1SJerome Brunet }; 331b43033b1SJerome Brunet }; 332b43033b1SJerome Brunet 3338c0cf40fSJerome Brunet emmc_clk_gate_pins: emmc_clk_gate { 3348c0cf40fSJerome Brunet mux { 3358c0cf40fSJerome Brunet groups = "BOOT_8"; 3368c0cf40fSJerome Brunet function = "gpio_periphs"; 3378c0cf40fSJerome Brunet bias-pull-down; 3388c0cf40fSJerome Brunet }; 3398c0cf40fSJerome Brunet }; 3408c0cf40fSJerome Brunet 3418c0cf40fSJerome Brunet eth_rgmii_x_pins: eth-x-rgmii { 3428c0cf40fSJerome Brunet mux { 3438c0cf40fSJerome Brunet groups = "eth_mdio_x", 3448c0cf40fSJerome Brunet "eth_mdc_x", 3458c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 3468c0cf40fSJerome Brunet "eth_rx_dv_x", 3478c0cf40fSJerome Brunet "eth_rxd0_x", 3488c0cf40fSJerome Brunet "eth_rxd1_x", 3498c0cf40fSJerome Brunet "eth_rxd2_rgmii", 3508c0cf40fSJerome Brunet "eth_rxd3_rgmii", 3518c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 3528c0cf40fSJerome Brunet "eth_txen_x", 3538c0cf40fSJerome Brunet "eth_txd0_x", 3548c0cf40fSJerome Brunet "eth_txd1_x", 3558c0cf40fSJerome Brunet "eth_txd2_rgmii", 3568c0cf40fSJerome Brunet "eth_txd3_rgmii"; 3578c0cf40fSJerome Brunet function = "eth"; 3581c5cc1c8SJerome Brunet bias-disable; 3598c0cf40fSJerome Brunet }; 3608c0cf40fSJerome Brunet }; 3618c0cf40fSJerome Brunet 3628c0cf40fSJerome Brunet eth_rgmii_y_pins: eth-y-rgmii { 3638c0cf40fSJerome Brunet mux { 3648c0cf40fSJerome Brunet groups = "eth_mdio_y", 3658c0cf40fSJerome Brunet "eth_mdc_y", 3668c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 3678c0cf40fSJerome Brunet "eth_rx_dv_y", 3688c0cf40fSJerome Brunet "eth_rxd0_y", 3698c0cf40fSJerome Brunet "eth_rxd1_y", 3708c0cf40fSJerome Brunet "eth_rxd2_rgmii", 3718c0cf40fSJerome Brunet "eth_rxd3_rgmii", 3728c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 3738c0cf40fSJerome Brunet "eth_txen_y", 3748c0cf40fSJerome Brunet "eth_txd0_y", 3758c0cf40fSJerome Brunet "eth_txd1_y", 3768c0cf40fSJerome Brunet "eth_txd2_rgmii", 3778c0cf40fSJerome Brunet "eth_txd3_rgmii"; 3788c0cf40fSJerome Brunet function = "eth"; 3791c5cc1c8SJerome Brunet bias-disable; 3808c0cf40fSJerome Brunet }; 3818c0cf40fSJerome Brunet }; 3828c0cf40fSJerome Brunet 3838c0cf40fSJerome Brunet eth_rmii_x_pins: eth-x-rmii { 3848c0cf40fSJerome Brunet mux { 3858c0cf40fSJerome Brunet groups = "eth_mdio_x", 3868c0cf40fSJerome Brunet "eth_mdc_x", 3878c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 3888c0cf40fSJerome Brunet "eth_rx_dv_x", 3898c0cf40fSJerome Brunet "eth_rxd0_x", 3908c0cf40fSJerome Brunet "eth_rxd1_x", 3918c0cf40fSJerome Brunet "eth_txen_x", 3928c0cf40fSJerome Brunet "eth_txd0_x", 3938c0cf40fSJerome Brunet "eth_txd1_x"; 3948c0cf40fSJerome Brunet function = "eth"; 3951c5cc1c8SJerome Brunet bias-disable; 3968c0cf40fSJerome Brunet }; 3978c0cf40fSJerome Brunet }; 3988c0cf40fSJerome Brunet 3998c0cf40fSJerome Brunet eth_rmii_y_pins: eth-y-rmii { 4008c0cf40fSJerome Brunet mux { 4018c0cf40fSJerome Brunet groups = "eth_mdio_y", 4028c0cf40fSJerome Brunet "eth_mdc_y", 4038c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4048c0cf40fSJerome Brunet "eth_rx_dv_y", 4058c0cf40fSJerome Brunet "eth_rxd0_y", 4068c0cf40fSJerome Brunet "eth_rxd1_y", 4078c0cf40fSJerome Brunet "eth_txen_y", 4088c0cf40fSJerome Brunet "eth_txd0_y", 4098c0cf40fSJerome Brunet "eth_txd1_y"; 4108c0cf40fSJerome Brunet function = "eth"; 4111c5cc1c8SJerome Brunet bias-disable; 4128c0cf40fSJerome Brunet }; 4138c0cf40fSJerome Brunet }; 4148c0cf40fSJerome Brunet 4158c0cf40fSJerome Brunet mclk_b_pins: mclk_b { 4168c0cf40fSJerome Brunet mux { 4178c0cf40fSJerome Brunet groups = "mclk_b"; 4188c0cf40fSJerome Brunet function = "mclk_b"; 4191c5cc1c8SJerome Brunet bias-disable; 4208c0cf40fSJerome Brunet }; 4218c0cf40fSJerome Brunet }; 4228c0cf40fSJerome Brunet 4238c0cf40fSJerome Brunet mclk_c_pins: mclk_c { 4248c0cf40fSJerome Brunet mux { 4258c0cf40fSJerome Brunet groups = "mclk_c"; 4268c0cf40fSJerome Brunet function = "mclk_c"; 4271c5cc1c8SJerome Brunet bias-disable; 4288c0cf40fSJerome Brunet }; 4298c0cf40fSJerome Brunet }; 4308c0cf40fSJerome Brunet 4318c0cf40fSJerome Brunet pdm_dclk_a14_pins: pdm_dclk_a14 { 4328c0cf40fSJerome Brunet mux { 4338c0cf40fSJerome Brunet groups = "pdm_dclk_a14"; 4348c0cf40fSJerome Brunet function = "pdm"; 4351c5cc1c8SJerome Brunet bias-disable; 4368c0cf40fSJerome Brunet }; 4378c0cf40fSJerome Brunet }; 4388c0cf40fSJerome Brunet 4398c0cf40fSJerome Brunet pdm_dclk_a19_pins: pdm_dclk_a19 { 4408c0cf40fSJerome Brunet mux { 4418c0cf40fSJerome Brunet groups = "pdm_dclk_a19"; 4428c0cf40fSJerome Brunet function = "pdm"; 4431c5cc1c8SJerome Brunet bias-disable; 4448c0cf40fSJerome Brunet }; 4458c0cf40fSJerome Brunet }; 4468c0cf40fSJerome Brunet 4478c0cf40fSJerome Brunet pdm_din0_pins: pdm_din0 { 4488c0cf40fSJerome Brunet mux { 4498c0cf40fSJerome Brunet groups = "pdm_din0"; 4508c0cf40fSJerome Brunet function = "pdm"; 4511c5cc1c8SJerome Brunet bias-disable; 4528c0cf40fSJerome Brunet }; 4538c0cf40fSJerome Brunet }; 4548c0cf40fSJerome Brunet 4558c0cf40fSJerome Brunet pdm_din1_pins: pdm_din1 { 4568c0cf40fSJerome Brunet mux { 4578c0cf40fSJerome Brunet groups = "pdm_din1"; 4588c0cf40fSJerome Brunet function = "pdm"; 4591c5cc1c8SJerome Brunet bias-disable; 4608c0cf40fSJerome Brunet }; 4618c0cf40fSJerome Brunet }; 4628c0cf40fSJerome Brunet 4638c0cf40fSJerome Brunet pdm_din2_pins: pdm_din2 { 4648c0cf40fSJerome Brunet mux { 4658c0cf40fSJerome Brunet groups = "pdm_din2"; 4668c0cf40fSJerome Brunet function = "pdm"; 4671c5cc1c8SJerome Brunet bias-disable; 4688c0cf40fSJerome Brunet }; 4698c0cf40fSJerome Brunet }; 4708c0cf40fSJerome Brunet 4718c0cf40fSJerome Brunet pdm_din3_pins: pdm_din3 { 4728c0cf40fSJerome Brunet mux { 4738c0cf40fSJerome Brunet groups = "pdm_din3"; 4748c0cf40fSJerome Brunet function = "pdm"; 4751c5cc1c8SJerome Brunet bias-disable; 4768c0cf40fSJerome Brunet }; 4778c0cf40fSJerome Brunet }; 4788c0cf40fSJerome Brunet 4798c0cf40fSJerome Brunet pwm_a_a_pins: pwm_a_a { 4808c0cf40fSJerome Brunet mux { 4818c0cf40fSJerome Brunet groups = "pwm_a_a"; 4828c0cf40fSJerome Brunet function = "pwm_a"; 4831c5cc1c8SJerome Brunet bias-disable; 4848c0cf40fSJerome Brunet }; 4858c0cf40fSJerome Brunet }; 4868c0cf40fSJerome Brunet 4878c0cf40fSJerome Brunet pwm_a_x18_pins: pwm_a_x18 { 4888c0cf40fSJerome Brunet mux { 4898c0cf40fSJerome Brunet groups = "pwm_a_x18"; 4908c0cf40fSJerome Brunet function = "pwm_a"; 4911c5cc1c8SJerome Brunet bias-disable; 4928c0cf40fSJerome Brunet }; 4938c0cf40fSJerome Brunet }; 4948c0cf40fSJerome Brunet 4958c0cf40fSJerome Brunet pwm_a_x20_pins: pwm_a_x20 { 4968c0cf40fSJerome Brunet mux { 4978c0cf40fSJerome Brunet groups = "pwm_a_x20"; 4988c0cf40fSJerome Brunet function = "pwm_a"; 4991c5cc1c8SJerome Brunet bias-disable; 5008c0cf40fSJerome Brunet }; 5018c0cf40fSJerome Brunet }; 5028c0cf40fSJerome Brunet 5038c0cf40fSJerome Brunet pwm_a_z_pins: pwm_a_z { 5048c0cf40fSJerome Brunet mux { 5058c0cf40fSJerome Brunet groups = "pwm_a_z"; 5068c0cf40fSJerome Brunet function = "pwm_a"; 5071c5cc1c8SJerome Brunet bias-disable; 5088c0cf40fSJerome Brunet }; 5098c0cf40fSJerome Brunet }; 5108c0cf40fSJerome Brunet 5118c0cf40fSJerome Brunet pwm_b_a_pins: pwm_b_a { 5128c0cf40fSJerome Brunet mux { 5138c0cf40fSJerome Brunet groups = "pwm_b_a"; 5148c0cf40fSJerome Brunet function = "pwm_b"; 5151c5cc1c8SJerome Brunet bias-disable; 5168c0cf40fSJerome Brunet }; 5178c0cf40fSJerome Brunet }; 5188c0cf40fSJerome Brunet 5198c0cf40fSJerome Brunet pwm_b_x_pins: pwm_b_x { 5208c0cf40fSJerome Brunet mux { 5218c0cf40fSJerome Brunet groups = "pwm_b_x"; 5228c0cf40fSJerome Brunet function = "pwm_b"; 5231c5cc1c8SJerome Brunet bias-disable; 5248c0cf40fSJerome Brunet }; 5258c0cf40fSJerome Brunet }; 5268c0cf40fSJerome Brunet 5278c0cf40fSJerome Brunet pwm_b_z_pins: pwm_b_z { 5288c0cf40fSJerome Brunet mux { 5298c0cf40fSJerome Brunet groups = "pwm_b_z"; 5308c0cf40fSJerome Brunet function = "pwm_b"; 5311c5cc1c8SJerome Brunet bias-disable; 5328c0cf40fSJerome Brunet }; 5338c0cf40fSJerome Brunet }; 5348c0cf40fSJerome Brunet 5358c0cf40fSJerome Brunet pwm_c_a_pins: pwm_c_a { 5368c0cf40fSJerome Brunet mux { 5378c0cf40fSJerome Brunet groups = "pwm_c_a"; 5388c0cf40fSJerome Brunet function = "pwm_c"; 5391c5cc1c8SJerome Brunet bias-disable; 5408c0cf40fSJerome Brunet }; 5418c0cf40fSJerome Brunet }; 5428c0cf40fSJerome Brunet 5438c0cf40fSJerome Brunet pwm_c_x10_pins: pwm_c_x10 { 5448c0cf40fSJerome Brunet mux { 5458c0cf40fSJerome Brunet groups = "pwm_c_x10"; 5468c0cf40fSJerome Brunet function = "pwm_c"; 5471c5cc1c8SJerome Brunet bias-disable; 5488c0cf40fSJerome Brunet }; 5498c0cf40fSJerome Brunet }; 5508c0cf40fSJerome Brunet 5518c0cf40fSJerome Brunet pwm_c_x17_pins: pwm_c_x17 { 5528c0cf40fSJerome Brunet mux { 5538c0cf40fSJerome Brunet groups = "pwm_c_x17"; 5548c0cf40fSJerome Brunet function = "pwm_c"; 5551c5cc1c8SJerome Brunet bias-disable; 5568c0cf40fSJerome Brunet }; 5578c0cf40fSJerome Brunet }; 5588c0cf40fSJerome Brunet 5598c0cf40fSJerome Brunet pwm_d_x11_pins: pwm_d_x11 { 5608c0cf40fSJerome Brunet mux { 5618c0cf40fSJerome Brunet groups = "pwm_d_x11"; 5628c0cf40fSJerome Brunet function = "pwm_d"; 5631c5cc1c8SJerome Brunet bias-disable; 5648c0cf40fSJerome Brunet }; 5658c0cf40fSJerome Brunet }; 5668c0cf40fSJerome Brunet 5678c0cf40fSJerome Brunet pwm_d_x16_pins: pwm_d_x16 { 5688c0cf40fSJerome Brunet mux { 5698c0cf40fSJerome Brunet groups = "pwm_d_x16"; 5708c0cf40fSJerome Brunet function = "pwm_d"; 5711c5cc1c8SJerome Brunet bias-disable; 5728c0cf40fSJerome Brunet }; 5738c0cf40fSJerome Brunet }; 5748c0cf40fSJerome Brunet 5758c0cf40fSJerome Brunet sdio_pins: sdio { 576b43033b1SJerome Brunet mux-0 { 5778c0cf40fSJerome Brunet groups = "sdio_d0", 5788c0cf40fSJerome Brunet "sdio_d1", 5798c0cf40fSJerome Brunet "sdio_d2", 5808c0cf40fSJerome Brunet "sdio_d3", 581b43033b1SJerome Brunet "sdio_cmd"; 582b43033b1SJerome Brunet function = "sdio"; 583b43033b1SJerome Brunet bias-pull-up; 584b43033b1SJerome Brunet }; 585b43033b1SJerome Brunet 586b43033b1SJerome Brunet mux-1 { 587b43033b1SJerome Brunet groups = "sdio_clk"; 5888c0cf40fSJerome Brunet function = "sdio"; 58996a13691SJerome Brunet bias-disable; 5908c0cf40fSJerome Brunet }; 5918c0cf40fSJerome Brunet }; 5928c0cf40fSJerome Brunet 5938c0cf40fSJerome Brunet sdio_clk_gate_pins: sdio_clk_gate { 5948c0cf40fSJerome Brunet mux { 5958c0cf40fSJerome Brunet groups = "GPIOX_4"; 5968c0cf40fSJerome Brunet function = "gpio_periphs"; 5978c0cf40fSJerome Brunet bias-pull-down; 5988c0cf40fSJerome Brunet }; 5998c0cf40fSJerome Brunet }; 6008c0cf40fSJerome Brunet 6018c0cf40fSJerome Brunet spdif_in_z_pins: spdif_in_z { 6028c0cf40fSJerome Brunet mux { 6038c0cf40fSJerome Brunet groups = "spdif_in_z"; 6048c0cf40fSJerome Brunet function = "spdif_in"; 6051c5cc1c8SJerome Brunet bias-disable; 6068c0cf40fSJerome Brunet }; 6078c0cf40fSJerome Brunet }; 6088c0cf40fSJerome Brunet 6098c0cf40fSJerome Brunet spdif_in_a1_pins: spdif_in_a1 { 6108c0cf40fSJerome Brunet mux { 6118c0cf40fSJerome Brunet groups = "spdif_in_a1"; 6128c0cf40fSJerome Brunet function = "spdif_in"; 6131c5cc1c8SJerome Brunet bias-disable; 6148c0cf40fSJerome Brunet }; 6158c0cf40fSJerome Brunet }; 6168c0cf40fSJerome Brunet 6178c0cf40fSJerome Brunet spdif_in_a7_pins: spdif_in_a7 { 6188c0cf40fSJerome Brunet mux { 6198c0cf40fSJerome Brunet groups = "spdif_in_a7"; 6208c0cf40fSJerome Brunet function = "spdif_in"; 6211c5cc1c8SJerome Brunet bias-disable; 6228c0cf40fSJerome Brunet }; 6238c0cf40fSJerome Brunet }; 6248c0cf40fSJerome Brunet 6258c0cf40fSJerome Brunet spdif_in_a19_pins: spdif_in_a19 { 6268c0cf40fSJerome Brunet mux { 6278c0cf40fSJerome Brunet groups = "spdif_in_a19"; 6288c0cf40fSJerome Brunet function = "spdif_in"; 6291c5cc1c8SJerome Brunet bias-disable; 6308c0cf40fSJerome Brunet }; 6318c0cf40fSJerome Brunet }; 6328c0cf40fSJerome Brunet 6338c0cf40fSJerome Brunet spdif_in_a20_pins: spdif_in_a20 { 6348c0cf40fSJerome Brunet mux { 6358c0cf40fSJerome Brunet groups = "spdif_in_a20"; 6368c0cf40fSJerome Brunet function = "spdif_in"; 6371c5cc1c8SJerome Brunet bias-disable; 6388c0cf40fSJerome Brunet }; 6398c0cf40fSJerome Brunet }; 6408c0cf40fSJerome Brunet 6418c0cf40fSJerome Brunet spdif_out_a1_pins: spdif_out_a1 { 6428c0cf40fSJerome Brunet mux { 6438c0cf40fSJerome Brunet groups = "spdif_out_a1"; 6448c0cf40fSJerome Brunet function = "spdif_out"; 6451c5cc1c8SJerome Brunet bias-disable; 6468c0cf40fSJerome Brunet }; 6478c0cf40fSJerome Brunet }; 6488c0cf40fSJerome Brunet 6498c0cf40fSJerome Brunet spdif_out_a11_pins: spdif_out_a11 { 6508c0cf40fSJerome Brunet mux { 6518c0cf40fSJerome Brunet groups = "spdif_out_a11"; 6528c0cf40fSJerome Brunet function = "spdif_out"; 6531c5cc1c8SJerome Brunet bias-disable; 6548c0cf40fSJerome Brunet }; 6558c0cf40fSJerome Brunet }; 6568c0cf40fSJerome Brunet 6578c0cf40fSJerome Brunet spdif_out_a19_pins: spdif_out_a19 { 6588c0cf40fSJerome Brunet mux { 6598c0cf40fSJerome Brunet groups = "spdif_out_a19"; 6608c0cf40fSJerome Brunet function = "spdif_out"; 6611c5cc1c8SJerome Brunet bias-disable; 6628c0cf40fSJerome Brunet }; 6638c0cf40fSJerome Brunet }; 6648c0cf40fSJerome Brunet 6658c0cf40fSJerome Brunet spdif_out_a20_pins: spdif_out_a20 { 6668c0cf40fSJerome Brunet mux { 6678c0cf40fSJerome Brunet groups = "spdif_out_a20"; 6688c0cf40fSJerome Brunet function = "spdif_out"; 6691c5cc1c8SJerome Brunet bias-disable; 6708c0cf40fSJerome Brunet }; 6718c0cf40fSJerome Brunet }; 6728c0cf40fSJerome Brunet 6738c0cf40fSJerome Brunet spdif_out_z_pins: spdif_out_z { 6748c0cf40fSJerome Brunet mux { 6758c0cf40fSJerome Brunet groups = "spdif_out_z"; 6768c0cf40fSJerome Brunet function = "spdif_out"; 6771c5cc1c8SJerome Brunet bias-disable; 6788c0cf40fSJerome Brunet }; 6798c0cf40fSJerome Brunet }; 6808c0cf40fSJerome Brunet 6818c0cf40fSJerome Brunet spi0_pins: spi0 { 6828c0cf40fSJerome Brunet mux { 6838c0cf40fSJerome Brunet groups = "spi0_miso", 6848c0cf40fSJerome Brunet "spi0_mosi", 6858c0cf40fSJerome Brunet "spi0_clk"; 6868c0cf40fSJerome Brunet function = "spi0"; 6871c5cc1c8SJerome Brunet bias-disable; 6888c0cf40fSJerome Brunet }; 6898c0cf40fSJerome Brunet }; 6908c0cf40fSJerome Brunet 6918c0cf40fSJerome Brunet spi0_ss0_pins: spi0_ss0 { 6928c0cf40fSJerome Brunet mux { 6938c0cf40fSJerome Brunet groups = "spi0_ss0"; 6948c0cf40fSJerome Brunet function = "spi0"; 6951c5cc1c8SJerome Brunet bias-disable; 6968c0cf40fSJerome Brunet }; 6978c0cf40fSJerome Brunet }; 6988c0cf40fSJerome Brunet 6998c0cf40fSJerome Brunet spi0_ss1_pins: spi0_ss1 { 7008c0cf40fSJerome Brunet mux { 7018c0cf40fSJerome Brunet groups = "spi0_ss1"; 7028c0cf40fSJerome Brunet function = "spi0"; 7031c5cc1c8SJerome Brunet bias-disable; 7048c0cf40fSJerome Brunet }; 7058c0cf40fSJerome Brunet }; 7068c0cf40fSJerome Brunet 7078c0cf40fSJerome Brunet spi0_ss2_pins: spi0_ss2 { 7088c0cf40fSJerome Brunet mux { 7098c0cf40fSJerome Brunet groups = "spi0_ss2"; 7108c0cf40fSJerome Brunet function = "spi0"; 7111c5cc1c8SJerome Brunet bias-disable; 7128c0cf40fSJerome Brunet }; 7138c0cf40fSJerome Brunet }; 7148c0cf40fSJerome Brunet 7158c0cf40fSJerome Brunet spi1_a_pins: spi1_a { 7168c0cf40fSJerome Brunet mux { 7178c0cf40fSJerome Brunet groups = "spi1_miso_a", 7188c0cf40fSJerome Brunet "spi1_mosi_a", 7198c0cf40fSJerome Brunet "spi1_clk_a"; 7208c0cf40fSJerome Brunet function = "spi1"; 7211c5cc1c8SJerome Brunet bias-disable; 7228c0cf40fSJerome Brunet }; 7238c0cf40fSJerome Brunet }; 7248c0cf40fSJerome Brunet 7258c0cf40fSJerome Brunet spi1_ss0_a_pins: spi1_ss0_a { 7268c0cf40fSJerome Brunet mux { 7278c0cf40fSJerome Brunet groups = "spi1_ss0_a"; 7288c0cf40fSJerome Brunet function = "spi1"; 7291c5cc1c8SJerome Brunet bias-disable; 7308c0cf40fSJerome Brunet }; 7318c0cf40fSJerome Brunet }; 7328c0cf40fSJerome Brunet 7338c0cf40fSJerome Brunet spi1_ss1_pins: spi1_ss1 { 7348c0cf40fSJerome Brunet mux { 7358c0cf40fSJerome Brunet groups = "spi1_ss1"; 7368c0cf40fSJerome Brunet function = "spi1"; 7371c5cc1c8SJerome Brunet bias-disable; 7388c0cf40fSJerome Brunet }; 7398c0cf40fSJerome Brunet }; 7408c0cf40fSJerome Brunet 7418c0cf40fSJerome Brunet spi1_x_pins: spi1_x { 7428c0cf40fSJerome Brunet mux { 7438c0cf40fSJerome Brunet groups = "spi1_miso_x", 7448c0cf40fSJerome Brunet "spi1_mosi_x", 7458c0cf40fSJerome Brunet "spi1_clk_x"; 7468c0cf40fSJerome Brunet function = "spi1"; 7471c5cc1c8SJerome Brunet bias-disable; 7488c0cf40fSJerome Brunet }; 7498c0cf40fSJerome Brunet }; 7508c0cf40fSJerome Brunet 7518c0cf40fSJerome Brunet spi1_ss0_x_pins: spi1_ss0_x { 7528c0cf40fSJerome Brunet mux { 7538c0cf40fSJerome Brunet groups = "spi1_ss0_x"; 7548c0cf40fSJerome Brunet function = "spi1"; 7551c5cc1c8SJerome Brunet bias-disable; 7568c0cf40fSJerome Brunet }; 7578c0cf40fSJerome Brunet }; 7588c0cf40fSJerome Brunet 7598c0cf40fSJerome Brunet tdma_din0_pins: tdma_din0 { 7608c0cf40fSJerome Brunet mux { 7618c0cf40fSJerome Brunet groups = "tdma_din0"; 7628c0cf40fSJerome Brunet function = "tdma"; 7631c5cc1c8SJerome Brunet bias-disable; 7648c0cf40fSJerome Brunet }; 7658c0cf40fSJerome Brunet }; 7668c0cf40fSJerome Brunet 7678c0cf40fSJerome Brunet tdma_dout0_x14_pins: tdma_dout0_x14 { 7688c0cf40fSJerome Brunet mux { 7698c0cf40fSJerome Brunet groups = "tdma_dout0_x14"; 7708c0cf40fSJerome Brunet function = "tdma"; 7711c5cc1c8SJerome Brunet bias-disable; 7728c0cf40fSJerome Brunet }; 7738c0cf40fSJerome Brunet }; 7748c0cf40fSJerome Brunet 7758c0cf40fSJerome Brunet tdma_dout0_x15_pins: tdma_dout0_x15 { 7768c0cf40fSJerome Brunet mux { 7778c0cf40fSJerome Brunet groups = "tdma_dout0_x15"; 7788c0cf40fSJerome Brunet function = "tdma"; 7791c5cc1c8SJerome Brunet bias-disable; 7808c0cf40fSJerome Brunet }; 7818c0cf40fSJerome Brunet }; 7828c0cf40fSJerome Brunet 7838c0cf40fSJerome Brunet tdma_dout1_pins: tdma_dout1 { 7848c0cf40fSJerome Brunet mux { 7858c0cf40fSJerome Brunet groups = "tdma_dout1"; 7868c0cf40fSJerome Brunet function = "tdma"; 7871c5cc1c8SJerome Brunet bias-disable; 7888c0cf40fSJerome Brunet }; 7898c0cf40fSJerome Brunet }; 7908c0cf40fSJerome Brunet 7918c0cf40fSJerome Brunet tdma_din1_pins: tdma_din1 { 7928c0cf40fSJerome Brunet mux { 7938c0cf40fSJerome Brunet groups = "tdma_din1"; 7948c0cf40fSJerome Brunet function = "tdma"; 7951c5cc1c8SJerome Brunet bias-disable; 7968c0cf40fSJerome Brunet }; 7978c0cf40fSJerome Brunet }; 7988c0cf40fSJerome Brunet 7998c0cf40fSJerome Brunet tdma_fs_pins: tdma_fs { 8008c0cf40fSJerome Brunet mux { 8018c0cf40fSJerome Brunet groups = "tdma_fs"; 8028c0cf40fSJerome Brunet function = "tdma"; 8031c5cc1c8SJerome Brunet bias-disable; 8048c0cf40fSJerome Brunet }; 8058c0cf40fSJerome Brunet }; 8068c0cf40fSJerome Brunet 8078c0cf40fSJerome Brunet tdma_fs_slv_pins: tdma_fs_slv { 8088c0cf40fSJerome Brunet mux { 8098c0cf40fSJerome Brunet groups = "tdma_fs_slv"; 8108c0cf40fSJerome Brunet function = "tdma"; 8111c5cc1c8SJerome Brunet bias-disable; 8128c0cf40fSJerome Brunet }; 8138c0cf40fSJerome Brunet }; 8148c0cf40fSJerome Brunet 8158c0cf40fSJerome Brunet tdma_sclk_pins: tdma_sclk { 8168c0cf40fSJerome Brunet mux { 8178c0cf40fSJerome Brunet groups = "tdma_sclk"; 8188c0cf40fSJerome Brunet function = "tdma"; 8191c5cc1c8SJerome Brunet bias-disable; 8208c0cf40fSJerome Brunet }; 8218c0cf40fSJerome Brunet }; 8228c0cf40fSJerome Brunet 8238c0cf40fSJerome Brunet tdma_sclk_slv_pins: tdma_sclk_slv { 8248c0cf40fSJerome Brunet mux { 8258c0cf40fSJerome Brunet groups = "tdma_sclk_slv"; 8268c0cf40fSJerome Brunet function = "tdma"; 8271c5cc1c8SJerome Brunet bias-disable; 8288c0cf40fSJerome Brunet }; 8298c0cf40fSJerome Brunet }; 8308c0cf40fSJerome Brunet 8318c0cf40fSJerome Brunet tdmb_din0_pins: tdmb_din0 { 8328c0cf40fSJerome Brunet mux { 8338c0cf40fSJerome Brunet groups = "tdmb_din0"; 8348c0cf40fSJerome Brunet function = "tdmb"; 8351c5cc1c8SJerome Brunet bias-disable; 8368c0cf40fSJerome Brunet }; 8378c0cf40fSJerome Brunet }; 8388c0cf40fSJerome Brunet 8398c0cf40fSJerome Brunet tdmb_din1_pins: tdmb_din1 { 8408c0cf40fSJerome Brunet mux { 8418c0cf40fSJerome Brunet groups = "tdmb_din1"; 8428c0cf40fSJerome Brunet function = "tdmb"; 8431c5cc1c8SJerome Brunet bias-disable; 8448c0cf40fSJerome Brunet }; 8458c0cf40fSJerome Brunet }; 8468c0cf40fSJerome Brunet 8478c0cf40fSJerome Brunet tdmb_din2_pins: tdmb_din2 { 8488c0cf40fSJerome Brunet mux { 8498c0cf40fSJerome Brunet groups = "tdmb_din2"; 8508c0cf40fSJerome Brunet function = "tdmb"; 8511c5cc1c8SJerome Brunet bias-disable; 8528c0cf40fSJerome Brunet }; 8538c0cf40fSJerome Brunet }; 8548c0cf40fSJerome Brunet 8558c0cf40fSJerome Brunet tdmb_din3_pins: tdmb_din3 { 8568c0cf40fSJerome Brunet mux { 8578c0cf40fSJerome Brunet groups = "tdmb_din3"; 8588c0cf40fSJerome Brunet function = "tdmb"; 8591c5cc1c8SJerome Brunet bias-disable; 8608c0cf40fSJerome Brunet }; 8618c0cf40fSJerome Brunet }; 8628c0cf40fSJerome Brunet 8638c0cf40fSJerome Brunet tdmb_dout0_pins: tdmb_dout0 { 8648c0cf40fSJerome Brunet mux { 8658c0cf40fSJerome Brunet groups = "tdmb_dout0"; 8668c0cf40fSJerome Brunet function = "tdmb"; 8671c5cc1c8SJerome Brunet bias-disable; 8688c0cf40fSJerome Brunet }; 8698c0cf40fSJerome Brunet }; 8708c0cf40fSJerome Brunet 8718c0cf40fSJerome Brunet tdmb_dout1_pins: tdmb_dout1 { 8728c0cf40fSJerome Brunet mux { 8738c0cf40fSJerome Brunet groups = "tdmb_dout1"; 8748c0cf40fSJerome Brunet function = "tdmb"; 8751c5cc1c8SJerome Brunet bias-disable; 8768c0cf40fSJerome Brunet }; 8778c0cf40fSJerome Brunet }; 8788c0cf40fSJerome Brunet 8798c0cf40fSJerome Brunet tdmb_dout2_pins: tdmb_dout2 { 8808c0cf40fSJerome Brunet mux { 8818c0cf40fSJerome Brunet groups = "tdmb_dout2"; 8828c0cf40fSJerome Brunet function = "tdmb"; 8831c5cc1c8SJerome Brunet bias-disable; 8848c0cf40fSJerome Brunet }; 8858c0cf40fSJerome Brunet }; 8868c0cf40fSJerome Brunet 8878c0cf40fSJerome Brunet tdmb_dout3_pins: tdmb_dout3 { 8888c0cf40fSJerome Brunet mux { 8898c0cf40fSJerome Brunet groups = "tdmb_dout3"; 8908c0cf40fSJerome Brunet function = "tdmb"; 8911c5cc1c8SJerome Brunet bias-disable; 8928c0cf40fSJerome Brunet }; 8938c0cf40fSJerome Brunet }; 8948c0cf40fSJerome Brunet 8958c0cf40fSJerome Brunet tdmb_fs_pins: tdmb_fs { 8968c0cf40fSJerome Brunet mux { 8978c0cf40fSJerome Brunet groups = "tdmb_fs"; 8988c0cf40fSJerome Brunet function = "tdmb"; 8991c5cc1c8SJerome Brunet bias-disable; 9008c0cf40fSJerome Brunet }; 9018c0cf40fSJerome Brunet }; 9028c0cf40fSJerome Brunet 9038c0cf40fSJerome Brunet tdmb_fs_slv_pins: tdmb_fs_slv { 9048c0cf40fSJerome Brunet mux { 9058c0cf40fSJerome Brunet groups = "tdmb_fs_slv"; 9068c0cf40fSJerome Brunet function = "tdmb"; 9071c5cc1c8SJerome Brunet bias-disable; 9088c0cf40fSJerome Brunet }; 9098c0cf40fSJerome Brunet }; 9108c0cf40fSJerome Brunet 9118c0cf40fSJerome Brunet tdmb_sclk_pins: tdmb_sclk { 9128c0cf40fSJerome Brunet mux { 9138c0cf40fSJerome Brunet groups = "tdmb_sclk"; 9148c0cf40fSJerome Brunet function = "tdmb"; 9151c5cc1c8SJerome Brunet bias-disable; 9168c0cf40fSJerome Brunet }; 9178c0cf40fSJerome Brunet }; 9188c0cf40fSJerome Brunet 9198c0cf40fSJerome Brunet tdmb_sclk_slv_pins: tdmb_sclk_slv { 9208c0cf40fSJerome Brunet mux { 9218c0cf40fSJerome Brunet groups = "tdmb_sclk_slv"; 9228c0cf40fSJerome Brunet function = "tdmb"; 9231c5cc1c8SJerome Brunet bias-disable; 9248c0cf40fSJerome Brunet }; 9258c0cf40fSJerome Brunet }; 9268c0cf40fSJerome Brunet 9278c0cf40fSJerome Brunet tdmc_fs_pins: tdmc_fs { 9288c0cf40fSJerome Brunet mux { 9298c0cf40fSJerome Brunet groups = "tdmc_fs"; 9308c0cf40fSJerome Brunet function = "tdmc"; 9311c5cc1c8SJerome Brunet bias-disable; 9328c0cf40fSJerome Brunet }; 9338c0cf40fSJerome Brunet }; 9348c0cf40fSJerome Brunet 9358c0cf40fSJerome Brunet tdmc_fs_slv_pins: tdmc_fs_slv { 9368c0cf40fSJerome Brunet mux { 9378c0cf40fSJerome Brunet groups = "tdmc_fs_slv"; 9388c0cf40fSJerome Brunet function = "tdmc"; 9391c5cc1c8SJerome Brunet bias-disable; 9408c0cf40fSJerome Brunet }; 9418c0cf40fSJerome Brunet }; 9428c0cf40fSJerome Brunet 9438c0cf40fSJerome Brunet tdmc_sclk_pins: tdmc_sclk { 9448c0cf40fSJerome Brunet mux { 9458c0cf40fSJerome Brunet groups = "tdmc_sclk"; 9468c0cf40fSJerome Brunet function = "tdmc"; 9471c5cc1c8SJerome Brunet bias-disable; 9488c0cf40fSJerome Brunet }; 9498c0cf40fSJerome Brunet }; 9508c0cf40fSJerome Brunet 9518c0cf40fSJerome Brunet tdmc_sclk_slv_pins: tdmc_sclk_slv { 9528c0cf40fSJerome Brunet mux { 9538c0cf40fSJerome Brunet groups = "tdmc_sclk_slv"; 9548c0cf40fSJerome Brunet function = "tdmc"; 9551c5cc1c8SJerome Brunet bias-disable; 9568c0cf40fSJerome Brunet }; 9578c0cf40fSJerome Brunet }; 9588c0cf40fSJerome Brunet 9598c0cf40fSJerome Brunet tdmc_din0_pins: tdmc_din0 { 9608c0cf40fSJerome Brunet mux { 9618c0cf40fSJerome Brunet groups = "tdmc_din0"; 9628c0cf40fSJerome Brunet function = "tdmc"; 9631c5cc1c8SJerome Brunet bias-disable; 9648c0cf40fSJerome Brunet }; 9658c0cf40fSJerome Brunet }; 9668c0cf40fSJerome Brunet 9678c0cf40fSJerome Brunet tdmc_din1_pins: tdmc_din1 { 9688c0cf40fSJerome Brunet mux { 9698c0cf40fSJerome Brunet groups = "tdmc_din1"; 9708c0cf40fSJerome Brunet function = "tdmc"; 9711c5cc1c8SJerome Brunet bias-disable; 9728c0cf40fSJerome Brunet }; 9738c0cf40fSJerome Brunet }; 9748c0cf40fSJerome Brunet 9758c0cf40fSJerome Brunet tdmc_din2_pins: tdmc_din2 { 9768c0cf40fSJerome Brunet mux { 9778c0cf40fSJerome Brunet groups = "tdmc_din2"; 9788c0cf40fSJerome Brunet function = "tdmc"; 9791c5cc1c8SJerome Brunet bias-disable; 9808c0cf40fSJerome Brunet }; 9818c0cf40fSJerome Brunet }; 9828c0cf40fSJerome Brunet 9838c0cf40fSJerome Brunet tdmc_din3_pins: tdmc_din3 { 9848c0cf40fSJerome Brunet mux { 9858c0cf40fSJerome Brunet groups = "tdmc_din3"; 9868c0cf40fSJerome Brunet function = "tdmc"; 9871c5cc1c8SJerome Brunet bias-disable; 9888c0cf40fSJerome Brunet }; 9898c0cf40fSJerome Brunet }; 9908c0cf40fSJerome Brunet 9918c0cf40fSJerome Brunet tdmc_dout0_pins: tdmc_dout0 { 9928c0cf40fSJerome Brunet mux { 9938c0cf40fSJerome Brunet groups = "tdmc_dout0"; 9948c0cf40fSJerome Brunet function = "tdmc"; 9951c5cc1c8SJerome Brunet bias-disable; 9968c0cf40fSJerome Brunet }; 9978c0cf40fSJerome Brunet }; 9988c0cf40fSJerome Brunet 9998c0cf40fSJerome Brunet tdmc_dout1_pins: tdmc_dout1 { 10008c0cf40fSJerome Brunet mux { 10018c0cf40fSJerome Brunet groups = "tdmc_dout1"; 10028c0cf40fSJerome Brunet function = "tdmc"; 10031c5cc1c8SJerome Brunet bias-disable; 10048c0cf40fSJerome Brunet }; 10058c0cf40fSJerome Brunet }; 10068c0cf40fSJerome Brunet 10078c0cf40fSJerome Brunet tdmc_dout2_pins: tdmc_dout2 { 10088c0cf40fSJerome Brunet mux { 10098c0cf40fSJerome Brunet groups = "tdmc_dout2"; 10108c0cf40fSJerome Brunet function = "tdmc"; 10111c5cc1c8SJerome Brunet bias-disable; 10128c0cf40fSJerome Brunet }; 10138c0cf40fSJerome Brunet }; 10148c0cf40fSJerome Brunet 10158c0cf40fSJerome Brunet tdmc_dout3_pins: tdmc_dout3 { 10168c0cf40fSJerome Brunet mux { 10178c0cf40fSJerome Brunet groups = "tdmc_dout3"; 10188c0cf40fSJerome Brunet function = "tdmc"; 10191c5cc1c8SJerome Brunet bias-disable; 10208c0cf40fSJerome Brunet }; 10218c0cf40fSJerome Brunet }; 10228c0cf40fSJerome Brunet 10238c0cf40fSJerome Brunet uart_a_pins: uart_a { 10248c0cf40fSJerome Brunet mux { 10258c0cf40fSJerome Brunet groups = "uart_tx_a", 10268c0cf40fSJerome Brunet "uart_rx_a"; 10278c0cf40fSJerome Brunet function = "uart_a"; 10281c5cc1c8SJerome Brunet bias-disable; 10298c0cf40fSJerome Brunet }; 10308c0cf40fSJerome Brunet }; 10318c0cf40fSJerome Brunet 10328c0cf40fSJerome Brunet uart_a_cts_rts_pins: uart_a_cts_rts { 10338c0cf40fSJerome Brunet mux { 10348c0cf40fSJerome Brunet groups = "uart_cts_a", 10358c0cf40fSJerome Brunet "uart_rts_a"; 10368c0cf40fSJerome Brunet function = "uart_a"; 10371c5cc1c8SJerome Brunet bias-disable; 10388c0cf40fSJerome Brunet }; 10398c0cf40fSJerome Brunet }; 10408c0cf40fSJerome Brunet 10418c0cf40fSJerome Brunet uart_b_x_pins: uart_b_x { 10428c0cf40fSJerome Brunet mux { 10438c0cf40fSJerome Brunet groups = "uart_tx_b_x", 10448c0cf40fSJerome Brunet "uart_rx_b_x"; 10458c0cf40fSJerome Brunet function = "uart_b"; 10461c5cc1c8SJerome Brunet bias-disable; 10478c0cf40fSJerome Brunet }; 10488c0cf40fSJerome Brunet }; 10498c0cf40fSJerome Brunet 10508c0cf40fSJerome Brunet uart_b_x_cts_rts_pins: uart_b_x_cts_rts { 10518c0cf40fSJerome Brunet mux { 10528c0cf40fSJerome Brunet groups = "uart_cts_b_x", 10538c0cf40fSJerome Brunet "uart_rts_b_x"; 10548c0cf40fSJerome Brunet function = "uart_b"; 10551c5cc1c8SJerome Brunet bias-disable; 10568c0cf40fSJerome Brunet }; 10578c0cf40fSJerome Brunet }; 10588c0cf40fSJerome Brunet 10598c0cf40fSJerome Brunet uart_b_z_pins: uart_b_z { 10608c0cf40fSJerome Brunet mux { 10618c0cf40fSJerome Brunet groups = "uart_tx_b_z", 10628c0cf40fSJerome Brunet "uart_rx_b_z"; 10638c0cf40fSJerome Brunet function = "uart_b"; 10641c5cc1c8SJerome Brunet bias-disable; 10658c0cf40fSJerome Brunet }; 10668c0cf40fSJerome Brunet }; 10678c0cf40fSJerome Brunet 10688c0cf40fSJerome Brunet uart_b_z_cts_rts_pins: uart_b_z_cts_rts { 10698c0cf40fSJerome Brunet mux { 10708c0cf40fSJerome Brunet groups = "uart_cts_b_z", 10718c0cf40fSJerome Brunet "uart_rts_b_z"; 10728c0cf40fSJerome Brunet function = "uart_b"; 10731c5cc1c8SJerome Brunet bias-disable; 10748c0cf40fSJerome Brunet }; 10758c0cf40fSJerome Brunet }; 10768c0cf40fSJerome Brunet 10778c0cf40fSJerome Brunet uart_ao_b_z_pins: uart_ao_b_z { 10788c0cf40fSJerome Brunet mux { 10798c0cf40fSJerome Brunet groups = "uart_ao_tx_b_z", 10808c0cf40fSJerome Brunet "uart_ao_rx_b_z"; 10818c0cf40fSJerome Brunet function = "uart_ao_b_z"; 10821c5cc1c8SJerome Brunet bias-disable; 10838c0cf40fSJerome Brunet }; 10848c0cf40fSJerome Brunet }; 10858c0cf40fSJerome Brunet 10868c0cf40fSJerome Brunet uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { 10878c0cf40fSJerome Brunet mux { 10888c0cf40fSJerome Brunet groups = "uart_ao_cts_b_z", 10898c0cf40fSJerome Brunet "uart_ao_rts_b_z"; 10908c0cf40fSJerome Brunet function = "uart_ao_b_z"; 10911c5cc1c8SJerome Brunet bias-disable; 10928c0cf40fSJerome Brunet }; 10938c0cf40fSJerome Brunet }; 10948c0cf40fSJerome Brunet }; 10958c0cf40fSJerome Brunet }; 10968c0cf40fSJerome Brunet 10978c0cf40fSJerome Brunet hiubus: bus@ff63c000 { 10988c0cf40fSJerome Brunet compatible = "simple-bus"; 10998c0cf40fSJerome Brunet reg = <0x0 0xff63c000 0x0 0x1c00>; 11008c0cf40fSJerome Brunet #address-cells = <2>; 11018c0cf40fSJerome Brunet #size-cells = <2>; 11028c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; 11038c0cf40fSJerome Brunet 11048c0cf40fSJerome Brunet sysctrl: system-controller@0 { 11058c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-hhi-sysctrl", 1106445f2bdaSNeil Armstrong "simple-mfd", "syscon"; 11078c0cf40fSJerome Brunet reg = <0 0 0 0x400>; 11088c0cf40fSJerome Brunet 11098c0cf40fSJerome Brunet clkc: clock-controller { 11108c0cf40fSJerome Brunet compatible = "amlogic,axg-clkc"; 11118c0cf40fSJerome Brunet #clock-cells = <1>; 111216361ff2SJerome Brunet clocks = <&xtal>; 111316361ff2SJerome Brunet clock-names = "xtal"; 11148c0cf40fSJerome Brunet }; 11158c0cf40fSJerome Brunet }; 11168c0cf40fSJerome Brunet }; 11178c0cf40fSJerome Brunet 11189fdff382SJerome Brunet mailbox: mailbox@ff63c404 { 11198c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; 11209fdff382SJerome Brunet reg = <0 0xff63c404 0 0x4c>; 11218c0cf40fSJerome Brunet interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 11228c0cf40fSJerome Brunet <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 11238c0cf40fSJerome Brunet <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 11248c0cf40fSJerome Brunet #mbox-cells = <1>; 1125221cf34bSNan Li }; 1126221cf34bSNan Li 11278909e722SJerome Brunet audio: bus@ff642000 { 11288909e722SJerome Brunet compatible = "simple-bus"; 11298909e722SJerome Brunet reg = <0x0 0xff642000 0x0 0x2000>; 11308909e722SJerome Brunet #address-cells = <2>; 11318909e722SJerome Brunet #size-cells = <2>; 11328909e722SJerome Brunet ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>; 11338909e722SJerome Brunet 11348909e722SJerome Brunet clkc_audio: clock-controller@0 { 11358909e722SJerome Brunet compatible = "amlogic,axg-audio-clkc"; 11368909e722SJerome Brunet reg = <0x0 0x0 0x0 0xb4>; 11378909e722SJerome Brunet #clock-cells = <1>; 11388909e722SJerome Brunet 11398909e722SJerome Brunet clocks = <&clkc CLKID_AUDIO>, 11408909e722SJerome Brunet <&clkc CLKID_MPLL0>, 11418909e722SJerome Brunet <&clkc CLKID_MPLL1>, 11428909e722SJerome Brunet <&clkc CLKID_MPLL2>, 11438909e722SJerome Brunet <&clkc CLKID_MPLL3>, 11448909e722SJerome Brunet <&clkc CLKID_HIFI_PLL>, 11458909e722SJerome Brunet <&clkc CLKID_FCLK_DIV3>, 11468909e722SJerome Brunet <&clkc CLKID_FCLK_DIV4>, 11478909e722SJerome Brunet <&clkc CLKID_GP0_PLL>; 11488909e722SJerome Brunet clock-names = "pclk", 11498909e722SJerome Brunet "mst_in0", 11508909e722SJerome Brunet "mst_in1", 11518909e722SJerome Brunet "mst_in2", 11528909e722SJerome Brunet "mst_in3", 11538909e722SJerome Brunet "mst_in4", 11548909e722SJerome Brunet "mst_in5", 11558909e722SJerome Brunet "mst_in6", 11568909e722SJerome Brunet "mst_in7"; 11578909e722SJerome Brunet 11588909e722SJerome Brunet resets = <&reset RESET_AUDIO>; 11598909e722SJerome Brunet }; 116066d58a8fSJerome Brunet 1161f2b8f6a9SJerome Brunet toddr_a: audio-controller@100 { 1162f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1163f2b8f6a9SJerome Brunet reg = <0x0 0x100 0x0 0x1c>; 1164f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1165f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_A"; 1166f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>; 1167f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_A>; 1168f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_A>; 1169f2b8f6a9SJerome Brunet status = "disabled"; 1170f2b8f6a9SJerome Brunet }; 1171f2b8f6a9SJerome Brunet 1172f2b8f6a9SJerome Brunet toddr_b: audio-controller@140 { 1173f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1174f2b8f6a9SJerome Brunet reg = <0x0 0x140 0x0 0x1c>; 1175f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1176f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_B"; 1177f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>; 1178f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_B>; 1179f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_B>; 1180f2b8f6a9SJerome Brunet status = "disabled"; 1181f2b8f6a9SJerome Brunet }; 1182f2b8f6a9SJerome Brunet 1183f2b8f6a9SJerome Brunet toddr_c: audio-controller@180 { 1184f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1185f2b8f6a9SJerome Brunet reg = <0x0 0x180 0x0 0x1c>; 1186f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1187f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_C"; 1188f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>; 1189f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_C>; 1190f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_C>; 1191f2b8f6a9SJerome Brunet status = "disabled"; 1192f2b8f6a9SJerome Brunet }; 1193f2b8f6a9SJerome Brunet 1194f2b8f6a9SJerome Brunet frddr_a: audio-controller@1c0 { 1195f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1196f2b8f6a9SJerome Brunet reg = <0x0 0x1c0 0x0 0x1c>; 1197f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1198f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_A"; 1199f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 1200f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 1201f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_A>; 1202f2b8f6a9SJerome Brunet status = "disabled"; 1203f2b8f6a9SJerome Brunet }; 1204f2b8f6a9SJerome Brunet 1205f2b8f6a9SJerome Brunet frddr_b: audio-controller@200 { 1206f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1207f2b8f6a9SJerome Brunet reg = <0x0 0x200 0x0 0x1c>; 1208f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1209f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_B"; 1210f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 1211f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; 1212f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_B>; 1213f2b8f6a9SJerome Brunet status = "disabled"; 1214f2b8f6a9SJerome Brunet }; 1215f2b8f6a9SJerome Brunet 1216f2b8f6a9SJerome Brunet frddr_c: audio-controller@240 { 1217f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1218f2b8f6a9SJerome Brunet reg = <0x0 0x240 0x0 0x1c>; 1219f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1220f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_C"; 1221f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 1222f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; 1223f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_C>; 1224f2b8f6a9SJerome Brunet status = "disabled"; 1225f2b8f6a9SJerome Brunet }; 1226f2b8f6a9SJerome Brunet 122766d58a8fSJerome Brunet arb: reset-controller@280 { 122866d58a8fSJerome Brunet compatible = "amlogic,meson-axg-audio-arb"; 122966d58a8fSJerome Brunet reg = <0x0 0x280 0x0 0x4>; 123066d58a8fSJerome Brunet #reset-cells = <1>; 123166d58a8fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 123266d58a8fSJerome Brunet }; 1233f08c52deSJerome Brunet 1234bf8e4790SJerome Brunet tdmin_a: audio-controller@300 { 1235bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1236bf8e4790SJerome Brunet reg = <0x0 0x300 0x0 0x40>; 1237bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_A"; 1238bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 1239bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 1240bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 1241bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 1242bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 1243bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1244bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1245bf8e4790SJerome Brunet status = "disabled"; 1246bf8e4790SJerome Brunet }; 1247bf8e4790SJerome Brunet 1248bf8e4790SJerome Brunet tdmin_b: audio-controller@340 { 1249bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1250bf8e4790SJerome Brunet reg = <0x0 0x340 0x0 0x40>; 1251bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_B"; 1252bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 1253bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 1254bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 1255bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 1256bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 1257bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1258bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1259bf8e4790SJerome Brunet status = "disabled"; 1260bf8e4790SJerome Brunet }; 1261bf8e4790SJerome Brunet 1262bf8e4790SJerome Brunet tdmin_c: audio-controller@380 { 1263bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1264bf8e4790SJerome Brunet reg = <0x0 0x380 0x0 0x40>; 1265bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_C"; 1266bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 1267bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 1268bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 1269bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 1270bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 1271bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1272bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1273bf8e4790SJerome Brunet status = "disabled"; 1274bf8e4790SJerome Brunet }; 1275bf8e4790SJerome Brunet 1276bf8e4790SJerome Brunet tdmin_lb: audio-controller@3c0 { 1277bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1278bf8e4790SJerome Brunet reg = <0x0 0x3c0 0x0 0x40>; 1279bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_LB"; 1280bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 1281bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 1282bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 1283bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 1284bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 1285bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1286bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1287bf8e4790SJerome Brunet status = "disabled"; 1288bf8e4790SJerome Brunet }; 1289bf8e4790SJerome Brunet 12905e6a18acSJerome Brunet spdifin: audio-controller@400 { 12915e6a18acSJerome Brunet compatible = "amlogic,axg-spdifin"; 12925e6a18acSJerome Brunet reg = <0x0 0x400 0x0 0x30>; 12935e6a18acSJerome Brunet #sound-dai-cells = <0>; 12945e6a18acSJerome Brunet sound-name-prefix = "SPDIFIN"; 12955e6a18acSJerome Brunet interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; 12965e6a18acSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, 12975e6a18acSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; 12985e6a18acSJerome Brunet clock-names = "pclk", "refclk"; 12995e6a18acSJerome Brunet status = "disabled"; 13005e6a18acSJerome Brunet }; 13015e6a18acSJerome Brunet 1302f08c52deSJerome Brunet spdifout: audio-controller@480 { 1303f08c52deSJerome Brunet compatible = "amlogic,axg-spdifout"; 1304f08c52deSJerome Brunet reg = <0x0 0x480 0x0 0x50>; 1305f08c52deSJerome Brunet #sound-dai-cells = <0>; 1306f08c52deSJerome Brunet sound-name-prefix = "SPDIFOUT"; 1307f08c52deSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, 1308f08c52deSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; 1309f08c52deSJerome Brunet clock-names = "pclk", "mclk"; 1310f08c52deSJerome Brunet status = "disabled"; 1311f08c52deSJerome Brunet }; 1312fd916739SJerome Brunet 1313fd916739SJerome Brunet tdmout_a: audio-controller@500 { 1314fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1315fd916739SJerome Brunet reg = <0x0 0x500 0x0 0x40>; 1316fd916739SJerome Brunet sound-name-prefix = "TDMOUT_A"; 1317fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, 1318fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, 1319fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, 1320fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, 1321fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; 1322fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1323fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1324fd916739SJerome Brunet status = "disabled"; 1325fd916739SJerome Brunet }; 1326fd916739SJerome Brunet 1327fd916739SJerome Brunet tdmout_b: audio-controller@540 { 1328fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1329fd916739SJerome Brunet reg = <0x0 0x540 0x0 0x40>; 1330fd916739SJerome Brunet sound-name-prefix = "TDMOUT_B"; 1331fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, 1332fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, 1333fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, 1334fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, 1335fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; 1336fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1337fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1338fd916739SJerome Brunet status = "disabled"; 1339fd916739SJerome Brunet }; 1340fd916739SJerome Brunet 1341fd916739SJerome Brunet tdmout_c: audio-controller@580 { 1342fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1343fd916739SJerome Brunet reg = <0x0 0x580 0x0 0x40>; 1344fd916739SJerome Brunet sound-name-prefix = "TDMOUT_C"; 1345fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, 1346fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, 1347fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, 1348fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, 1349fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; 1350fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1351fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1352fd916739SJerome Brunet status = "disabled"; 1353fd916739SJerome Brunet }; 13548909e722SJerome Brunet }; 13558909e722SJerome Brunet 13560cb6c604SKevin Hilman aobus: bus@ff800000 { 13579d59b708SYixun Lan compatible = "simple-bus"; 13589d59b708SYixun Lan reg = <0x0 0xff800000 0x0 0x100000>; 13599d59b708SYixun Lan #address-cells = <2>; 13609d59b708SYixun Lan #size-cells = <2>; 13619d59b708SYixun Lan ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; 13629d59b708SYixun Lan 1363e03421ecSQiufang Dai sysctrl_AO: sys-ctrl@0 { 1364445f2bdaSNeil Armstrong compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon"; 1365e03421ecSQiufang Dai reg = <0x0 0x0 0x0 0x100>; 1366e03421ecSQiufang Dai 1367e03421ecSQiufang Dai clkc_AO: clock-controller { 1368e03421ecSQiufang Dai compatible = "amlogic,meson-axg-aoclkc"; 1369e03421ecSQiufang Dai #clock-cells = <1>; 1370e03421ecSQiufang Dai #reset-cells = <1>; 137116361ff2SJerome Brunet clocks = <&xtal>, <&clkc CLKID_CLK81>; 137216361ff2SJerome Brunet clock-names = "xtal", "mpeg-clk"; 1373e03421ecSQiufang Dai }; 1374e03421ecSQiufang Dai }; 1375e03421ecSQiufang Dai 1376de05ded6SXingyu Chen pinctrl_aobus: pinctrl@14 { 1377de05ded6SXingyu Chen compatible = "amlogic,meson-axg-aobus-pinctrl"; 1378de05ded6SXingyu Chen #address-cells = <2>; 1379de05ded6SXingyu Chen #size-cells = <2>; 1380de05ded6SXingyu Chen ranges; 1381de05ded6SXingyu Chen 1382de05ded6SXingyu Chen gpio_ao: bank@14 { 1383de05ded6SXingyu Chen reg = <0x0 0x00014 0x0 0x8>, 1384de05ded6SXingyu Chen <0x0 0x0002c 0x0 0x4>, 1385de05ded6SXingyu Chen <0x0 0x00024 0x0 0x8>; 1386de05ded6SXingyu Chen reg-names = "mux", "pull", "gpio"; 1387de05ded6SXingyu Chen gpio-controller; 1388de05ded6SXingyu Chen #gpio-cells = <2>; 1389de05ded6SXingyu Chen gpio-ranges = <&pinctrl_aobus 0 0 15>; 1390de05ded6SXingyu Chen }; 13917bd46a79SYixun Lan 1392c054b6c2SJerome Brunet i2c_ao_sck_4_pins: i2c_ao_sck_4 { 1393c054b6c2SJerome Brunet mux { 1394c054b6c2SJerome Brunet groups = "i2c_ao_sck_4"; 1395c054b6c2SJerome Brunet function = "i2c_ao"; 13961c5cc1c8SJerome Brunet bias-disable; 1397c054b6c2SJerome Brunet }; 1398c054b6c2SJerome Brunet }; 1399c054b6c2SJerome Brunet 1400c054b6c2SJerome Brunet i2c_ao_sck_8_pins: i2c_ao_sck_8 { 1401c054b6c2SJerome Brunet mux { 1402c054b6c2SJerome Brunet groups = "i2c_ao_sck_8"; 1403c054b6c2SJerome Brunet function = "i2c_ao"; 14041c5cc1c8SJerome Brunet bias-disable; 1405c054b6c2SJerome Brunet }; 1406c054b6c2SJerome Brunet }; 1407c054b6c2SJerome Brunet 1408c054b6c2SJerome Brunet i2c_ao_sck_10_pins: i2c_ao_sck_10 { 1409c054b6c2SJerome Brunet mux { 1410c054b6c2SJerome Brunet groups = "i2c_ao_sck_10"; 1411c054b6c2SJerome Brunet function = "i2c_ao"; 14121c5cc1c8SJerome Brunet bias-disable; 1413c054b6c2SJerome Brunet }; 1414c054b6c2SJerome Brunet }; 1415c054b6c2SJerome Brunet 1416c054b6c2SJerome Brunet i2c_ao_sda_5_pins: i2c_ao_sda_5 { 1417c054b6c2SJerome Brunet mux { 1418c054b6c2SJerome Brunet groups = "i2c_ao_sda_5"; 1419c054b6c2SJerome Brunet function = "i2c_ao"; 14201c5cc1c8SJerome Brunet bias-disable; 1421c054b6c2SJerome Brunet }; 1422c054b6c2SJerome Brunet }; 1423c054b6c2SJerome Brunet 1424c054b6c2SJerome Brunet i2c_ao_sda_9_pins: i2c_ao_sda_9 { 1425c054b6c2SJerome Brunet mux { 1426c054b6c2SJerome Brunet groups = "i2c_ao_sda_9"; 1427c054b6c2SJerome Brunet function = "i2c_ao"; 14281c5cc1c8SJerome Brunet bias-disable; 1429c054b6c2SJerome Brunet }; 1430c054b6c2SJerome Brunet }; 1431c054b6c2SJerome Brunet 1432c054b6c2SJerome Brunet i2c_ao_sda_11_pins: i2c_ao_sda_11 { 1433c054b6c2SJerome Brunet mux { 1434c054b6c2SJerome Brunet groups = "i2c_ao_sda_11"; 1435c054b6c2SJerome Brunet function = "i2c_ao"; 14361c5cc1c8SJerome Brunet bias-disable; 1437c054b6c2SJerome Brunet }; 1438c054b6c2SJerome Brunet }; 1439c054b6c2SJerome Brunet 14407bd46a79SYixun Lan remote_input_ao_pins: remote_input_ao { 14417bd46a79SYixun Lan mux { 14427bd46a79SYixun Lan groups = "remote_input_ao"; 14437bd46a79SYixun Lan function = "remote_input_ao"; 14441c5cc1c8SJerome Brunet bias-disable; 14457bd46a79SYixun Lan }; 14467bd46a79SYixun Lan }; 14474eae66a6SYixun Lan 14484eae66a6SYixun Lan uart_ao_a_pins: uart_ao_a { 14494eae66a6SYixun Lan mux { 14504eae66a6SYixun Lan groups = "uart_ao_tx_a", 14514eae66a6SYixun Lan "uart_ao_rx_a"; 14524eae66a6SYixun Lan function = "uart_ao_a"; 14531c5cc1c8SJerome Brunet bias-disable; 14544eae66a6SYixun Lan }; 14554eae66a6SYixun Lan }; 14564eae66a6SYixun Lan 14574eae66a6SYixun Lan uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { 14584eae66a6SYixun Lan mux { 14594eae66a6SYixun Lan groups = "uart_ao_cts_a", 14604eae66a6SYixun Lan "uart_ao_rts_a"; 14614eae66a6SYixun Lan function = "uart_ao_a"; 14621c5cc1c8SJerome Brunet bias-disable; 14634eae66a6SYixun Lan }; 14644eae66a6SYixun Lan }; 14654eae66a6SYixun Lan 14664eae66a6SYixun Lan uart_ao_b_pins: uart_ao_b { 14674eae66a6SYixun Lan mux { 14684eae66a6SYixun Lan groups = "uart_ao_tx_b", 14694eae66a6SYixun Lan "uart_ao_rx_b"; 14704eae66a6SYixun Lan function = "uart_ao_b"; 14711c5cc1c8SJerome Brunet bias-disable; 14724eae66a6SYixun Lan }; 14734eae66a6SYixun Lan }; 14744eae66a6SYixun Lan 14754eae66a6SYixun Lan uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { 14764eae66a6SYixun Lan mux { 14774eae66a6SYixun Lan groups = "uart_ao_cts_b", 14784eae66a6SYixun Lan "uart_ao_rts_b"; 14794eae66a6SYixun Lan function = "uart_ao_b"; 14801c5cc1c8SJerome Brunet bias-disable; 14814eae66a6SYixun Lan }; 14824eae66a6SYixun Lan }; 1483de05ded6SXingyu Chen }; 1484de05ded6SXingyu Chen 1485a04c18cbSJerome Brunet sec_AO: ao-secure@140 { 1486a04c18cbSJerome Brunet compatible = "amlogic,meson-gx-ao-secure", "syscon"; 1487a04c18cbSJerome Brunet reg = <0x0 0x140 0x0 0x140>; 1488a04c18cbSJerome Brunet amlogic,has-chip-id; 1489a04c18cbSJerome Brunet }; 1490a04c18cbSJerome Brunet 14914a81e5ddSJian Hu pwm_AO_cd: pwm@2000 { 1492b4ff05caSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 14934a81e5ddSJian Hu reg = <0x0 0x02000 0x0 0x20>; 14944a81e5ddSJian Hu #pwm-cells = <3>; 14954a81e5ddSJian Hu status = "disabled"; 14964a81e5ddSJian Hu }; 14974a81e5ddSJian Hu 14989d59b708SYixun Lan uart_AO: serial@3000 { 14999d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 15009d59b708SYixun Lan reg = <0x0 0x3000 0x0 0x18>; 15019d59b708SYixun Lan interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 15029adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; 15039d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 15049d59b708SYixun Lan status = "disabled"; 15059d59b708SYixun Lan }; 15069d59b708SYixun Lan 15079d59b708SYixun Lan uart_AO_B: serial@4000 { 15089d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 15099d59b708SYixun Lan reg = <0x0 0x4000 0x0 0x18>; 15109d59b708SYixun Lan interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 15119adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; 15129d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 15139d59b708SYixun Lan status = "disabled"; 15149d59b708SYixun Lan }; 15157bd46a79SYixun Lan 15168c0cf40fSJerome Brunet i2c_AO: i2c@5000 { 15178c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 15188c0cf40fSJerome Brunet reg = <0x0 0x05000 0x0 0x20>; 15198c0cf40fSJerome Brunet interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 15208c0cf40fSJerome Brunet clocks = <&clkc CLKID_AO_I2C>; 15218c0cf40fSJerome Brunet #address-cells = <1>; 15228c0cf40fSJerome Brunet #size-cells = <0>; 15238c0cf40fSJerome Brunet status = "disabled"; 15248c0cf40fSJerome Brunet }; 15258c0cf40fSJerome Brunet 15268c0cf40fSJerome Brunet pwm_AO_ab: pwm@7000 { 15278c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 15288c0cf40fSJerome Brunet reg = <0x0 0x07000 0x0 0x20>; 15298c0cf40fSJerome Brunet #pwm-cells = <3>; 15308c0cf40fSJerome Brunet status = "disabled"; 15318c0cf40fSJerome Brunet }; 15328c0cf40fSJerome Brunet 15337bd46a79SYixun Lan ir: ir@8000 { 15347bd46a79SYixun Lan compatible = "amlogic,meson-gxbb-ir"; 15357bd46a79SYixun Lan reg = <0x0 0x8000 0x0 0x20>; 15367bd46a79SYixun Lan interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 15377bd46a79SYixun Lan status = "disabled"; 15387bd46a79SYixun Lan }; 1539a51b74eaSXingyu Chen 1540a51b74eaSXingyu Chen saradc: adc@9000 { 1541a51b74eaSXingyu Chen compatible = "amlogic,meson-axg-saradc", 1542a51b74eaSXingyu Chen "amlogic,meson-saradc"; 1543a51b74eaSXingyu Chen reg = <0x0 0x9000 0x0 0x38>; 1544a51b74eaSXingyu Chen #io-channel-cells = <1>; 1545a51b74eaSXingyu Chen interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 1546a51b74eaSXingyu Chen clocks = <&xtal>, 1547a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC>, 1548a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_CLK>, 1549a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_SEL>; 1550a51b74eaSXingyu Chen clock-names = "clkin", "core", "adc_clk", "adc_sel"; 1551a51b74eaSXingyu Chen status = "disabled"; 1552a51b74eaSXingyu Chen }; 15539d59b708SYixun Lan }; 15548c0cf40fSJerome Brunet 15558c0cf40fSJerome Brunet gic: interrupt-controller@ffc01000 { 15568c0cf40fSJerome Brunet compatible = "arm,gic-400"; 15578c0cf40fSJerome Brunet reg = <0x0 0xffc01000 0 0x1000>, 15588c0cf40fSJerome Brunet <0x0 0xffc02000 0 0x2000>, 15598c0cf40fSJerome Brunet <0x0 0xffc04000 0 0x2000>, 15608c0cf40fSJerome Brunet <0x0 0xffc06000 0 0x2000>; 15618c0cf40fSJerome Brunet interrupt-controller; 15628c0cf40fSJerome Brunet interrupts = <GIC_PPI 9 15638c0cf40fSJerome Brunet (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 15648c0cf40fSJerome Brunet #interrupt-cells = <3>; 15658c0cf40fSJerome Brunet #address-cells = <0>; 15668c0cf40fSJerome Brunet }; 15678c0cf40fSJerome Brunet 15688c0cf40fSJerome Brunet cbus: bus@ffd00000 { 15698c0cf40fSJerome Brunet compatible = "simple-bus"; 15708c0cf40fSJerome Brunet reg = <0x0 0xffd00000 0x0 0x25000>; 15718c0cf40fSJerome Brunet #address-cells = <2>; 15728c0cf40fSJerome Brunet #size-cells = <2>; 15738c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; 15748c0cf40fSJerome Brunet 15758c0cf40fSJerome Brunet reset: reset-controller@1004 { 15768c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-reset"; 15778c0cf40fSJerome Brunet reg = <0x0 0x01004 0x0 0x9c>; 15788c0cf40fSJerome Brunet #reset-cells = <1>; 15798c0cf40fSJerome Brunet }; 15808c0cf40fSJerome Brunet 15818c0cf40fSJerome Brunet gpio_intc: interrupt-controller@f080 { 1582cbddb02eSCarlo Caione compatible = "amlogic,meson-axg-gpio-intc", 1583cbddb02eSCarlo Caione "amlogic,meson-gpio-intc"; 15848c0cf40fSJerome Brunet reg = <0x0 0xf080 0x0 0x10>; 15858c0cf40fSJerome Brunet interrupt-controller; 15868c0cf40fSJerome Brunet #interrupt-cells = <2>; 15878c0cf40fSJerome Brunet amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 15888c0cf40fSJerome Brunet }; 15898c0cf40fSJerome Brunet 15906f31ba17SCarlo Caione watchdog@f0d0 { 15916f31ba17SCarlo Caione compatible = "amlogic,meson-gxbb-wdt"; 15926f31ba17SCarlo Caione reg = <0x0 0xf0d0 0x0 0x10>; 15936f31ba17SCarlo Caione clocks = <&xtal>; 15946f31ba17SCarlo Caione }; 15956f31ba17SCarlo Caione 15968c0cf40fSJerome Brunet pwm_ab: pwm@1b000 { 15978c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 15988c0cf40fSJerome Brunet reg = <0x0 0x1b000 0x0 0x20>; 15998c0cf40fSJerome Brunet #pwm-cells = <3>; 16008c0cf40fSJerome Brunet status = "disabled"; 16018c0cf40fSJerome Brunet }; 16028c0cf40fSJerome Brunet 16038c0cf40fSJerome Brunet pwm_cd: pwm@1a000 { 16048c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 16058c0cf40fSJerome Brunet reg = <0x0 0x1a000 0x0 0x20>; 16068c0cf40fSJerome Brunet #pwm-cells = <3>; 16078c0cf40fSJerome Brunet status = "disabled"; 16088c0cf40fSJerome Brunet }; 16098c0cf40fSJerome Brunet 16108c0cf40fSJerome Brunet spicc0: spi@13000 { 16118c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 16128c0cf40fSJerome Brunet reg = <0x0 0x13000 0x0 0x3c>; 16138c0cf40fSJerome Brunet interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 16148c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC0>; 16158c0cf40fSJerome Brunet clock-names = "core"; 16168c0cf40fSJerome Brunet #address-cells = <1>; 16178c0cf40fSJerome Brunet #size-cells = <0>; 16188c0cf40fSJerome Brunet status = "disabled"; 16198c0cf40fSJerome Brunet }; 16208c0cf40fSJerome Brunet 16218c0cf40fSJerome Brunet spicc1: spi@15000 { 16228c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 16238c0cf40fSJerome Brunet reg = <0x0 0x15000 0x0 0x3c>; 16248c0cf40fSJerome Brunet interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 16258c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC1>; 16268c0cf40fSJerome Brunet clock-names = "core"; 16278c0cf40fSJerome Brunet #address-cells = <1>; 16288c0cf40fSJerome Brunet #size-cells = <0>; 16298c0cf40fSJerome Brunet status = "disabled"; 16308c0cf40fSJerome Brunet }; 16318c0cf40fSJerome Brunet 1632fea888bdSJerome Brunet clk_msr: clock-measure@18000 { 1633fea888bdSJerome Brunet compatible = "amlogic,meson-axg-clk-measure"; 1634fea888bdSJerome Brunet reg = <0x0 0x18000 0x0 0x10>; 1635fea888bdSJerome Brunet }; 1636fea888bdSJerome Brunet 16378c0cf40fSJerome Brunet i2c3: i2c@1c000 { 16388c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16398c0cf40fSJerome Brunet reg = <0x0 0x1c000 0x0 0x20>; 16408c0cf40fSJerome Brunet interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; 16418c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 16428c0cf40fSJerome Brunet #address-cells = <1>; 16438c0cf40fSJerome Brunet #size-cells = <0>; 16448c0cf40fSJerome Brunet status = "disabled"; 16458c0cf40fSJerome Brunet }; 16468c0cf40fSJerome Brunet 16478c0cf40fSJerome Brunet i2c2: i2c@1d000 { 16488c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16498c0cf40fSJerome Brunet reg = <0x0 0x1d000 0x0 0x20>; 16508c0cf40fSJerome Brunet interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 16518c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 16528c0cf40fSJerome Brunet #address-cells = <1>; 16538c0cf40fSJerome Brunet #size-cells = <0>; 16548c0cf40fSJerome Brunet status = "disabled"; 16558c0cf40fSJerome Brunet }; 16568c0cf40fSJerome Brunet 16578c0cf40fSJerome Brunet i2c1: i2c@1e000 { 16588c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16598c0cf40fSJerome Brunet reg = <0x0 0x1e000 0x0 0x20>; 16608c0cf40fSJerome Brunet interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 16618c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 16628c0cf40fSJerome Brunet #address-cells = <1>; 16638c0cf40fSJerome Brunet #size-cells = <0>; 16648c0cf40fSJerome Brunet status = "disabled"; 16658c0cf40fSJerome Brunet }; 16668c0cf40fSJerome Brunet 16678c0cf40fSJerome Brunet i2c0: i2c@1f000 { 16688c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16698c0cf40fSJerome Brunet reg = <0x0 0x1f000 0x0 0x20>; 16708c0cf40fSJerome Brunet interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 16718c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 16728c0cf40fSJerome Brunet #address-cells = <1>; 16738c0cf40fSJerome Brunet #size-cells = <0>; 16748c0cf40fSJerome Brunet status = "disabled"; 16758c0cf40fSJerome Brunet }; 16768c0cf40fSJerome Brunet 16778c0cf40fSJerome Brunet uart_B: serial@23000 { 16788c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 16798c0cf40fSJerome Brunet reg = <0x0 0x23000 0x0 0x18>; 16808c0cf40fSJerome Brunet interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 16818c0cf40fSJerome Brunet status = "disabled"; 16828c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; 16838c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 16848c0cf40fSJerome Brunet }; 16858c0cf40fSJerome Brunet 16868c0cf40fSJerome Brunet uart_A: serial@24000 { 16878c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 16888c0cf40fSJerome Brunet reg = <0x0 0x24000 0x0 0x18>; 16898c0cf40fSJerome Brunet interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 16908c0cf40fSJerome Brunet status = "disabled"; 16918c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; 16928c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 16938c0cf40fSJerome Brunet }; 16948c0cf40fSJerome Brunet }; 16958c0cf40fSJerome Brunet 16968c0cf40fSJerome Brunet apb: bus@ffe00000 { 16978c0cf40fSJerome Brunet compatible = "simple-bus"; 16988c0cf40fSJerome Brunet reg = <0x0 0xffe00000 0x0 0x200000>; 16998c0cf40fSJerome Brunet #address-cells = <2>; 17008c0cf40fSJerome Brunet #size-cells = <2>; 17018c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; 17028c0cf40fSJerome Brunet 17038c0cf40fSJerome Brunet sd_emmc_b: sd@5000 { 17048c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 17058c0cf40fSJerome Brunet reg = <0x0 0x5000 0x0 0x800>; 17068c0cf40fSJerome Brunet interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 17078c0cf40fSJerome Brunet status = "disabled"; 17088c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_B>, 17098c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_B_CLK0>, 17108c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 17118c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 17128c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_B>; 17138c0cf40fSJerome Brunet }; 17148c0cf40fSJerome Brunet 17158c0cf40fSJerome Brunet sd_emmc_c: mmc@7000 { 17168c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 17178c0cf40fSJerome Brunet reg = <0x0 0x7000 0x0 0x800>; 17188c0cf40fSJerome Brunet interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 17198c0cf40fSJerome Brunet status = "disabled"; 17208c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_C>, 17218c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_C_CLK0>, 17228c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 17238c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 17248c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_C>; 17258c0cf40fSJerome Brunet }; 17268c0cf40fSJerome Brunet }; 17278c0cf40fSJerome Brunet 17288c0cf40fSJerome Brunet sram: sram@fffc0000 { 17298c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-sram", "mmio-sram"; 17308c0cf40fSJerome Brunet reg = <0x0 0xfffc0000 0x0 0x20000>; 17318c0cf40fSJerome Brunet #address-cells = <1>; 17328c0cf40fSJerome Brunet #size-cells = <1>; 17338c0cf40fSJerome Brunet ranges = <0 0x0 0xfffc0000 0x20000>; 17348c0cf40fSJerome Brunet 17359c2d16bbSJerome Brunet cpu_scp_lpri: scp-shmem@13000 { 17368c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 17378c0cf40fSJerome Brunet reg = <0x13000 0x400>; 17388c0cf40fSJerome Brunet }; 17398c0cf40fSJerome Brunet 17409c2d16bbSJerome Brunet cpu_scp_hpri: scp-shmem@13400 { 17418c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 17428c0cf40fSJerome Brunet reg = <0x13400 0x400>; 17438c0cf40fSJerome Brunet }; 17448c0cf40fSJerome Brunet }; 17458c0cf40fSJerome Brunet }; 17468c0cf40fSJerome Brunet 17478c0cf40fSJerome Brunet timer { 17488c0cf40fSJerome Brunet compatible = "arm,armv8-timer"; 17498c0cf40fSJerome Brunet interrupts = <GIC_PPI 13 17508c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 17518c0cf40fSJerome Brunet <GIC_PPI 14 17528c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 17538c0cf40fSJerome Brunet <GIC_PPI 11 17548c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 17558c0cf40fSJerome Brunet <GIC_PPI 10 17568c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 17578c0cf40fSJerome Brunet }; 17588c0cf40fSJerome Brunet 17598c0cf40fSJerome Brunet xtal: xtal-clk { 17608c0cf40fSJerome Brunet compatible = "fixed-clock"; 17618c0cf40fSJerome Brunet clock-frequency = <24000000>; 17628c0cf40fSJerome Brunet clock-output-names = "xtal"; 17638c0cf40fSJerome Brunet #clock-cells = <0>; 17649d59b708SYixun Lan }; 17659d59b708SYixun Lan}; 1766